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[PATCH] aic7xxx_osm build fix
[cris-mirror.git] / drivers / usb / gadget / lh7a40x_udc.c
blobdf75ab65a5ec1adb235a7d68bfe4002ac7f3a98f
1 /*
2 * linux/drivers/usb/gadget/lh7a40x_udc.c
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24 #include "lh7a40x_udc.h"
25
26 //#define DEBUG printk
27 //#define DEBUG_EP0 printk
28 //#define DEBUG_SETUP printk
29
30 #ifndef DEBUG_EP0
31 # define DEBUG_EP0(fmt,args...)
32 #endif
33 #ifndef DEBUG_SETUP
34 # define DEBUG_SETUP(fmt,args...)
35 #endif
36 #ifndef DEBUG
37 # define NO_STATES
38 # define DEBUG(fmt,args...)
39 #endif
40
41 #define DRIVER_DESC "LH7A40x USB Device Controller"
42 #define DRIVER_VERSION __DATE__
43
44 #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
45 #define _BIT(x) (1<<(x))
46 #endif
47
48 struct lh7a40x_udc *the_controller;
49
50 static const char driver_name[] = "lh7a40x_udc";
51 static const char driver_desc[] = DRIVER_DESC;
52 static const char ep0name[] = "ep0-control";
53
54 /*
55 Local definintions.
56 */
57
58 #ifndef NO_STATES
59 static char *state_names[] = {
60 "WAIT_FOR_SETUP",
61 "DATA_STATE_XMIT",
62 "DATA_STATE_NEED_ZLP",
63 "WAIT_FOR_OUT_STATUS",
64 "DATA_STATE_RECV"
65 };
66 #endif
67
68 /*
69 Local declarations.
70 */
71 static int lh7a40x_ep_enable(struct usb_ep *ep,
72 const struct usb_endpoint_descriptor *);
73 static int lh7a40x_ep_disable(struct usb_ep *ep);
74 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, int);
75 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
76 static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned, dma_addr_t *,
77 int);
78 static void lh7a40x_free_buffer(struct usb_ep *ep, void *, dma_addr_t,
79 unsigned);
80 static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, int);
81 static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
82 static int lh7a40x_set_halt(struct usb_ep *ep, int);
83 static int lh7a40x_fifo_status(struct usb_ep *ep);
84 static int lh7a40x_fifo_status(struct usb_ep *ep);
85 static void lh7a40x_fifo_flush(struct usb_ep *ep);
86 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
87 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
88
89 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
90 int status);
91 static void pio_irq_enable(int bEndpointAddress);
92 static void pio_irq_disable(int bEndpointAddress);
93 static void stop_activity(struct lh7a40x_udc *dev,
94 struct usb_gadget_driver *driver);
95 static void flush(struct lh7a40x_ep *ep);
96 static void udc_enable(struct lh7a40x_udc *dev);
97 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
98
99 static struct usb_ep_ops lh7a40x_ep_ops = {
100 .enable = lh7a40x_ep_enable,
101 .disable = lh7a40x_ep_disable,
102
103 .alloc_request = lh7a40x_alloc_request,
104 .free_request = lh7a40x_free_request,
105
106 .alloc_buffer = lh7a40x_alloc_buffer,
107 .free_buffer = lh7a40x_free_buffer,
108
109 .queue = lh7a40x_queue,
110 .dequeue = lh7a40x_dequeue,
111
112 .set_halt = lh7a40x_set_halt,
113 .fifo_status = lh7a40x_fifo_status,
114 .fifo_flush = lh7a40x_fifo_flush,
115 };
116
117 /* Inline code */
118
119 static __inline__ int write_packet(struct lh7a40x_ep *ep,
120 struct lh7a40x_request *req, int max)
121 {
122 u8 *buf;
123 int length, count;
124 volatile u32 *fifo = (volatile u32 *)ep->fifo;
125
126 buf = req->req.buf + req->req.actual;
127 prefetch(buf);
128
129 length = req->req.length - req->req.actual;
130 length = min(length, max);
131 req->req.actual += length;
132
133 DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
134
135 count = length;
136 while (count--) {
137 *fifo = *buf++;
138 }
139
140 return length;
141 }
142
143 static __inline__ void usb_set_index(u32 ep)
144 {
145 *(volatile u32 *)io_p2v(USB_INDEX) = ep;
146 }
147
148 static __inline__ u32 usb_read(u32 port)
149 {
150 return *(volatile u32 *)io_p2v(port);
151 }
152
153 static __inline__ void usb_write(u32 val, u32 port)
154 {
155 *(volatile u32 *)io_p2v(port) = val;
156 }
157
158 static __inline__ void usb_set(u32 val, u32 port)
159 {
160 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
161 u32 after = (*ioport) | val;
162 *ioport = after;
163 }
164
165 static __inline__ void usb_clear(u32 val, u32 port)
166 {
167 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
168 u32 after = (*ioport) & ~val;
169 *ioport = after;
170 }
171
172 /*-------------------------------------------------------------------------*/
173
174 #define GPIO_PORTC_DR (0x80000E08)
175 #define GPIO_PORTC_DDR (0x80000E18)
176 #define GPIO_PORTC_PDR (0x80000E70)
177
178 /* get port C pin data register */
179 #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
180 /* get port C data direction register */
181 #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
182 /* set port C data register */
183 #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
184 /* set port C data direction register */
185 #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
186
187 /*
188 * LPD7A404 GPIO's:
189 * Port C bit 1 = USB Port 1 Power Enable
190 * Port C bit 2 = USB Port 1 Data Carrier Detect
191 */
192 #define is_usb_connected() get_portc_pdr(2)
193
194 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
195
196 static const char proc_node_name[] = "driver/udc";
197
198 static int
199 udc_proc_read(char *page, char **start, off_t off, int count,
200 int *eof, void *_dev)
201 {
202 char *buf = page;
203 struct lh7a40x_udc *dev = _dev;
204 char *next = buf;
205 unsigned size = count;
206 unsigned long flags;
207 int t;
208
209 if (off != 0)
210 return 0;
211
212 local_irq_save(flags);
213
214 /* basic device status */
215 t = scnprintf(next, size,
216 DRIVER_DESC "\n"
217 "%s version: %s\n"
218 "Gadget driver: %s\n"
219 "Host: %s\n\n",
220 driver_name, DRIVER_VERSION,
221 dev->driver ? dev->driver->driver.name : "(none)",
222 is_usb_connected()? "full speed" : "disconnected");
223 size -= t;
224 next += t;
225
226 t = scnprintf(next, size,
227 "GPIO:\n"
228 " Port C bit 1: %d, dir %d\n"
229 " Port C bit 2: %d, dir %d\n\n",
230 get_portc_pdr(1), get_portc_ddr(1),
231 get_portc_pdr(2), get_portc_ddr(2)
232 );
233 size -= t;
234 next += t;
235
236 t = scnprintf(next, size,
237 "DCP pullup: %d\n\n",
238 (usb_read(USB_PM) & PM_USB_DCP) != 0);
239 size -= t;
240 next += t;
241
242 local_irq_restore(flags);
243 *eof = 1;
244 return count - size;
245 }
246
247 #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
248 #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
249
250 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
251
252 #define create_proc_files() do {} while (0)
253 #define remove_proc_files() do {} while (0)
254
255 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
256
257 /*
258 * udc_disable - disable USB device controller
259 */
260 static void udc_disable(struct lh7a40x_udc *dev)
261 {
262 DEBUG("%s, %p\n", __FUNCTION__, dev);
263
264 udc_set_address(dev, 0);
265
266 /* Disable interrupts */
267 usb_write(0, USB_IN_INT_EN);
268 usb_write(0, USB_OUT_INT_EN);
269 usb_write(0, USB_INT_EN);
270
271 /* Disable the USB */
272 usb_write(0, USB_PM);
273
274 #ifdef CONFIG_ARCH_LH7A404
275 /* Disable USB power */
276 set_portc_dr(1, 0);
277 #endif
278
279 /* if hardware supports it, disconnect from usb */
280 /* make_usb_disappear(); */
281
282 dev->ep0state = WAIT_FOR_SETUP;
283 dev->gadget.speed = USB_SPEED_UNKNOWN;
284 dev->usb_address = 0;
285 }
286
287 /*
288 * udc_reinit - initialize software state
289 */
290 static void udc_reinit(struct lh7a40x_udc *dev)
291 {
292 u32 i;
293
294 DEBUG("%s, %p\n", __FUNCTION__, dev);
295
296 /* device/ep0 records init */
297 INIT_LIST_HEAD(&dev->gadget.ep_list);
298 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
299 dev->ep0state = WAIT_FOR_SETUP;
300
301 /* basic endpoint records init */
302 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
303 struct lh7a40x_ep *ep = &dev->ep[i];
304
305 if (i != 0)
306 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
307
308 ep->desc = 0;
309 ep->stopped = 0;
310 INIT_LIST_HEAD(&ep->queue);
311 ep->pio_irqs = 0;
312 }
313
314 /* the rest was statically initialized, and is read-only */
315 }
316
317 #define BYTES2MAXP(x) (x / 8)
318 #define MAXP2BYTES(x) (x * 8)
319
320 /* until it's enabled, this UDC should be completely invisible
321 * to any USB host.
322 */
323 static void udc_enable(struct lh7a40x_udc *dev)
324 {
325 int ep;
326
327 DEBUG("%s, %p\n", __FUNCTION__, dev);
328
329 dev->gadget.speed = USB_SPEED_UNKNOWN;
330
331 #ifdef CONFIG_ARCH_LH7A404
332 /* Set Port C bit 1 & 2 as output */
333 set_portc_ddr(1, 1);
334 set_portc_ddr(2, 1);
335
336 /* Enable USB power */
337 set_portc_dr(1, 0);
338 #endif
339
340 /*
341 * C.f Chapter 18.1.3.1 Initializing the USB
342 */
343
344 /* Disable the USB */
345 usb_clear(PM_USB_ENABLE, USB_PM);
346
347 /* Reset APB & I/O sides of the USB */
348 usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
349 mdelay(5);
350 usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
351
352 /* Set MAXP values for each */
353 for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
354 struct lh7a40x_ep *ep_reg = &dev->ep[ep];
355 u32 csr;
356
357 usb_set_index(ep);
358
359 switch (ep_reg->ep_type) {
360 case ep_bulk_in:
361 case ep_interrupt:
362 usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
363 ep_reg->csr2);
364 /* Fall through */
365 case ep_control:
366 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
367 USB_IN_MAXP);
368 break;
369 case ep_bulk_out:
370 usb_clear(USB_OUT_CSR2_USB_DMA_EN |
371 USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
372 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
373 USB_OUT_MAXP);
374 break;
375 }
376
377 /* Read & Write CSR1, just in case */
378 csr = usb_read(ep_reg->csr1);
379 usb_write(csr, ep_reg->csr1);
380
381 flush(ep_reg);
382 }
383
384 /* Disable interrupts */
385 usb_write(0, USB_IN_INT_EN);
386 usb_write(0, USB_OUT_INT_EN);
387 usb_write(0, USB_INT_EN);
388
389 /* Enable interrupts */
390 usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
391 usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
392 /* Dont enable rest of the interrupts */
393 /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
394 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
395
396 /* Enable SUSPEND */
397 usb_set(PM_ENABLE_SUSPEND, USB_PM);
398
399 /* Enable the USB */
400 usb_set(PM_USB_ENABLE, USB_PM);
401
402 #ifdef CONFIG_ARCH_LH7A404
403 /* NOTE: DOES NOT WORK! */
404 /* Let host detect UDC:
405 * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
406 * transistor on and pull the USBDP pin HIGH.
407 */
408 /* usb_clear(PM_USB_DCP, USB_PM);
409 usb_set(PM_USB_DCP, USB_PM); */
410 #endif
411 }
412
413 /*
414 Register entry point for the peripheral controller driver.
415 */
416 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
417 {
418 struct lh7a40x_udc *dev = the_controller;
419 int retval;
420
421 DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
422
423 if (!driver
424 || driver->speed != USB_SPEED_FULL
425 || !driver->bind
426 || !driver->unbind || !driver->disconnect || !driver->setup)
427 return -EINVAL;
428 if (!dev)
429 return -ENODEV;
430 if (dev->driver)
431 return -EBUSY;
432
433 /* first hook up the driver ... */
434 dev->driver = driver;
435 dev->gadget.dev.driver = &driver->driver;
436
437 device_add(&dev->gadget.dev);
438 retval = driver->bind(&dev->gadget);
439 if (retval) {
440 printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
441 driver->driver.name, retval);
442 device_del(&dev->gadget.dev);
443
444 dev->driver = 0;
445 dev->gadget.dev.driver = 0;
446 return retval;
447 }
448
449 /* ... then enable host detection and ep0; and we're ready
450 * for set_configuration as well as eventual disconnect.
451 * NOTE: this shouldn't power up until later.
452 */
453 printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
454 driver->driver.name);
455
456 udc_enable(dev);
457
458 return 0;
459 }
460
461 EXPORT_SYMBOL(usb_gadget_register_driver);
462
463 /*
464 Unregister entry point for the peripheral controller driver.
465 */
466 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
467 {
468 struct lh7a40x_udc *dev = the_controller;
469 unsigned long flags;
470
471 if (!dev)
472 return -ENODEV;
473 if (!driver || driver != dev->driver)
474 return -EINVAL;
475
476 spin_lock_irqsave(&dev->lock, flags);
477 dev->driver = 0;
478 stop_activity(dev, driver);
479 spin_unlock_irqrestore(&dev->lock, flags);
480
481 driver->unbind(&dev->gadget);
482 device_del(&dev->gadget.dev);
483
484 udc_disable(dev);
485
486 DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
487 return 0;
488 }
489
490 EXPORT_SYMBOL(usb_gadget_unregister_driver);
491
492 /*-------------------------------------------------------------------------*/
493
494 /** Write request to FIFO (max write == maxp size)
495 * Return: 0 = still running, 1 = completed, negative = errno
496 * NOTE: INDEX register must be set for EP
497 */
498 static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
499 {
500 u32 max;
501 u32 csr;
502
503 max = le16_to_cpu(ep->desc->wMaxPacketSize);
504
505 csr = usb_read(ep->csr1);
506 DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
507
508 if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
509 unsigned count;
510 int is_last, is_short;
511
512 count = write_packet(ep, req, max);
513 usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
514
515 /* last packet is usually short (or a zlp) */
516 if (unlikely(count != max))
517 is_last = is_short = 1;
518 else {
519 if (likely(req->req.length != req->req.actual)
520 || req->req.zero)
521 is_last = 0;
522 else
523 is_last = 1;
524 /* interrupt/iso maxpacket may not fill the fifo */
525 is_short = unlikely(max < ep_maxpacket(ep));
526 }
527
528 DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
529 ep->ep.name, count,
530 is_last ? "/L" : "", is_short ? "/S" : "",
531 req->req.length - req->req.actual, req);
532
533 /* requests complete when all IN data is in the FIFO */
534 if (is_last) {
535 done(ep, req, 0);
536 if (list_empty(&ep->queue)) {
537 pio_irq_disable(ep_index(ep));
538 }
539 return 1;
540 }
541 } else {
542 DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
543 }
544
545 return 0;
546 }
547
548 /** Read to request from FIFO (max read == bytes in fifo)
549 * Return: 0 = still running, 1 = completed, negative = errno
550 * NOTE: INDEX register must be set for EP
551 */
552 static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
553 {
554 u32 csr;
555 u8 *buf;
556 unsigned bufferspace, count, is_short;
557 volatile u32 *fifo = (volatile u32 *)ep->fifo;
558
559 /* make sure there's a packet in the FIFO. */
560 csr = usb_read(ep->csr1);
561 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
562 DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
563 return -EINVAL;
564 }
565
566 buf = req->req.buf + req->req.actual;
567 prefetchw(buf);
568 bufferspace = req->req.length - req->req.actual;
569
570 /* read all bytes from this packet */
571 count = usb_read(USB_OUT_FIFO_WC1);
572 req->req.actual += min(count, bufferspace);
573
574 is_short = (count < ep->ep.maxpacket);
575 DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
576 ep->ep.name, csr, count,
577 is_short ? "/S" : "", req, req->req.actual, req->req.length);
578
579 while (likely(count-- != 0)) {
580 u8 byte = (u8) (*fifo & 0xff);
581
582 if (unlikely(bufferspace == 0)) {
583 /* this happens when the driver's buffer
584 * is smaller than what the host sent.
585 * discard the extra data.
586 */
587 if (req->req.status != -EOVERFLOW)
588 printk("%s overflow %d\n", ep->ep.name, count);
589 req->req.status = -EOVERFLOW;
590 } else {
591 *buf++ = byte;
592 bufferspace--;
593 }
594 }
595
596 usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
597
598 /* completion */
599 if (is_short || req->req.actual == req->req.length) {
600 done(ep, req, 0);
601 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
602
603 if (list_empty(&ep->queue))
604 pio_irq_disable(ep_index(ep));
605 return 1;
606 }
607
608 /* finished that packet. the next one may be waiting... */
609 return 0;
610 }
611
612 /*
613 * done - retire a request; caller blocked irqs
614 * INDEX register is preserved to keep same
615 */
616 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
617 {
618 unsigned int stopped = ep->stopped;
619 u32 index;
620
621 DEBUG("%s, %p\n", __FUNCTION__, ep);
622 list_del_init(&req->queue);
623
624 if (likely(req->req.status == -EINPROGRESS))
625 req->req.status = status;
626 else
627 status = req->req.status;
628
629 if (status && status != -ESHUTDOWN)
630 DEBUG("complete %s req %p stat %d len %u/%u\n",
631 ep->ep.name, &req->req, status,
632 req->req.actual, req->req.length);
633
634 /* don't modify queue heads during completion callback */
635 ep->stopped = 1;
636 /* Read current index (completion may modify it) */
637 index = usb_read(USB_INDEX);
638
639 spin_unlock(&ep->dev->lock);
640 req->req.complete(&ep->ep, &req->req);
641 spin_lock(&ep->dev->lock);
642
643 /* Restore index */
644 usb_set_index(index);
645 ep->stopped = stopped;
646 }
647
648 /** Enable EP interrupt */
649 static void pio_irq_enable(int ep)
650 {
651 DEBUG("%s: %d\n", __FUNCTION__, ep);
652
653 switch (ep) {
654 case 1:
655 usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
656 break;
657 case 2:
658 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
659 break;
660 case 3:
661 usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
662 break;
663 default:
664 DEBUG("Unknown endpoint: %d\n", ep);
665 break;
666 }
667 }
668
669 /** Disable EP interrupt */
670 static void pio_irq_disable(int ep)
671 {
672 DEBUG("%s: %d\n", __FUNCTION__, ep);
673
674 switch (ep) {
675 case 1:
676 usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
677 break;
678 case 2:
679 usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
680 break;
681 case 3:
682 usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
683 break;
684 default:
685 DEBUG("Unknown endpoint: %d\n", ep);
686 break;
687 }
688 }
689
690 /*
691 * nuke - dequeue ALL requests
692 */
693 void nuke(struct lh7a40x_ep *ep, int status)
694 {
695 struct lh7a40x_request *req;
696
697 DEBUG("%s, %p\n", __FUNCTION__, ep);
698
699 /* Flush FIFO */
700 flush(ep);
701
702 /* called with irqs blocked */
703 while (!list_empty(&ep->queue)) {
704 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
705 done(ep, req, status);
706 }
707
708 /* Disable IRQ if EP is enabled (has descriptor) */
709 if (ep->desc)
710 pio_irq_disable(ep_index(ep));
711 }
712
713 /*
714 void nuke_all(struct lh7a40x_udc *dev)
715 {
716 int n;
717 for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
718 struct lh7a40x_ep *ep = &dev->ep[n];
719 usb_set_index(n);
720 nuke(ep, 0);
721 }
722 }*/
723
724 /*
725 static void flush_all(struct lh7a40x_udc *dev)
726 {
727 int n;
728 for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
729 {
730 struct lh7a40x_ep *ep = &dev->ep[n];
731 flush(ep);
732 }
733 }
734 */
735
736 /** Flush EP
737 * NOTE: INDEX register must be set before this call
738 */
739 static void flush(struct lh7a40x_ep *ep)
740 {
741 DEBUG("%s, %p\n", __FUNCTION__, ep);
742
743 switch (ep->ep_type) {
744 case ep_control:
745 /* check, by implication c.f. 15.1.2.11 */
746 break;
747
748 case ep_bulk_in:
749 case ep_interrupt:
750 /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
751 usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
752 break;
753
754 case ep_bulk_out:
755 /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
756 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
757 break;
758 }
759 }
760
761 /**
762 * lh7a40x_in_epn - handle IN interrupt
763 */
764 static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
765 {
766 u32 csr;
767 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
768 struct lh7a40x_request *req;
769
770 usb_set_index(ep_idx);
771
772 csr = usb_read(ep->csr1);
773 DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
774
775 if (csr & USB_IN_CSR1_SENT_STALL) {
776 DEBUG("USB_IN_CSR1_SENT_STALL\n");
777 usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
778 ep->csr1);
779 return;
780 }
781
782 if (!ep->desc) {
783 DEBUG("%s: NO EP DESC\n", __FUNCTION__);
784 return;
785 }
786
787 if (list_empty(&ep->queue))
788 req = 0;
789 else
790 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
791
792 DEBUG("req: %p\n", req);
793
794 if (!req)
795 return;
796
797 write_fifo(ep, req);
798 }
799
800 /* ********************************************************************************************* */
801 /* Bulk OUT (recv)
802 */
803
804 static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
805 {
806 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
807 struct lh7a40x_request *req;
808
809 DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
810
811 usb_set_index(ep_idx);
812
813 if (ep->desc) {
814 u32 csr;
815 csr = usb_read(ep->csr1);
816
817 while ((csr =
818 usb_read(ep->
819 csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
820 USB_OUT_CSR1_SENT_STALL)) {
821 DEBUG("%s: %x\n", __FUNCTION__, csr);
822
823 if (csr & USB_OUT_CSR1_SENT_STALL) {
824 DEBUG("%s: stall sent, flush fifo\n",
825 __FUNCTION__);
826 /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
827 flush(ep);
828 } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
829 if (list_empty(&ep->queue))
830 req = 0;
831 else
832 req =
833 list_entry(ep->queue.next,
834 struct lh7a40x_request,
835 queue);
836
837 if (!req) {
838 printk("%s: NULL REQ %d\n",
839 __FUNCTION__, ep_idx);
840 flush(ep);
841 break;
842 } else {
843 read_fifo(ep, req);
844 }
845 }
846
847 }
848
849 } else {
850 /* Throw packet away.. */
851 printk("%s: No descriptor?!?\n", __FUNCTION__);
852 flush(ep);
853 }
854 }
855
856 static void stop_activity(struct lh7a40x_udc *dev,
857 struct usb_gadget_driver *driver)
858 {
859 int i;
860
861 /* don't disconnect drivers more than once */
862 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
863 driver = 0;
864 dev->gadget.speed = USB_SPEED_UNKNOWN;
865
866 /* prevent new request submissions, kill any outstanding requests */
867 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
868 struct lh7a40x_ep *ep = &dev->ep[i];
869 ep->stopped = 1;
870
871 usb_set_index(i);
872 nuke(ep, -ESHUTDOWN);
873 }
874
875 /* report disconnect; the driver is already quiesced */
876 if (driver) {
877 spin_unlock(&dev->lock);
878 driver->disconnect(&dev->gadget);
879 spin_lock(&dev->lock);
880 }
881
882 /* re-init driver-visible data structures */
883 udc_reinit(dev);
884 }
885
886 /** Handle USB RESET interrupt
887 */
888 static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
889 {
890 #if 0 /* def CONFIG_ARCH_LH7A404 */
891 /* Does not work always... */
892
893 DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
894
895 if (!dev->usb_address) {
896 /*usb_set(USB_RESET_IO, USB_RESET);
897 mdelay(5);
898 usb_clear(USB_RESET_IO, USB_RESET); */
899 return;
900 }
901 /* Put the USB controller into reset. */
902 usb_set(USB_RESET_IO, USB_RESET);
903
904 /* Set Device ID to 0 */
905 udc_set_address(dev, 0);
906
907 /* Let PLL2 settle down */
908 mdelay(5);
909
910 /* Release the USB controller from reset */
911 usb_clear(USB_RESET_IO, USB_RESET);
912
913 /* Re-enable UDC */
914 udc_enable(dev);
915
916 #endif
917 dev->gadget.speed = USB_SPEED_FULL;
918 }
919
920 /*
921 * lh7a40x usb client interrupt handler.
922 */
923 static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev, struct pt_regs *r)
924 {
925 struct lh7a40x_udc *dev = _dev;
926
927 DEBUG("\n\n");
928
929 spin_lock(&dev->lock);
930
931 for (;;) {
932 u32 intr_in = usb_read(USB_IN_INT);
933 u32 intr_out = usb_read(USB_OUT_INT);
934 u32 intr_int = usb_read(USB_INT);
935
936 /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
937 u32 in_en = usb_read(USB_IN_INT_EN);
938 u32 out_en = usb_read(USB_OUT_INT_EN);
939
940 if (!intr_out && !intr_in && !intr_int)
941 break;
942
943 DEBUG("%s (on state %s)\n", __FUNCTION__,
944 state_names[dev->ep0state]);
945 DEBUG("intr_out = %x\n", intr_out);
946 DEBUG("intr_in = %x\n", intr_in);
947 DEBUG("intr_int = %x\n", intr_int);
948
949 if (intr_in) {
950 usb_write(intr_in, USB_IN_INT);
951
952 if ((intr_in & USB_IN_INT_EP1)
953 && (in_en & USB_IN_INT_EP1)) {
954 DEBUG("USB_IN_INT_EP1\n");
955 lh7a40x_in_epn(dev, 1, intr_in);
956 }
957 if ((intr_in & USB_IN_INT_EP3)
958 && (in_en & USB_IN_INT_EP3)) {
959 DEBUG("USB_IN_INT_EP3\n");
960 lh7a40x_in_epn(dev, 3, intr_in);
961 }
962 if (intr_in & USB_IN_INT_EP0) {
963 DEBUG("USB_IN_INT_EP0 (control)\n");
964 lh7a40x_handle_ep0(dev, intr_in);
965 }
966 }
967
968 if (intr_out) {
969 usb_write(intr_out, USB_OUT_INT);
970
971 if ((intr_out & USB_OUT_INT_EP2)
972 && (out_en & USB_OUT_INT_EP2)) {
973 DEBUG("USB_OUT_INT_EP2\n");
974 lh7a40x_out_epn(dev, 2, intr_out);
975 }
976 }
977
978 if (intr_int) {
979 usb_write(intr_int, USB_INT);
980
981 if (intr_int & USB_INT_RESET_INT) {
982 lh7a40x_reset_intr(dev);
983 }
984
985 if (intr_int & USB_INT_RESUME_INT) {
986 DEBUG("USB resume\n");
987
988 if (dev->gadget.speed != USB_SPEED_UNKNOWN
989 && dev->driver
990 && dev->driver->resume
991 && is_usb_connected()) {
992 dev->driver->resume(&dev->gadget);
993 }
994 }
995
996 if (intr_int & USB_INT_SUSPEND_INT) {
997 DEBUG("USB suspend%s\n",
998 is_usb_connected()? "" : "+disconnect");
999 if (!is_usb_connected()) {
1000 stop_activity(dev, dev->driver);
1001 } else if (dev->gadget.speed !=
1002 USB_SPEED_UNKNOWN && dev->driver
1003 && dev->driver->suspend) {
1004 dev->driver->suspend(&dev->gadget);
1005 }
1006 }
1007
1008 }
1009 }
1010
1011 spin_unlock(&dev->lock);
1012
1013 return IRQ_HANDLED;
1014 }
1015
1016 static int lh7a40x_ep_enable(struct usb_ep *_ep,
1017 const struct usb_endpoint_descriptor *desc)
1018 {
1019 struct lh7a40x_ep *ep;
1020 struct lh7a40x_udc *dev;
1021 unsigned long flags;
1022
1023 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1024
1025 ep = container_of(_ep, struct lh7a40x_ep, ep);
1026 if (!_ep || !desc || ep->desc || _ep->name == ep0name
1027 || desc->bDescriptorType != USB_DT_ENDPOINT
1028 || ep->bEndpointAddress != desc->bEndpointAddress
1029 || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
1030 DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
1031 return -EINVAL;
1032 }
1033
1034 /* xfer types must match, except that interrupt ~= bulk */
1035 if (ep->bmAttributes != desc->bmAttributes
1036 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
1037 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
1038 DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
1039 return -EINVAL;
1040 }
1041
1042 /* hardware _could_ do smaller, but driver doesn't */
1043 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
1044 && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
1045 || !desc->wMaxPacketSize) {
1046 DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
1047 return -ERANGE;
1048 }
1049
1050 dev = ep->dev;
1051 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1052 DEBUG("%s, bogus device state\n", __FUNCTION__);
1053 return -ESHUTDOWN;
1054 }
1055
1056 spin_lock_irqsave(&ep->dev->lock, flags);
1057
1058 ep->stopped = 0;
1059 ep->desc = desc;
1060 ep->pio_irqs = 0;
1061 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
1062
1063 /* Reset halt state (does flush) */
1064 lh7a40x_set_halt(_ep, 0);
1065
1066 spin_unlock_irqrestore(&ep->dev->lock, flags);
1067
1068 DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
1069 return 0;
1070 }
1071
1072 /** Disable EP
1073 * NOTE: Sets INDEX register
1074 */
1075 static int lh7a40x_ep_disable(struct usb_ep *_ep)
1076 {
1077 struct lh7a40x_ep *ep;
1078 unsigned long flags;
1079
1080 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1081
1082 ep = container_of(_ep, struct lh7a40x_ep, ep);
1083 if (!_ep || !ep->desc) {
1084 DEBUG("%s, %s not enabled\n", __FUNCTION__,
1085 _ep ? ep->ep.name : NULL);
1086 return -EINVAL;
1087 }
1088
1089 spin_lock_irqsave(&ep->dev->lock, flags);
1090
1091 usb_set_index(ep_index(ep));
1092
1093 /* Nuke all pending requests (does flush) */
1094 nuke(ep, -ESHUTDOWN);
1095
1096 /* Disable ep IRQ */
1097 pio_irq_disable(ep_index(ep));
1098
1099 ep->desc = 0;
1100 ep->stopped = 1;
1101
1102 spin_unlock_irqrestore(&ep->dev->lock, flags);
1103
1104 DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
1105 return 0;
1106 }
1107
1108 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
1109 int gfp_flags)
1110 {
1111 struct lh7a40x_request *req;
1112
1113 DEBUG("%s, %p\n", __FUNCTION__, ep);
1114
1115 req = kmalloc(sizeof *req, gfp_flags);
1116 if (!req)
1117 return 0;
1118
1119 memset(req, 0, sizeof *req);
1120 INIT_LIST_HEAD(&req->queue);
1121
1122 return &req->req;
1123 }
1124
1125 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
1126 {
1127 struct lh7a40x_request *req;
1128
1129 DEBUG("%s, %p\n", __FUNCTION__, ep);
1130
1131 req = container_of(_req, struct lh7a40x_request, req);
1132 WARN_ON(!list_empty(&req->queue));
1133 kfree(req);
1134 }
1135
1136 static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned bytes,
1137 dma_addr_t * dma, int gfp_flags)
1138 {
1139 char *retval;
1140
1141 DEBUG("%s (%p, %d, %d)\n", __FUNCTION__, ep, bytes, gfp_flags);
1142
1143 retval = kmalloc(bytes, gfp_flags & ~(__GFP_DMA | __GFP_HIGHMEM));
1144 if (retval)
1145 *dma = virt_to_bus(retval);
1146 return retval;
1147 }
1148
1149 static void lh7a40x_free_buffer(struct usb_ep *ep, void *buf, dma_addr_t dma,
1150 unsigned bytes)
1151 {
1152 DEBUG("%s, %p\n", __FUNCTION__, ep);
1153 kfree(buf);
1154 }
1155
1156 /** Queue one request
1157 * Kickstart transfer if needed
1158 * NOTE: Sets INDEX register
1159 */
1160 static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
1161 int gfp_flags)
1162 {
1163 struct lh7a40x_request *req;
1164 struct lh7a40x_ep *ep;
1165 struct lh7a40x_udc *dev;
1166 unsigned long flags;
1167
1168 DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
1169
1170 req = container_of(_req, struct lh7a40x_request, req);
1171 if (unlikely
1172 (!_req || !_req->complete || !_req->buf
1173 || !list_empty(&req->queue))) {
1174 DEBUG("%s, bad params\n", __FUNCTION__);
1175 return -EINVAL;
1176 }
1177
1178 ep = container_of(_ep, struct lh7a40x_ep, ep);
1179 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1180 DEBUG("%s, bad ep\n", __FUNCTION__);
1181 return -EINVAL;
1182 }
1183
1184 dev = ep->dev;
1185 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1186 DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
1187 return -ESHUTDOWN;
1188 }
1189
1190 DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
1191 _req->buf);
1192
1193 spin_lock_irqsave(&dev->lock, flags);
1194
1195 _req->status = -EINPROGRESS;
1196 _req->actual = 0;
1197
1198 /* kickstart this i/o queue? */
1199 DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
1200 ep->stopped);
1201 if (list_empty(&ep->queue) && likely(!ep->stopped)) {
1202 u32 csr;
1203
1204 if (unlikely(ep_index(ep) == 0)) {
1205 /* EP0 */
1206 list_add_tail(&req->queue, &ep->queue);
1207 lh7a40x_ep0_kick(dev, ep);
1208 req = 0;
1209 } else if (ep_is_in(ep)) {
1210 /* EP1 & EP3 */
1211 usb_set_index(ep_index(ep));
1212 csr = usb_read(ep->csr1);
1213 pio_irq_enable(ep_index(ep));
1214 if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
1215 if (write_fifo(ep, req) == 1)
1216 req = 0;
1217 }
1218 } else {
1219 /* EP2 */
1220 usb_set_index(ep_index(ep));
1221 csr = usb_read(ep->csr1);
1222 pio_irq_enable(ep_index(ep));
1223 if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
1224 if (read_fifo(ep, req) == 1)
1225 req = 0;
1226 }
1227 }
1228 }
1229
1230 /* pio or dma irq handler advances the queue. */
1231 if (likely(req != 0))
1232 list_add_tail(&req->queue, &ep->queue);
1233
1234 spin_unlock_irqrestore(&dev->lock, flags);
1235
1236 return 0;
1237 }
1238
1239 /* dequeue JUST ONE request */
1240 static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1241 {
1242 struct lh7a40x_ep *ep;
1243 struct lh7a40x_request *req;
1244 unsigned long flags;
1245
1246 DEBUG("%s, %p\n", __FUNCTION__, _ep);
1247
1248 ep = container_of(_ep, struct lh7a40x_ep, ep);
1249 if (!_ep || ep->ep.name == ep0name)
1250 return -EINVAL;
1251
1252 spin_lock_irqsave(&ep->dev->lock, flags);
1253
1254 /* make sure it's actually queued on this endpoint */
1255 list_for_each_entry(req, &ep->queue, queue) {
1256 if (&req->req == _req)
1257 break;
1258 }
1259 if (&req->req != _req) {
1260 spin_unlock_irqrestore(&ep->dev->lock, flags);
1261 return -EINVAL;
1262 }
1263
1264 done(ep, req, -ECONNRESET);
1265
1266 spin_unlock_irqrestore(&ep->dev->lock, flags);
1267 return 0;
1268 }
1269
1270 /** Halt specific EP
1271 * Return 0 if success
1272 * NOTE: Sets INDEX register to EP !
1273 */
1274 static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
1275 {
1276 struct lh7a40x_ep *ep;
1277 unsigned long flags;
1278
1279 ep = container_of(_ep, struct lh7a40x_ep, ep);
1280 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1281 DEBUG("%s, bad ep\n", __FUNCTION__);
1282 return -EINVAL;
1283 }
1284
1285 usb_set_index(ep_index(ep));
1286
1287 DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
1288
1289 spin_lock_irqsave(&ep->dev->lock, flags);
1290
1291 if (ep_index(ep) == 0) {
1292 /* EP0 */
1293 usb_set(EP0_SEND_STALL, ep->csr1);
1294 } else if (ep_is_in(ep)) {
1295 u32 csr = usb_read(ep->csr1);
1296 if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
1297 || !list_empty(&ep->queue))) {
1298 /*
1299 * Attempts to halt IN endpoints will fail (returning -EAGAIN)
1300 * if any transfer requests are still queued, or if the controller
1301 * FIFO still holds bytes that the host hasn’t collected.
1302 */
1303 spin_unlock_irqrestore(&ep->dev->lock, flags);
1304 DEBUG
1305 ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
1306 (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
1307 !list_empty(&ep->queue));
1308 return -EAGAIN;
1309 }
1310 flush(ep);
1311 if (value)
1312 usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
1313 else {
1314 usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
1315 usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
1316 }
1317
1318 } else {
1319
1320 flush(ep);
1321 if (value)
1322 usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1323 else {
1324 usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1325 usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
1326 }
1327 }
1328
1329 if (value) {
1330 ep->stopped = 1;
1331 } else {
1332 ep->stopped = 0;
1333 }
1334
1335 spin_unlock_irqrestore(&ep->dev->lock, flags);
1336
1337 DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
1338
1339 return 0;
1340 }
1341
1342 /** Return bytes in EP FIFO
1343 * NOTE: Sets INDEX register to EP
1344 */
1345 static int lh7a40x_fifo_status(struct usb_ep *_ep)
1346 {
1347 u32 csr;
1348 int count = 0;
1349 struct lh7a40x_ep *ep;
1350
1351 ep = container_of(_ep, struct lh7a40x_ep, ep);
1352 if (!_ep) {
1353 DEBUG("%s, bad ep\n", __FUNCTION__);
1354 return -ENODEV;
1355 }
1356
1357 DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
1358
1359 /* LPD can't report unclaimed bytes from IN fifos */
1360 if (ep_is_in(ep))
1361 return -EOPNOTSUPP;
1362
1363 usb_set_index(ep_index(ep));
1364
1365 csr = usb_read(ep->csr1);
1366 if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
1367 csr & USB_OUT_CSR1_OUT_PKT_RDY) {
1368 count = usb_read(USB_OUT_FIFO_WC1);
1369 }
1370
1371 return count;
1372 }
1373
1374 /** Flush EP FIFO
1375 * NOTE: Sets INDEX register to EP
1376 */
1377 static void lh7a40x_fifo_flush(struct usb_ep *_ep)
1378 {
1379 struct lh7a40x_ep *ep;
1380
1381 ep = container_of(_ep, struct lh7a40x_ep, ep);
1382 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1383 DEBUG("%s, bad ep\n", __FUNCTION__);
1384 return;
1385 }
1386
1387 usb_set_index(ep_index(ep));
1388 flush(ep);
1389 }
1390
1391 /****************************************************************/
1392 /* End Point 0 related functions */
1393 /****************************************************************/
1394
1395 /* return: 0 = still running, 1 = completed, negative = errno */
1396 static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1397 {
1398 u32 max;
1399 unsigned count;
1400 int is_last;
1401
1402 max = ep_maxpacket(ep);
1403
1404 DEBUG_EP0("%s\n", __FUNCTION__);
1405
1406 count = write_packet(ep, req, max);
1407
1408 /* last packet is usually short (or a zlp) */
1409 if (unlikely(count != max))
1410 is_last = 1;
1411 else {
1412 if (likely(req->req.length != req->req.actual) || req->req.zero)
1413 is_last = 0;
1414 else
1415 is_last = 1;
1416 }
1417
1418 DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
1419 ep->ep.name, count,
1420 is_last ? "/L" : "", req->req.length - req->req.actual, req);
1421
1422 /* requests complete when all IN data is in the FIFO */
1423 if (is_last) {
1424 done(ep, req, 0);
1425 return 1;
1426 }
1427
1428 return 0;
1429 }
1430
1431 static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
1432 unsigned char *cp, int max)
1433 {
1434 int bytes;
1435 int count = usb_read(USB_OUT_FIFO_WC1);
1436 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1437
1438 if (count > max)
1439 count = max;
1440 bytes = count;
1441 while (count--)
1442 *cp++ = *fifo & 0xFF;
1443 return bytes;
1444 }
1445
1446 static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
1447 unsigned char *cp, int count)
1448 {
1449 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1450 DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
1451 while (count--)
1452 *fifo = *cp++;
1453 }
1454
1455 static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1456 {
1457 u32 csr;
1458 u8 *buf;
1459 unsigned bufferspace, count, is_short;
1460 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1461
1462 DEBUG_EP0("%s\n", __FUNCTION__);
1463
1464 csr = usb_read(USB_EP0_CSR);
1465 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
1466 return 0;
1467
1468 buf = req->req.buf + req->req.actual;
1469 prefetchw(buf);
1470 bufferspace = req->req.length - req->req.actual;
1471
1472 /* read all bytes from this packet */
1473 if (likely(csr & EP0_OUT_PKT_RDY)) {
1474 count = usb_read(USB_OUT_FIFO_WC1);
1475 req->req.actual += min(count, bufferspace);
1476 } else /* zlp */
1477 count = 0;
1478
1479 is_short = (count < ep->ep.maxpacket);
1480 DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
1481 ep->ep.name, csr, count,
1482 is_short ? "/S" : "", req, req->req.actual, req->req.length);
1483
1484 while (likely(count-- != 0)) {
1485 u8 byte = (u8) (*fifo & 0xff);
1486
1487 if (unlikely(bufferspace == 0)) {
1488 /* this happens when the driver's buffer
1489 * is smaller than what the host sent.
1490 * discard the extra data.
1491 */
1492 if (req->req.status != -EOVERFLOW)
1493 DEBUG_EP0("%s overflow %d\n", ep->ep.name,
1494 count);
1495 req->req.status = -EOVERFLOW;
1496 } else {
1497 *buf++ = byte;
1498 bufferspace--;
1499 }
1500 }
1501
1502 /* completion */
1503 if (is_short || req->req.actual == req->req.length) {
1504 done(ep, req, 0);
1505 return 1;
1506 }
1507
1508 /* finished that packet. the next one may be waiting... */
1509 return 0;
1510 }
1511
1512 /**
1513 * udc_set_address - set the USB address for this device
1514 * @address:
1515 *
1516 * Called from control endpoint function after it decodes a set address setup packet.
1517 */
1518 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
1519 {
1520 DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
1521 /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
1522 dev->usb_address = address;
1523 usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
1524 usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
1525 /* usb_read(USB_FA); */
1526 }
1527
1528 /*
1529 * DATA_STATE_RECV (OUT_PKT_RDY)
1530 * - if error
1531 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1532 * - else
1533 * set EP0_CLR_OUT bit
1534 if last set EP0_DATA_END bit
1535 */
1536 static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
1537 {
1538 struct lh7a40x_request *req;
1539 struct lh7a40x_ep *ep = &dev->ep[0];
1540 int ret;
1541
1542 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1543
1544 if (list_empty(&ep->queue))
1545 req = 0;
1546 else
1547 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1548
1549 if (req) {
1550
1551 if (req->req.length == 0) {
1552 DEBUG_EP0("ZERO LENGTH OUT!\n");
1553 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1554 dev->ep0state = WAIT_FOR_SETUP;
1555 return;
1556 }
1557 ret = read_fifo_ep0(ep, req);
1558 if (ret) {
1559 /* Done! */
1560 DEBUG_EP0("%s: finished, waiting for status\n",
1561 __FUNCTION__);
1562
1563 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1564 dev->ep0state = WAIT_FOR_SETUP;
1565 } else {
1566 /* Not done yet.. */
1567 DEBUG_EP0("%s: not finished\n", __FUNCTION__);
1568 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1569 }
1570 } else {
1571 DEBUG_EP0("NO REQ??!\n");
1572 }
1573 }
1574
1575 /*
1576 * DATA_STATE_XMIT
1577 */
1578 static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
1579 {
1580 struct lh7a40x_request *req;
1581 struct lh7a40x_ep *ep = &dev->ep[0];
1582 int ret, need_zlp = 0;
1583
1584 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1585
1586 if (list_empty(&ep->queue))
1587 req = 0;
1588 else
1589 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1590
1591 if (!req) {
1592 DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
1593 return 0;
1594 }
1595
1596 if (req->req.length == 0) {
1597
1598 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1599 dev->ep0state = WAIT_FOR_SETUP;
1600 return 1;
1601 }
1602
1603 if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
1604 /* Next write will end with the packet size, */
1605 /* so we need Zero-length-packet */
1606 need_zlp = 1;
1607 }
1608
1609 ret = write_fifo_ep0(ep, req);
1610
1611 if (ret == 1 && !need_zlp) {
1612 /* Last packet */
1613 DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
1614
1615 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1616 dev->ep0state = WAIT_FOR_SETUP;
1617 } else {
1618 DEBUG_EP0("%s: not finished\n", __FUNCTION__);
1619 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1620 }
1621
1622 if (need_zlp) {
1623 DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
1624 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1625 dev->ep0state = DATA_STATE_NEED_ZLP;
1626 }
1627
1628 return 1;
1629 }
1630
1631 static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
1632 struct usb_ctrlrequest *ctrl)
1633 {
1634 struct lh7a40x_ep *ep0 = &dev->ep[0];
1635 struct lh7a40x_ep *qep;
1636 int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
1637 u16 val = 0;
1638
1639 if (reqtype == USB_RECIP_INTERFACE) {
1640 /* This is not supported.
1641 * And according to the USB spec, this one does nothing..
1642 * Just return 0
1643 */
1644 DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
1645 } else if (reqtype == USB_RECIP_DEVICE) {
1646 DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
1647 val |= (1 << 0); /* Self powered */
1648 /*val |= (1<<1); *//* Remote wakeup */
1649 } else if (reqtype == USB_RECIP_ENDPOINT) {
1650 int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
1651
1652 DEBUG_SETUP
1653 ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
1654 ep_num, ctrl->wLength);
1655
1656 if (ctrl->wLength > 2 || ep_num > 3)
1657 return -EOPNOTSUPP;
1658
1659 qep = &dev->ep[ep_num];
1660 if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
1661 && ep_index(qep) != 0) {
1662 return -EOPNOTSUPP;
1663 }
1664
1665 usb_set_index(ep_index(qep));
1666
1667 /* Return status on next IN token */
1668 switch (qep->ep_type) {
1669 case ep_control:
1670 val =
1671 (usb_read(qep->csr1) & EP0_SEND_STALL) ==
1672 EP0_SEND_STALL;
1673 break;
1674 case ep_bulk_in:
1675 case ep_interrupt:
1676 val =
1677 (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
1678 USB_IN_CSR1_SEND_STALL;
1679 break;
1680 case ep_bulk_out:
1681 val =
1682 (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
1683 USB_OUT_CSR1_SEND_STALL;
1684 break;
1685 }
1686
1687 /* Back to EP0 index */
1688 usb_set_index(0);
1689
1690 DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
1691 ctrl->wIndex, val);
1692 } else {
1693 DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
1694 return -EOPNOTSUPP;
1695 }
1696
1697 /* Clear "out packet ready" */
1698 usb_set((EP0_CLR_OUT), USB_EP0_CSR);
1699 /* Put status to FIFO */
1700 lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
1701 /* Issue "In packet ready" */
1702 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1703
1704 return 0;
1705 }
1706
1707 /*
1708 * WAIT_FOR_SETUP (OUT_PKT_RDY)
1709 * - read data packet from EP0 FIFO
1710 * - decode command
1711 * - if error
1712 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1713 * - else
1714 * set EP0_CLR_OUT | EP0_DATA_END bits
1715 */
1716 static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
1717 {
1718 struct lh7a40x_ep *ep = &dev->ep[0];
1719 struct usb_ctrlrequest ctrl;
1720 int i, bytes, is_in;
1721
1722 DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
1723
1724 /* Nuke all previous transfers */
1725 nuke(ep, -EPROTO);
1726
1727 /* read control req from fifo (8 bytes) */
1728 bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
1729
1730 DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
1731 DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
1732 ctrl.bRequestType == USB_DIR_IN);
1733 DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
1734 DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
1735 DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
1736 DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
1737
1738 /* Set direction of EP0 */
1739 if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1740 ep->bEndpointAddress |= USB_DIR_IN;
1741 is_in = 1;
1742 } else {
1743 ep->bEndpointAddress &= ~USB_DIR_IN;
1744 is_in = 0;
1745 }
1746
1747 dev->req_pending = 1;
1748
1749 /* Handle some SETUP packets ourselves */
1750 switch (ctrl.bRequest) {
1751 case USB_REQ_SET_ADDRESS:
1752 if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1753 break;
1754
1755 DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
1756 udc_set_address(dev, ctrl.wValue);
1757 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1758 return;
1759
1760 case USB_REQ_GET_STATUS:{
1761 if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
1762 return;
1763
1764 case USB_REQ_CLEAR_FEATURE:
1765 case USB_REQ_SET_FEATURE:
1766 if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
1767 struct lh7a40x_ep *qep;
1768 int ep_num = (ctrl.wIndex & 0x0f);
1769
1770 /* Support only HALT feature */
1771 if (ctrl.wValue != 0 || ctrl.wLength != 0
1772 || ep_num > 3 || ep_num < 1)
1773 break;
1774
1775 qep = &dev->ep[ep_num];
1776 if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
1777 DEBUG_SETUP("SET_FEATURE (%d)\n",
1778 ep_num);
1779 lh7a40x_set_halt(&qep->ep, 1);
1780 } else {
1781 DEBUG_SETUP("CLR_FEATURE (%d)\n",
1782 ep_num);
1783 lh7a40x_set_halt(&qep->ep, 0);
1784 }
1785 usb_set_index(0);
1786
1787 /* Reply with a ZLP on next IN token */
1788 usb_set((EP0_CLR_OUT | EP0_DATA_END),
1789 USB_EP0_CSR);
1790 return;
1791 }
1792 break;
1793 }
1794
1795 default:
1796 break;
1797 }
1798
1799 if (likely(dev->driver)) {
1800 /* device-2-host (IN) or no data setup command, process immediately */
1801 spin_unlock(&dev->lock);
1802 i = dev->driver->setup(&dev->gadget, &ctrl);
1803 spin_lock(&dev->lock);
1804
1805 if (i < 0) {
1806 /* setup processing failed, force stall */
1807 DEBUG_SETUP
1808 (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
1809 i);
1810 usb_set_index(0);
1811 usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
1812 USB_EP0_CSR);
1813
1814 /* ep->stopped = 1; */
1815 dev->ep0state = WAIT_FOR_SETUP;
1816 }
1817 }
1818 }
1819
1820 /*
1821 * DATA_STATE_NEED_ZLP
1822 */
1823 static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
1824 {
1825 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1826
1827 /* c.f. Table 15-14 */
1828 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1829 dev->ep0state = WAIT_FOR_SETUP;
1830 }
1831
1832 /*
1833 * handle ep0 interrupt
1834 */
1835 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
1836 {
1837 struct lh7a40x_ep *ep = &dev->ep[0];
1838 u32 csr;
1839
1840 /* Set index 0 */
1841 usb_set_index(0);
1842 csr = usb_read(USB_EP0_CSR);
1843
1844 DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
1845
1846 /*
1847 * For overview of what we should be doing see c.f. Chapter 18.1.2.4
1848 * We will follow that outline here modified by our own global state
1849 * indication which provides hints as to what we think should be
1850 * happening..
1851 */
1852
1853 /*
1854 * if SENT_STALL is set
1855 * - clear the SENT_STALL bit
1856 */
1857 if (csr & EP0_SENT_STALL) {
1858 DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
1859 usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
1860 nuke(ep, -ECONNABORTED);
1861 dev->ep0state = WAIT_FOR_SETUP;
1862 return;
1863 }
1864
1865 /*
1866 * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
1867 * - fill EP0 FIFO
1868 * - if last packet
1869 * - set IN_PKT_RDY | DATA_END
1870 * - else
1871 * set IN_PKT_RDY
1872 */
1873 if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
1874 DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
1875 __FUNCTION__);
1876
1877 switch (dev->ep0state) {
1878 case DATA_STATE_XMIT:
1879 DEBUG_EP0("continue with DATA_STATE_XMIT\n");
1880 lh7a40x_ep0_in(dev, csr);
1881 return;
1882 case DATA_STATE_NEED_ZLP:
1883 DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
1884 lh7a40x_ep0_in_zlp(dev, csr);
1885 return;
1886 default:
1887 /* Stall? */
1888 DEBUG_EP0("Odd state!! state = %s\n",
1889 state_names[dev->ep0state]);
1890 dev->ep0state = WAIT_FOR_SETUP;
1891 /* nuke(ep, 0); */
1892 /* usb_set(EP0_SEND_STALL, ep->csr1); */
1893 break;
1894 }
1895 }
1896
1897 /*
1898 * if SETUP_END is set
1899 * - abort the last transfer
1900 * - set SERVICED_SETUP_END_BIT
1901 */
1902 if (csr & EP0_SETUP_END) {
1903 DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
1904
1905 usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
1906
1907 nuke(ep, 0);
1908 dev->ep0state = WAIT_FOR_SETUP;
1909 }
1910
1911 /*
1912 * if EP0_OUT_PKT_RDY is set
1913 * - read data packet from EP0 FIFO
1914 * - decode command
1915 * - if error
1916 * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
1917 * - else
1918 * set SERVICED_OUT_PKT_RDY | DATA_END bits
1919 */
1920 if (csr & EP0_OUT_PKT_RDY) {
1921
1922 DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
1923 csr);
1924
1925 switch (dev->ep0state) {
1926 case WAIT_FOR_SETUP:
1927 DEBUG_EP0("WAIT_FOR_SETUP\n");
1928 lh7a40x_ep0_setup(dev, csr);
1929 break;
1930
1931 case DATA_STATE_RECV:
1932 DEBUG_EP0("DATA_STATE_RECV\n");
1933 lh7a40x_ep0_out(dev, csr);
1934 break;
1935
1936 default:
1937 /* send stall? */
1938 DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
1939 dev->ep0state);
1940 break;
1941 }
1942 }
1943 }
1944
1945 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
1946 {
1947 u32 csr;
1948
1949 usb_set_index(0);
1950 csr = usb_read(USB_EP0_CSR);
1951
1952 DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
1953
1954 /* Clear "out packet ready" */
1955 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1956
1957 if (ep_is_in(ep)) {
1958 dev->ep0state = DATA_STATE_XMIT;
1959 lh7a40x_ep0_in(dev, csr);
1960 } else {
1961 dev->ep0state = DATA_STATE_RECV;
1962 lh7a40x_ep0_out(dev, csr);
1963 }
1964 }
1965
1966 /* ---------------------------------------------------------------------------
1967 * device-scoped parts of the api to the usb controller hardware
1968 * ---------------------------------------------------------------------------
1969 */
1970
1971 static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
1972 {
1973 u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
1974 u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
1975 DEBUG("%s, %p\n", __FUNCTION__, _gadget);
1976 return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
1977 }
1978
1979 static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
1980 {
1981 /* host may not have enabled remote wakeup */
1982 /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
1983 return -EHOSTUNREACH;
1984 udc_set_mask_UDCCR(UDCCR_RSM); */
1985 return -ENOTSUPP;
1986 }
1987
1988 static const struct usb_gadget_ops lh7a40x_udc_ops = {
1989 .get_frame = lh7a40x_udc_get_frame,
1990 .wakeup = lh7a40x_udc_wakeup,
1991 /* current versions must always be self-powered */
1992 };
1993
1994 static void nop_release(struct device *dev)
1995 {
1996 DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
1997 }
1998
1999 static struct lh7a40x_udc memory = {
2000 .usb_address = 0,
2001
2002 .gadget = {
2003 .ops = &lh7a40x_udc_ops,
2004 .ep0 = &memory.ep[0].ep,
2005 .name = driver_name,
2006 .dev = {
2007 .bus_id = "gadget",
2008 .release = nop_release,
2009 },
2010 },
2011
2012 /* control endpoint */
2013 .ep[0] = {
2014 .ep = {
2015 .name = ep0name,
2016 .ops = &lh7a40x_ep_ops,
2017 .maxpacket = EP0_PACKETSIZE,
2018 },
2019 .dev = &memory,
2020
2021 .bEndpointAddress = 0,
2022 .bmAttributes = 0,
2023
2024 .ep_type = ep_control,
2025 .fifo = io_p2v(USB_EP0_FIFO),
2026 .csr1 = USB_EP0_CSR,
2027 .csr2 = USB_EP0_CSR,
2028 },
2029
2030 /* first group of endpoints */
2031 .ep[1] = {
2032 .ep = {
2033 .name = "ep1in-bulk",
2034 .ops = &lh7a40x_ep_ops,
2035 .maxpacket = 64,
2036 },
2037 .dev = &memory,
2038
2039 .bEndpointAddress = USB_DIR_IN | 1,
2040 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2041
2042 .ep_type = ep_bulk_in,
2043 .fifo = io_p2v(USB_EP1_FIFO),
2044 .csr1 = USB_IN_CSR1,
2045 .csr2 = USB_IN_CSR2,
2046 },
2047
2048 .ep[2] = {
2049 .ep = {
2050 .name = "ep2out-bulk",
2051 .ops = &lh7a40x_ep_ops,
2052 .maxpacket = 64,
2053 },
2054 .dev = &memory,
2055
2056 .bEndpointAddress = 2,
2057 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2058
2059 .ep_type = ep_bulk_out,
2060 .fifo = io_p2v(USB_EP2_FIFO),
2061 .csr1 = USB_OUT_CSR1,
2062 .csr2 = USB_OUT_CSR2,
2063 },
2064
2065 .ep[3] = {
2066 .ep = {
2067 .name = "ep3in-int",
2068 .ops = &lh7a40x_ep_ops,
2069 .maxpacket = 64,
2070 },
2071 .dev = &memory,
2072
2073 .bEndpointAddress = USB_DIR_IN | 3,
2074 .bmAttributes = USB_ENDPOINT_XFER_INT,
2075
2076 .ep_type = ep_interrupt,
2077 .fifo = io_p2v(USB_EP3_FIFO),
2078 .csr1 = USB_IN_CSR1,
2079 .csr2 = USB_IN_CSR2,
2080 },
2081 };
2082
2083 /*
2084 * probe - binds to the platform device
2085 */
2086 static int lh7a40x_udc_probe(struct device *_dev)
2087 {
2088 struct lh7a40x_udc *dev = &memory;
2089 int retval;
2090
2091 DEBUG("%s: %p\n", __FUNCTION__, _dev);
2092
2093 spin_lock_init(&dev->lock);
2094 dev->dev = _dev;
2095
2096 device_initialize(&dev->gadget.dev);
2097 dev->gadget.dev.parent = _dev;
2098
2099 the_controller = dev;
2100 dev_set_drvdata(_dev, dev);
2101
2102 udc_disable(dev);
2103 udc_reinit(dev);
2104
2105 /* irq setup after old hardware state is cleaned up */
2106 retval =
2107 request_irq(IRQ_USBINTR, lh7a40x_udc_irq, SA_INTERRUPT, driver_name,
2108 dev);
2109 if (retval != 0) {
2110 DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
2111 IRQ_USBINTR, retval);
2112 return -EBUSY;
2113 }
2114
2115 create_proc_files();
2116
2117 return retval;
2118 }
2119
2120 static int lh7a40x_udc_remove(struct device *_dev)
2121 {
2122 struct lh7a40x_udc *dev = _dev->driver_data;
2123
2124 DEBUG("%s: %p\n", __FUNCTION__, dev);
2125
2126 udc_disable(dev);
2127 remove_proc_files();
2128 usb_gadget_unregister_driver(dev->driver);
2129
2130 free_irq(IRQ_USBINTR, dev);
2131
2132 dev_set_drvdata(_dev, 0);
2133
2134 the_controller = 0;
2135
2136 return 0;
2137 }
2138
2139 /*-------------------------------------------------------------------------*/
2140
2141 static struct device_driver udc_driver = {
2142 .name = (char *)driver_name,
2143 .bus = &platform_bus_type,
2144 .probe = lh7a40x_udc_probe,
2145 .remove = lh7a40x_udc_remove
2146 /* FIXME power management support */
2147 /* .suspend = ... disable UDC */
2148 /* .resume = ... re-enable UDC */
2149 };
2150
2151 static int __init udc_init(void)
2152 {
2153 DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
2154 return driver_register(&udc_driver);
2155 }
2156
2157 static void __exit udc_exit(void)
2158 {
2159 driver_unregister(&udc_driver);
2160 }
2161
2162 module_init(udc_init);
2163 module_exit(udc_exit);
2164
2165 MODULE_DESCRIPTION(DRIVER_DESC);
2166 MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
2167 MODULE_LICENSE("GPL");
CRIS linux kernel tree