2 * Copyright (C) 2008-2009 ST-Ericsson SA
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/amba/bus.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/irqchip.h>
18 #include <linux/irqchip/arm-gic.h>
19 #include <linux/mfd/dbx500-prcmu.h>
20 #include <linux/platform_data/arm-ux500-pm.h>
21 #include <linux/platform_device.h>
24 #include <linux/of_address.h>
25 #include <linux/of_platform.h>
26 #include <linux/regulator/machine.h>
28 #include <asm/outercache.h>
29 #include <asm/hardware/cache-l2x0.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/arch.h>
33 #include "db8500-regs.h"
34 #include "pm_domains.h"
36 static int __init
ux500_l2x0_unlock(void)
39 struct device_node
*np
;
40 void __iomem
*l2x0_base
;
42 np
= of_find_compatible_node(NULL
, NULL
, "arm,pl310-cache");
43 l2x0_base
= of_iomap(np
, 0);
49 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
50 * apparently locks both caches before jumping to the kernel. The
51 * l2x0 core will not touch the unlock registers if the l2x0 is
52 * already enabled, so we do it right here instead. The PL310 has
53 * 8 sets of registers, one per possible CPU.
55 for (i
= 0; i
< 8; i
++) {
56 writel_relaxed(0x0, l2x0_base
+ L2X0_LOCKDOWN_WAY_D_BASE
+
57 i
* L2X0_LOCKDOWN_STRIDE
);
58 writel_relaxed(0x0, l2x0_base
+ L2X0_LOCKDOWN_WAY_I_BASE
+
59 i
* L2X0_LOCKDOWN_STRIDE
);
65 static void ux500_l2c310_write_sec(unsigned long val
, unsigned reg
)
68 * We can't write to secure registers as we are in non-secure
69 * mode, until we have some SMI service available.
74 * FIXME: Should we set up the GPIO domain here?
76 * The problem is that we cannot put the interrupt resources into the platform
77 * device until the irqdomain has been added. Right now, we set the GIC interrupt
78 * domain from init_irq(), then load the gpio driver from
79 * core_initcall(nmk_gpio_init) and add the platform devices from
80 * arch_initcall(customize_machine).
82 * This feels fragile because it depends on the gpio device getting probed
83 * _before_ any device uses the gpio interrupts.
85 static void __init
ux500_init_irq(void)
87 struct device_node
*np
;
91 np
= of_find_compatible_node(NULL
, NULL
, "stericsson,db8500-prcmu");
92 of_address_to_resource(np
, 0, &r
);
95 pr_err("could not find PRCMU base resource\n");
98 prcmu_early_init(r
.start
, r
.end
-r
.start
);
99 ux500_pm_init(r
.start
, r
.end
-r
.start
);
101 /* Unlock before init */
103 outer_cache
.write_sec
= ux500_l2c310_write_sec
;
106 static void ux500_restart(enum reboot_mode mode
, const char *cmd
)
111 prcmu_system_reset(0);
114 static struct of_dev_auxdata u8540_auxdata_lookup
[] __initdata
= {
115 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL
),
119 static const struct of_device_id u8500_local_bus_nodes
[] = {
120 /* only create devices below soc node */
121 { .compatible
= "stericsson,db8500", },
122 { .compatible
= "stericsson,db8500-prcmu", },
123 { .compatible
= "simple-bus"},
127 static void __init
u8500_init_machine(void)
129 /* Initialize ux500 power domains */
130 ux500_pm_domains_init();
132 /* automatically probe child nodes of dbx5x0 devices */
133 if (of_machine_is_compatible("st-ericsson,u8540"))
134 of_platform_populate(NULL
, u8500_local_bus_nodes
,
135 u8540_auxdata_lookup
, NULL
);
138 static const char * stericsson_dt_platform_compat
[] = {
146 DT_MACHINE_START(U8500_DT
, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
149 .init_irq
= ux500_init_irq
,
150 .init_machine
= u8500_init_machine
,
151 .dt_compat
= stericsson_dt_platform_compat
,
152 .restart
= ux500_restart
,