include/uapi/linux/kfd_ioctl.h

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #ifndef KFD_IOCTL_H_INCLUDED
  24 #define KFD_IOCTL_H_INCLUDED
  25
  26 #include <drm/drm.h>
  27 #include <linux/ioctl.h>
  28
  29 #define KFD_IOCTL_MAJOR_VERSION 1
  30 #define KFD_IOCTL_MINOR_VERSION 1
  31
  32 struct kfd_ioctl_get_version_args {
  33         __u32 major_version;    /* from KFD */
  34         __u32 minor_version;    /* from KFD */
  35 };
  36
  37 /* For kfd_ioctl_create_queue_args.queue_type. */
  38 #define KFD_IOC_QUEUE_TYPE_COMPUTE      0
  39 #define KFD_IOC_QUEUE_TYPE_SDMA         1
  40 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL  2
  41
  42 #define KFD_MAX_QUEUE_PERCENTAGE        100
  43 #define KFD_MAX_QUEUE_PRIORITY          15
  44
  45 struct kfd_ioctl_create_queue_args {
  46         __u64 ring_base_address;        /* to KFD */
  47         __u64 write_pointer_address;    /* from KFD */
  48         __u64 read_pointer_address;     /* from KFD */
  49         __u64 doorbell_offset;  /* from KFD */
  50
  51         __u32 ring_size;                /* to KFD */
  52         __u32 gpu_id;           /* to KFD */
  53         __u32 queue_type;               /* to KFD */
  54         __u32 queue_percentage; /* to KFD */
  55         __u32 queue_priority;   /* to KFD */
  56         __u32 queue_id;         /* from KFD */
  57
  58         __u64 eop_buffer_address;       /* to KFD */
  59         __u64 eop_buffer_size;  /* to KFD */
  60         __u64 ctx_save_restore_address; /* to KFD */
  61         __u32 ctx_save_restore_size;    /* to KFD */
  62         __u32 ctl_stack_size;           /* to KFD */
  63 };
  64
  65 struct kfd_ioctl_destroy_queue_args {
  66         __u32 queue_id;         /* to KFD */
  67         __u32 pad;
  68 };
  69
  70 struct kfd_ioctl_update_queue_args {
  71         __u64 ring_base_address;        /* to KFD */
  72
  73         __u32 queue_id;         /* to KFD */
  74         __u32 ring_size;                /* to KFD */
  75         __u32 queue_percentage; /* to KFD */
  76         __u32 queue_priority;   /* to KFD */
  77 };
  78
  79 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
  80 #define KFD_IOC_CACHE_POLICY_COHERENT 0
  81 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
  82
  83 struct kfd_ioctl_set_memory_policy_args {
  84         __u64 alternate_aperture_base;  /* to KFD */
  85         __u64 alternate_aperture_size;  /* to KFD */
  86
  87         __u32 gpu_id;                   /* to KFD */
  88         __u32 default_policy;           /* to KFD */
  89         __u32 alternate_policy;         /* to KFD */
  90         __u32 pad;
  91 };
  92
  93 /*
  94  * All counters are monotonic. They are used for profiling of compute jobs.
  95  * The profiling is done by userspace.
  96  *
  97  * In case of GPU reset, the counter should not be affected.
  98  */
  99
 100 struct kfd_ioctl_get_clock_counters_args {
 101         __u64 gpu_clock_counter;        /* from KFD */
 102         __u64 cpu_clock_counter;        /* from KFD */
 103         __u64 system_clock_counter;     /* from KFD */
 104         __u64 system_clock_freq;        /* from KFD */
 105
 106         __u32 gpu_id;           /* to KFD */
 107         __u32 pad;
 108 };
 109
 110 #define NUM_OF_SUPPORTED_GPUS 7
 111
 112 struct kfd_process_device_apertures {
 113         __u64 lds_base;         /* from KFD */
 114         __u64 lds_limit;                /* from KFD */
 115         __u64 scratch_base;             /* from KFD */
 116         __u64 scratch_limit;            /* from KFD */
 117         __u64 gpuvm_base;               /* from KFD */
 118         __u64 gpuvm_limit;              /* from KFD */
 119         __u32 gpu_id;           /* from KFD */
 120         __u32 pad;
 121 };
 122
 123 struct kfd_ioctl_get_process_apertures_args {
 124         struct kfd_process_device_apertures
 125                         process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
 126
 127         /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
 128         __u32 num_of_nodes;
 129         __u32 pad;
 130 };
 131
 132 #define MAX_ALLOWED_NUM_POINTS    100
 133 #define MAX_ALLOWED_AW_BUFF_SIZE 4096
 134 #define MAX_ALLOWED_WAC_BUFF_SIZE  128
 135
 136 struct kfd_ioctl_dbg_register_args {
 137         __u32 gpu_id;           /* to KFD */
 138         __u32 pad;
 139 };
 140
 141 struct kfd_ioctl_dbg_unregister_args {
 142         __u32 gpu_id;           /* to KFD */
 143         __u32 pad;
 144 };
 145
 146 struct kfd_ioctl_dbg_address_watch_args {
 147         __u64 content_ptr;              /* a pointer to the actual content */
 148         __u32 gpu_id;           /* to KFD */
 149         __u32 buf_size_in_bytes;        /*including gpu_id and buf_size */
 150 };
 151
 152 struct kfd_ioctl_dbg_wave_control_args {
 153         __u64 content_ptr;              /* a pointer to the actual content */
 154         __u32 gpu_id;           /* to KFD */
 155         __u32 buf_size_in_bytes;        /*including gpu_id and buf_size */
 156 };
 157
 158 /* Matching HSA_EVENTTYPE */
 159 #define KFD_IOC_EVENT_SIGNAL                    0
 160 #define KFD_IOC_EVENT_NODECHANGE                1
 161 #define KFD_IOC_EVENT_DEVICESTATECHANGE         2
 162 #define KFD_IOC_EVENT_HW_EXCEPTION              3
 163 #define KFD_IOC_EVENT_SYSTEM_EVENT              4
 164 #define KFD_IOC_EVENT_DEBUG_EVENT               5
 165 #define KFD_IOC_EVENT_PROFILE_EVENT             6
 166 #define KFD_IOC_EVENT_QUEUE_EVENT               7
 167 #define KFD_IOC_EVENT_MEMORY                    8
 168
 169 #define KFD_IOC_WAIT_RESULT_COMPLETE            0
 170 #define KFD_IOC_WAIT_RESULT_TIMEOUT             1
 171 #define KFD_IOC_WAIT_RESULT_FAIL                2
 172
 173 #define KFD_SIGNAL_EVENT_LIMIT                  4096
 174
 175 struct kfd_ioctl_create_event_args {
 176         __u64 event_page_offset;        /* from KFD */
 177         __u32 event_trigger_data;       /* from KFD - signal events only */
 178         __u32 event_type;               /* to KFD */
 179         __u32 auto_reset;               /* to KFD */
 180         __u32 node_id;          /* to KFD - only valid for certain
 181                                                         event types */
 182         __u32 event_id;         /* from KFD */
 183         __u32 event_slot_index; /* from KFD */
 184 };
 185
 186 struct kfd_ioctl_destroy_event_args {
 187         __u32 event_id;         /* to KFD */
 188         __u32 pad;
 189 };
 190
 191 struct kfd_ioctl_set_event_args {
 192         __u32 event_id;         /* to KFD */
 193         __u32 pad;
 194 };
 195
 196 struct kfd_ioctl_reset_event_args {
 197         __u32 event_id;         /* to KFD */
 198         __u32 pad;
 199 };
 200
 201 struct kfd_memory_exception_failure {
 202         __u32 NotPresent;       /* Page not present or supervisor privilege */
 203         __u32 ReadOnly; /* Write access to a read-only page */
 204         __u32 NoExecute;        /* Execute access to a page marked NX */
 205         __u32 pad;
 206 };
 207
 208 /* memory exception data*/
 209 struct kfd_hsa_memory_exception_data {
 210         struct kfd_memory_exception_failure failure;
 211         __u64 va;
 212         __u32 gpu_id;
 213         __u32 pad;
 214 };
 215
 216 /* Event data*/
 217 struct kfd_event_data {
 218         union {
 219                 struct kfd_hsa_memory_exception_data memory_exception_data;
 220         };                              /* From KFD */
 221         __u64 kfd_event_data_ext;       /* pointer to an extension structure
 222                                            for future exception types */
 223         __u32 event_id;         /* to KFD */
 224         __u32 pad;
 225 };
 226
 227 struct kfd_ioctl_wait_events_args {
 228         __u64 events_ptr;               /* pointed to struct
 229                                            kfd_event_data array, to KFD */
 230         __u32 num_events;               /* to KFD */
 231         __u32 wait_for_all;             /* to KFD */
 232         __u32 timeout;          /* to KFD */
 233         __u32 wait_result;              /* from KFD */
 234 };
 235
 236 struct kfd_ioctl_set_scratch_backing_va_args {
 237         __u64 va_addr;  /* to KFD */
 238         __u32 gpu_id;   /* to KFD */
 239         __u32 pad;
 240 };
 241
 242 struct kfd_ioctl_get_tile_config_args {
 243         /* to KFD: pointer to tile array */
 244         __u64 tile_config_ptr;
 245         /* to KFD: pointer to macro tile array */
 246         __u64 macro_tile_config_ptr;
 247         /* to KFD: array size allocated by user mode
 248          * from KFD: array size filled by kernel
 249          */
 250         __u32 num_tile_configs;
 251         /* to KFD: array size allocated by user mode
 252          * from KFD: array size filled by kernel
 253          */
 254         __u32 num_macro_tile_configs;
 255
 256         __u32 gpu_id;           /* to KFD */
 257         __u32 gb_addr_config;   /* from KFD */
 258         __u32 num_banks;                /* from KFD */
 259         __u32 num_ranks;                /* from KFD */
 260         /* struct size can be extended later if needed
 261          * without breaking ABI compatibility
 262          */
 263 };
 264
 265 struct kfd_ioctl_set_trap_handler_args {
 266         uint64_t tba_addr;              /* to KFD */
 267         uint64_t tma_addr;              /* to KFD */
 268         uint32_t gpu_id;                /* to KFD */
 269         uint32_t pad;
 270 };
 271
 272 #define AMDKFD_IOCTL_BASE 'K'
 273 #define AMDKFD_IO(nr)                   _IO(AMDKFD_IOCTL_BASE, nr)
 274 #define AMDKFD_IOR(nr, type)            _IOR(AMDKFD_IOCTL_BASE, nr, type)
 275 #define AMDKFD_IOW(nr, type)            _IOW(AMDKFD_IOCTL_BASE, nr, type)
 276 #define AMDKFD_IOWR(nr, type)           _IOWR(AMDKFD_IOCTL_BASE, nr, type)
 277
 278 #define AMDKFD_IOC_GET_VERSION                  \
 279                 AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
 280
 281 #define AMDKFD_IOC_CREATE_QUEUE                 \
 282                 AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
 283
 284 #define AMDKFD_IOC_DESTROY_QUEUE                \
 285                 AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
 286
 287 #define AMDKFD_IOC_SET_MEMORY_POLICY            \
 288                 AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
 289
 290 #define AMDKFD_IOC_GET_CLOCK_COUNTERS           \
 291                 AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
 292
 293 #define AMDKFD_IOC_GET_PROCESS_APERTURES        \
 294                 AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
 295
 296 #define AMDKFD_IOC_UPDATE_QUEUE                 \
 297                 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
 298
 299 #define AMDKFD_IOC_CREATE_EVENT                 \
 300                 AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
 301
 302 #define AMDKFD_IOC_DESTROY_EVENT                \
 303                 AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
 304
 305 #define AMDKFD_IOC_SET_EVENT                    \
 306                 AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
 307
 308 #define AMDKFD_IOC_RESET_EVENT                  \
 309                 AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
 310
 311 #define AMDKFD_IOC_WAIT_EVENTS                  \
 312                 AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
 313
 314 #define AMDKFD_IOC_DBG_REGISTER                 \
 315                 AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
 316
 317 #define AMDKFD_IOC_DBG_UNREGISTER               \
 318                 AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
 319
 320 #define AMDKFD_IOC_DBG_ADDRESS_WATCH            \
 321                 AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
 322
 323 #define AMDKFD_IOC_DBG_WAVE_CONTROL             \
 324                 AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
 325
 326 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA       \
 327                 AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
 328
 329 #define AMDKFD_IOC_GET_TILE_CONFIG                                      \
 330                 AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
 331
 332 #define AMDKFD_IOC_SET_TRAP_HANDLER             \
 333                 AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
 334
 335 #define AMDKFD_COMMAND_START            0x01
 336 #define AMDKFD_COMMAND_END              0x14
 337
 338 #endif