The LDT fixes in particular fix some potentially random strange behaviour.
[davej-history.git] / drivers / net / hydra.c
bloba840222afaa5adefd6831b763955c78f4a29d30b
1 /* Linux/68k Hydra Amiganet board driver v2.1 BETA */
2 /* copyleft by Topi Kanerva (topi@susanna.oulu.fi) */
3 /* also some code & lots of fixes by Timo Rossi (trossi@cc.jyu.fi) */
5 /* The code is mostly based on the linux/68k Ariadne driver */
6 /* copyrighted by Geert Uytterhoeven (geert@linux-m68k.org) */
7 /* and Peter De Schrijver (Peter.DeSchrijver@linux.cc.kuleuven.ac.be) */
9 /* This file is subject to the terms and conditions of the GNU General */
10 /* Public License. See the file COPYING in the main directory of the */
11 /* Linux distribution for more details. */
13 /* The Amiganet is a Zorro-II board made by Hydra Systems. It contains a */
14 /* NS8390 NIC (network interface controller) clone, 16 or 64K on-board RAM */
15 /* and 10BASE-2 (thin coax) and AUI connectors. */
16 /* */
17 /* Changes */
18 /* Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 08/06/2000 */
19 /* - check init_etherdev in hydra_probe */
20 /* - dev->priv is already zeroed by init_etherdev */
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/malloc.h>
31 #include <linux/interrupt.h>
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <linux/init.h>
37 #include <asm/bitops.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
41 #include <asm/amigaints.h>
42 #include <asm/amigahw.h>
43 #include <linux/zorro.h>
45 #include "hydra.h"
48 #define HYDRA_DEBUG
49 #undef HAVE_MULTICAST
51 #define HYDRA_VERSION "v2.1 BETA"
53 #undef HYDRA_DEBUG /* define this for (lots of) debugging information */
55 #if 0 /* currently hardwired to one transmit buffer */
56 #define TX_RING_SIZE 5
57 #define RX_RING_SIZE 16
58 #else
59 #define TX_RING_SIZE 1
60 #define RX_RING_SIZE 8
61 #endif
63 #define ETHER_MIN_LEN 64
64 #define ETHER_MAX_LEN 1518
65 #define ETHER_ADDR_LEN 6
69 * let's define here nice macros for writing and reading NIC registers
71 * the CIA accesses here are uses to make sure the minimum time
72 * requirement between NIC chip selects is met.
74 #define WRITE_REG(reg, val) (ciaa.pra, ((u8)(*(nicbase+(reg))=val)))
75 #define READ_REG(reg) (ciaa.pra, ((u8)(*(nicbase+(reg)))))
77 /* mask value for the interrupts we use */
78 #define NIC_INTS (ISR_PRX | ISR_PTX | ISR_RXE | ISR_TXE | ISR_OVW | ISR_CNT)
80 /* only broadcasts, no promiscuous mode for now */
81 #define NIC_RCRBITS (0)
84 * Private Device Data
86 struct hydra_private
88 u16 tx_page_start;
89 u16 rx_page_start;
90 u16 rx_page_stop;
91 u16 next_pkt;
92 struct net_device_stats stats;
95 static int hydra_open(struct net_device *dev);
96 static int hydra_start_xmit(struct sk_buff *skb, struct net_device *dev);
97 static void hydra_interrupt(int irq, void *data, struct pt_regs *fp);
98 static void __inline__ hydra_rx(struct net_device *dev, struct hydra_private *priv, volatile u8 *nicbase);
99 static int hydra_close(struct net_device *dev);
100 static struct net_device_stats *hydra_get_stats(struct net_device *dev);
101 #ifdef HAVE_MULTICAST
102 static void set_multicast_list(struct net_device *dev, int num_addrs, void *addrs);
103 #endif
106 /* this is now coherent with the C version below, */
107 /* compile the source with -D__USE_ASM__ if you */
108 /* want it - it'll only be some 10% faster though */
110 #if defined (__GNUC__) && defined (__mc68000__) && defined (USE_ASM)
112 static __inline__ void *memcpyw(u16 *dest, u16 *src, int len)
114 __asm__(" move.l %0,%/a1; move.l %1,%/a0; move.l %2,%/d0 \n\t"
115 " cmpi.l #2,%/d0 \n\t"
116 "1: bcs.s 2f \n\t"
117 " move.w %/a0@+,%/a1@+ \n\t"
118 " subq.l #2,%/d0 \n\t"
119 " bra.s 1b \n\t"
120 "2: cmpi.l #1,%/d0 \n\t"
121 " bne.s 3f \n\t"
122 " move.w %/a0@,%/d0 \n\t"
123 " swap.w %/d0 \n\t"
124 " move.b %/d0,%/a1@ \n\t"
125 "3: moveq #0,%/d0 \n\t"
127 : "g" (dest), "g" (src), "g" (len)
128 : "a1", "a0", "d0");
129 return;
132 #else
134 /* hydra memory can only be read or written as words or longwords. */
135 /* that will mean that we'll have to write a special memcpy for it. */
136 /* this one here relies on the fact that _writes_ to hydra memory */
137 /* are guaranteed to be of even length. (reads can be arbitrary) */
140 * FIXME: Surely we should be using the OS generic stuff and do
142 * memcpy(dest,src,(len+1)&~1);
144 * Can a 68K guy with this card check that ? - better yet
145 * use a copy/checksum on it.
148 static void memcpyw(u16 *dest, u16 *src, int len)
150 if(len & 1)
151 len++;
153 while (len >= 2)
155 *(dest++) = *(src++);
156 len -= 2;
160 #endif
162 int __init hydra_probe(struct net_device *dev)
164 struct zorro_dev *z = NULL;
165 int j;
167 #ifdef HYDRA_DEBUG
168 printk("hydra_probe(%x)\n", dev);
169 #endif
171 while ((z = zorro_find_device(ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET, z))) {
172 unsigned long board = z->resource.start;
173 unsigned long base_addr = board+HYDRA_NIC_BASE;
175 if (!request_mem_region(base_addr, 0x20, "NS8390"))
176 continue;
177 if (!request_mem_region(board, 0x4000, "RAM")) {
178 release_mem_region(base_addr, 0x20);
179 continue;
182 dev = init_etherdev(NULL, sizeof(struct hydra_private));
184 if (!dev) {
185 release_mem_region(base_addr, 0x20);
186 release_mem_region(board, 0x4000);
187 continue;
189 SET_MODULE_OWNER(dev);
191 for(j = 0; j < ETHER_ADDR_LEN; j++)
192 dev->dev_addr[j] = *((u8 *)ZTWO_VADDR(board + HYDRA_ADDRPROM + 2*j));
194 printk("%s: hydra at 0x%08x, address %02x:%02x:%02x:%02x:%02x:%02x (hydra.c " HYDRA_VERSION ")\n",
195 dev->name, (int)board, dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
196 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
198 dev->base_addr = ZTWO_VADDR(base_addr);
199 dev->mem_start = ZTWO_VADDR(board);
200 dev->mem_end = dev->mem_start+0x4000;
202 dev->open = &hydra_open;
203 dev->stop = &hydra_close;
204 dev->hard_start_xmit = &hydra_start_xmit;
205 dev->get_stats = &hydra_get_stats;
206 #ifdef HAVE_MULTICAST
207 dev->set_multicast_list = &set_multicast_list;
208 #endif
211 * Cannot yet do multicast
213 dev->flags&=~IFF_MULTICAST;
214 return(0);
216 return(-ENODEV);
220 static int hydra_open(struct net_device *dev)
222 struct hydra_private *priv = (struct hydra_private *)dev->priv;
223 volatile u8 *nicbase = (u8 *)dev->base_addr;
224 int i;
226 #ifdef HYDRA_DEBUG
227 printk("hydra_open(0x%x)\n", dev);
228 #endif
230 /* first, initialize the private structure */
231 priv->tx_page_start = 0; /* these are 256 byte buffers for NS8390 */
232 priv->rx_page_start = 6;
233 priv->rx_page_stop = 62; /* these values are hard coded for now */
235 /* Reset the NS8390 NIC */
236 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
238 /* be sure that the NIC is in stopped state */
239 while(!(READ_REG(NIC_ISR) & ISR_RST));
241 /* word transfer, big endian bytes, loopback, FIFO threshold 4 bytes */
242 WRITE_REG(NIC_DCR, DCR_WTS | DCR_BOS | DCR_LS | DCR_FT0);
244 /* clear remote byte count registers */
245 WRITE_REG(NIC_RBCR0, 0);
246 WRITE_REG(NIC_RBCR1, 0);
248 /* accept packets addressed to this card and also broadcast packets */
249 WRITE_REG(NIC_RCR, NIC_RCRBITS);
251 /* enable loopback mode 1 */
252 WRITE_REG(NIC_TCR, TCR_LB1);
254 /* initialize receive buffer ring */
255 WRITE_REG(NIC_PSTART, priv->rx_page_start);
256 WRITE_REG(NIC_PSTOP, priv->rx_page_stop);
257 WRITE_REG(NIC_BNDRY, priv->rx_page_start);
259 /* clear interrupts */
260 WRITE_REG(NIC_ISR, 0xff);
262 /* enable interrupts */
263 WRITE_REG(NIC_IMR, NIC_INTS);
265 /* set the ethernet hardware address */
266 WRITE_REG(NIC_CR, CR_PAGE1 | CR_NODMA | CR_STOP); /* goto page 1 */
268 WRITE_REG(NIC_PAR0, dev->dev_addr[0]);
269 WRITE_REG(NIC_PAR1, dev->dev_addr[1]);
270 WRITE_REG(NIC_PAR2, dev->dev_addr[2]);
271 WRITE_REG(NIC_PAR3, dev->dev_addr[3]);
272 WRITE_REG(NIC_PAR4, dev->dev_addr[4]);
273 WRITE_REG(NIC_PAR5, dev->dev_addr[5]);
275 /* clear multicast hash table */
276 for(i = 0; i < 8; i++)
277 WRITE_REG(NIC_MAR0 + 2*i, 0);
279 priv->next_pkt = priv->rx_page_start+1; /* init our s/w variable */
280 WRITE_REG(NIC_CURR, priv->next_pkt); /* set the next buf for current */
282 /* goto page 0, start NIC */
283 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
285 /* take interface out of loopback */
286 WRITE_REG(NIC_TCR, 0);
288 netif_start_queue(dev);
290 i = request_irq(IRQ_AMIGA_PORTS, hydra_interrupt, SA_SHIRQ,
291 dev->name, dev);
292 if (i) return i;
294 return(0);
298 static int hydra_close(struct net_device *dev)
300 struct hydra_private *priv = (struct hydra_private *)dev->priv;
301 volatile u8 *nicbase = (u8 *)dev->base_addr;
302 int n = 5000;
304 netif_stop_queue(dev);
306 #ifdef HYDRA_DEBUG
307 printk("%s: Shutting down ethercard\n", dev->name);
308 printk("%s: %d packets missed\n", dev->name, priv->stats.rx_missed_errors);
309 #endif
311 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
313 /* wait for NIC to stop (what a nice timeout..) */
314 while(((READ_REG(NIC_ISR) & ISR_RST) == 0) && --n);
316 free_irq(IRQ_AMIGA_PORTS, dev);
318 return(0);
322 static void hydra_interrupt(int irq, void *data, struct pt_regs *fp)
324 volatile u8 *nicbase;
326 struct net_device *dev = (struct net_device *) data;
327 struct hydra_private *priv;
328 u16 intbits;
330 if(dev == NULL)
332 printk("hydra_interrupt(): irq for unknown device\n");
333 return;
336 /* this is not likely a problem - i think */
337 if(dev->interrupt)
338 printk("%s: re-entering the interrupt handler\n", dev->name);
340 dev->interrupt = 1;
342 priv = (struct hydra_private *) dev->priv;
343 nicbase = (u8 *)dev->base_addr;
345 /* select page 0 */
346 WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
348 intbits = READ_REG(NIC_ISR) & NIC_INTS;
349 if(intbits == 0)
351 dev->interrupt = 0;
352 return;
355 /* acknowledge all interrupts, by clearing the interrupt flag */
356 WRITE_REG(NIC_ISR, intbits);
358 if((intbits & ISR_PTX) && !(intbits & ISR_TXE))
360 dev->tbusy = 0;
361 mark_bh(NET_BH);
364 if((intbits & ISR_PRX) && !(intbits & ISR_RXE))/* packet received OK */
365 hydra_rx(dev, priv, nicbase);
367 if(intbits & ISR_TXE)
368 priv->stats.tx_errors++;
370 if(intbits & ISR_RXE)
371 priv->stats.rx_errors++;
373 if(intbits & ISR_CNT)
376 * read the tally counters and (currently) ignore the values
377 * might be useful because of bugs of some versions of the 8390 NIC
379 #ifdef HYDRA_DEBUG
380 printk("hydra_interrupt(): ISR_CNT\n");
381 #endif
382 (void)READ_REG(NIC_CNTR0);
383 (void)READ_REG(NIC_CNTR1);
384 (void)READ_REG(NIC_CNTR2);
387 if(intbits & ISR_OVW)
389 #ifdef HYDRA_DEBUG
390 WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
391 /* another one just too much for me to comprehend - basically this could */
392 /* only occur because of invalid access to hydra ram, thus invalidating */
393 /* the interrupt bits read - in average usage these do not occur at all */
394 printk("hydra_interrupt(): overwrite warning, NIC_ISR %02x, NIC_CURR %02x\n",
395 intbits, READ_REG(NIC_CURR));
396 WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
397 #endif
400 /* overwrite warning occurred, stop NIC & check the BOUNDARY pointer */
401 /* FIXME - real overwrite handling needed !! */
403 printk("hydra_interrupt(): overwrite warning, resetting NIC\n");
404 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
405 while(!(READ_REG(NIC_ISR) & ISR_RST));
406 /* wait for NIC to reset */
407 WRITE_REG(NIC_DCR, DCR_WTS | DCR_BOS | DCR_LS | DCR_FT0);
408 WRITE_REG(NIC_RBCR0, 0);
409 WRITE_REG(NIC_RBCR1, 0);
410 WRITE_REG(NIC_RCR, NIC_RCRBITS);
411 WRITE_REG(NIC_TCR, TCR_LB1);
412 WRITE_REG(NIC_PSTART, priv->rx_page_start);
413 WRITE_REG(NIC_PSTOP, priv->rx_page_stop);
414 WRITE_REG(NIC_BNDRY, priv->rx_page_start);
415 WRITE_REG(NIC_ISR, 0xff);
416 WRITE_REG(NIC_IMR, NIC_INTS);
417 /* currently this _won't_ reset my hydra, even though it is */
418 /* basically the same code as in the board init - any ideas? */
420 priv->next_pkt = priv->rx_page_start+1; /* init our s/w variable */
421 WRITE_REG(NIC_CURR, priv->next_pkt); /* set the next buf for current */
423 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
425 WRITE_REG(NIC_TCR, 0);
428 dev->interrupt = 0;
429 return;
434 * packet transmit routine
437 static int hydra_start_xmit(struct sk_buff *skb, struct net_device *dev)
439 struct hydra_private *priv = (struct hydra_private *)dev->priv;
440 volatile u8 *nicbase = (u8 *)dev->base_addr;
441 int len, len1;
443 /* Transmitter timeout, serious problems. */
445 if(dev->tbusy)
447 int tickssofar = jiffies - dev->trans_start;
448 if(tickssofar < 20)
449 return(1);
450 WRITE_REG(NIC_CR, CR_STOP);
451 printk("%s: transmit timed out, status %4.4x, resetting.\n", dev->name, 0);
452 priv->stats.tx_errors++;
453 dev->tbusy = 0;
454 dev->trans_start = jiffies;
455 return(0);
458 len=skb->len;
460 /* fill in a tx ring entry */
462 #ifdef HYDRA_DEBUG
463 printk("TX pkt type 0x%04x from ", ((u16 *)skb->data)[6]);
465 int i;
466 u8 *ptr = &((u8 *)skb->data)[6];
467 for (i = 0; i < 6; i++)
468 printk("%02x", ptr[i]);
470 printk(" to ");
472 int i;
473 u8 *ptr = (u8 *)skb->data;
474 for (i = 0; i < 6; i++)
475 printk("%02x", ptr[i]);
477 printk(" data 0x%08x len %d\n", (int)skb->data, len);
478 #endif
481 * make sure that the packet size is at least the minimum
482 * allowed ethernet packet length.
483 * (FIXME: Should also clear the unused space...)
484 * note: minimum packet length is 64, including CRC
486 len1 = len;
488 if(len < (ETHER_MIN_LEN-4))
489 len = (ETHER_MIN_LEN-1);
491 /* make sure we've got an even number of bytes to copy to hydra's mem */
492 if(len & 1) len++;
494 if((u32)(dev->mem_start + (priv->tx_page_start << 8)) < 0x80000000)
495 printk("weirdness: memcpyw(txbuf, skbdata, len): txbuf = 0x%x\n", (u_int)(dev->mem_start+(priv->tx_page_start<<8)));
497 /* copy the packet data to the transmit buffer
498 in the ethernet card RAM */
499 memcpyw((u16 *)(dev->mem_start + (priv->tx_page_start << 8)),
500 (u16 *)skb->data, len);
501 /* clear the unused space */
502 for(; len1<len; len1++)
503 (u16)*((u8 *)dev->mem_start + (priv->tx_page_start<<8) + len1)
504 = 0;
505 dev_kfree_skb(skb);
507 priv->stats.tx_packets++;
509 cli();
510 /* make sure we are on the correct page */
511 WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
513 /* here we configure the transmit page start register etc */
514 /* notice that this code is hardwired to one transmit buffer */
515 WRITE_REG(NIC_TPSR, priv->tx_page_start);
516 WRITE_REG(NIC_TBCR0, len & 0xff);
517 WRITE_REG(NIC_TBCR1, len >> 8);
519 /* commit the packet to the wire */
520 WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA | CR_TXP);
521 sti();
523 dev->trans_start = jiffies;
525 return(0);
529 static void __inline__ hydra_rx(struct net_device *dev, struct hydra_private *priv, volatile u8 *nicbase)
531 volatile u16 *board_ram_ptr;
532 struct sk_buff *skb;
533 int hdr_next_pkt, pkt_len, len1, boundary;
536 /* remove packet(s) from the ring and commit them to TCP layer */
537 WRITE_REG(NIC_CR, CR_PAGE1 | CR_NODMA | CR_START); /* page 1 */
538 while(priv->next_pkt != READ_REG(NIC_CURR)) /* should read this only once? */
540 board_ram_ptr = (u16 *)(dev->mem_start + (priv->next_pkt << 8));
542 #ifdef HYDRA_DEBUG
543 printk("next_pkt = 0x%x, board_ram_ptr = 0x%x\n", priv->next_pkt, board_ram_ptr);
544 #endif
546 /* the following must be done with two steps, or
547 GCC optimizes it to a byte access to Hydra memory,
548 which doesn't work... */
549 hdr_next_pkt = board_ram_ptr[0];
550 hdr_next_pkt >>= 8;
552 pkt_len = board_ram_ptr[1];
553 pkt_len = ((pkt_len >> 8) | ((pkt_len & 0xff) << 8));
555 #ifdef HYDRA_DEBUG
556 printk("hydra_interrupt(): hdr_next_pkt = 0x%02x, len = %d\n", hdr_next_pkt, pkt_len);
557 #endif
559 if(pkt_len >= ETHER_MIN_LEN && pkt_len <= ETHER_MAX_LEN)
561 /* note that board_ram_ptr is u16 */
562 /* CRC is not included in the packet length */
564 pkt_len -= 4;
565 skb = dev_alloc_skb(pkt_len+2);
566 if(skb == NULL)
568 printk(KERN_INFO "%s: memory squeeze, dropping packet.\n", dev->name);
569 priv->stats.rx_dropped++;
571 else
573 skb->dev = dev;
574 skb_reserve(skb, 2);
575 if(hdr_next_pkt < priv->next_pkt && hdr_next_pkt != priv->rx_page_start)
577 /* here, the packet is wrapped */
578 len1 = ((priv->rx_page_stop - priv->next_pkt)<<8)-4;
580 memcpyw((u16 *)skb_put(skb, len1), (u16 *)(board_ram_ptr+2), len1);
581 memcpyw((u16 *)skb_put(skb, pkt_len-len1), (u16 *)(dev->mem_start+(priv->rx_page_start<<8)), pkt_len-len1);
583 #ifdef HYDRA_DEBUG
584 printk("wrapped packet: %d/%d bytes\n", len1, pkt_len-len1);
585 #endif
586 } /* ... here, packet is not wrapped */
587 else
588 memcpyw((u16 *) skb_put(skb, pkt_len), (u16 *)(board_ram_ptr+2), pkt_len);
591 else
593 WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
594 printk("hydra_interrupt(): invalid packet len: %d, NIC_CURR = %02x\n", pkt_len, READ_REG(NIC_CURR));
596 this is the error i kept getting until i switched to 0.9.10. it still doesn't
597 mean that the bug would have gone away - so be alarmed. the packet is likely
598 being fetched from a wrong memory location - but why - dunno
600 note-for-v2.1: not really problem anymore. hasn't been for a long time.
603 WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
604 /* should probably reset the NIC here ?? */
606 hydra_open(dev); /* FIXME - i shouldn't really be doing this. */
607 return;
610 /* now, update the next_pkt pointer */
611 if(hdr_next_pkt < priv->rx_page_stop)
612 priv->next_pkt = hdr_next_pkt;
613 else
614 printk("hydra_interrupt(): invalid next_pkt pointer %d\n", hdr_next_pkt);
616 /* update the boundary pointer */
617 boundary = priv->next_pkt - 1;
618 if(boundary < priv->rx_page_start)
619 boundary = priv->rx_page_stop - 1;
621 /* set NIC to page 0 to update the NIC_BNDRY register */
622 WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
623 WRITE_REG(NIC_BNDRY, boundary);
625 /* select page1 to access the NIC_CURR register */
626 WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
629 skb->protocol = eth_type_trans(skb, dev);
630 netif_rx(skb);
631 priv->stats.rx_packets++;
634 return;
638 static struct net_device_stats *hydra_get_stats(struct net_device *dev)
640 struct hydra_private *priv = (struct hydra_private *)dev->priv;
641 #if 0
642 u8 *board = (u8 *)dev->mem_start;
644 short saved_addr;
645 #endif
646 /* currently does nothing :) i'll finish this later */
648 return(&priv->stats);
651 #ifdef HAVE_MULTICAST
652 static void set_multicast_list(struct net_device *dev, int num_addrs, void *addrs)
654 struct hydra_private *priv = (struct hydra_private *)dev->priv;
655 u8 *board = (u8 *)dev->mem_start;
657 /* yes, this code is also waiting for someone to complete.. :) */
658 /* (personally i don't care about multicasts at all :) */
659 return;
661 #endif
664 #ifdef MODULE
665 static struct net_device hydra_dev;
667 int init_module(void)
669 int err;
671 hydra_dev.init = hydra_probe;
672 if ((err = register_netdev(&hydra_dev))) {
673 if (err == -EIO)
674 printk("No Hydra board found. Module not loaded.\n");
675 return(err);
677 return(0);
680 void cleanup_module(void)
682 struct hydra_private *priv = (struct hydra_private *)hydra_dev.priv;
684 unregister_netdev(&hydra_dev);
685 release_mem_region(ZTWO_PADDR(hydra_dev.base_addr), 0x20);
686 release_mem_region(ZTWO_PADDR(hydra_dev.mem_start), 0x4000);
687 kfree(priv);
690 #endif /* MODULE */