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Ok. I didn't make 2.4.0 in 2000. Tough. I tried, but we had some
[davej-history.git] / drivers / atm / fore200e.c
blob4d51e762b2c264c02f401ed9744c8945b0cb74de
1 /*
2 $Id: fore200e.c,v 1.5 2000/04/14 10:10:34 davem Exp $
3
4 A FORE Systems 200E-series driver for ATM on Linux.
5 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2000.
6
7 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
8
9 This driver simultaneously supports PCA-200E and SBA-200E adapters
10 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27
28 #include <linux/version.h>
29 #include <linux/config.h>
30 #include <linux/kernel.h>
31 #include <linux/malloc.h>
32 #include <linux/init.h>
33 #include <linux/capability.h>
34 #include <linux/sched.h>
35 #include <linux/interrupt.h>
36 #include <linux/bitops.h>
37 #include <linux/atmdev.h>
38 #include <linux/sonet.h>
39 #include <linux/atm_suni.h>
40 #include <asm/io.h>
41 #include <asm/string.h>
42 #include <asm/segment.h>
43 #include <asm/page.h>
44 #include <asm/irq.h>
45 #include <asm/dma.h>
46 #include <asm/byteorder.h>
47 #include <asm/uaccess.h>
48 #include <asm/atomic.h>
49 #include <linux/pci.h>
50
51 #ifdef CONFIG_ATM_FORE200E_SBA
52 #include <asm/idprom.h>
53 #include <asm/sbus.h>
54 #include <asm/openprom.h>
55 #include <asm/oplib.h>
56 #include <asm/pgtable.h>
57 #endif
58
59 #include <linux/module.h>
60
61 #include "fore200e.h"
62 #include "suni.h"
63
64 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs used by atmdump-like apps */
65 #define FORE200E_52BYTE_AAL0_SDU
66 #endif
67
68 #define FORE200E_VERSION "0.2d"
69
70
71 #define FORE200E "fore200e: "
72
73 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
74 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
75 printk(FORE200E format, ##args); } while(0)
76 #else
77 #define DPRINTK(level, format, args...) while(0)
78 #endif
79
80
81 #define FORE200E_ALIGN(addr, alignment) \
82 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
83
84 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
85
86 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
87
88 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
89
90
91 #define MSECS(ms) (((ms)*HZ/1000)+1)
92
93
94 extern const struct atmdev_ops fore200e_ops;
95 extern const struct fore200e_bus fore200e_bus[];
96
97 static struct fore200e* fore200e_boards = NULL;
98
99
100 #ifdef MODULE
101 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
102 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
103 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
104 #endif
105
106
107 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
108 { BUFFER_S1_NBR, BUFFER_L1_NBR },
109 { BUFFER_S2_NBR, BUFFER_L2_NBR }
110 };
111
112 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
113 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
114 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
115 };
116
117
118 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
119 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
120 #endif
121
122
123 #if 0 /* currently unused */
124 static int
125 fore200e_fore2atm_aal(enum fore200e_aal aal)
126 {
127 switch(aal) {
128 case FORE200E_AAL0: return ATM_AAL0;
129 case FORE200E_AAL34: return ATM_AAL34;
130 case FORE200E_AAL5: return ATM_AAL5;
131 }
132
133 return -EINVAL;
134 }
135 #endif
136
137
138 static enum fore200e_aal
139 fore200e_atm2fore_aal(int aal)
140 {
141 switch(aal) {
142 case ATM_AAL0: return FORE200E_AAL0;
143 case ATM_AAL34: return FORE200E_AAL34;
144 case ATM_AAL1:
145 case ATM_AAL2:
146 case ATM_AAL5: return FORE200E_AAL5;
147 }
148
149 return -EINVAL;
150 }
151
152
153 static char*
154 fore200e_irq_itoa(int irq)
155 {
156 #if defined(__sparc_v9__)
157 return __irq_itoa(irq);
158 #else
159 static char str[8];
160 sprintf(str, "%d", irq);
161 return str;
162 #endif
163 }
164
165
166 static void*
167 fore200e_kmalloc(int size, int flags)
168 {
169 void* chunk = kmalloc(size, flags);
170
171 if (chunk)
172 memset(chunk, 0x00, size);
173 else
174 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
175
176 return chunk;
177 }
178
179
180 static void
181 fore200e_kfree(void* chunk)
182 {
183 kfree(chunk);
184 }
185
186
187 /* allocate and align a chunk of memory intended to hold the data behing exchanged
188 between the driver and the adapter (using streaming DVMA) */
189
190 static int
191 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
192 {
193 unsigned long offset = 0;
194
195 if (alignment <= sizeof(int))
196 alignment = 0;
197
198 chunk->alloc_size = size + alignment;
199 chunk->align_size = size;
200 chunk->direction = direction;
201
202 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
203 if (chunk->alloc_addr == NULL)
204 return -ENOMEM;
205
206 if (alignment > 0)
207 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
208
209 chunk->align_addr = chunk->alloc_addr + offset;
210
211 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
212
213 return 0;
214 }
215
216
217 /* free a chunk of memory */
218
219 static void
220 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
221 {
222 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
223
224 fore200e_kfree(chunk->alloc_addr);
225 }
226
227
228
229 #if 0 /* currently unused */
230 static int
231 fore200e_checkup(struct fore200e* fore200e)
232 {
233 u32 hb1, hb2;
234
235 hb1 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
236 fore200e_spin(10);
237 hb2 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
238
239 if (hb2 <= hb1) {
240 printk(FORE200E "device %s heartbeat is not counting upwards, hb1 = %x; hb2 = %x\n",
241 fore200e->name, hb1, hb2);
242 return -EIO;
243 }
244 printk(FORE200E "device %s heartbeat is ok\n", fore200e->name);
245
246 return 0;
247 }
248 #endif
249
250
251 static void
252 fore200e_spin(int msecs)
253 {
254 unsigned long timeout = jiffies + MSECS(msecs);
255 while (jiffies < timeout);
256 }
257
258
259 static int
260 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
261 {
262 unsigned long timeout = jiffies + MSECS(msecs);
263 int ok;
264
265 mb();
266 do {
267 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
268 break;
269
270 } while (jiffies < timeout);
271
272 #if 1
273 if (!ok) {
274 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
275 *addr, val);
276 }
277 #endif
278
279 return ok;
280 }
281
282
283 static int
284 fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
285 {
286 unsigned long timeout = jiffies + MSECS(msecs);
287 int ok;
288
289 do {
290 if ((ok = (fore200e->bus->read(addr) == val)))
291 break;
292
293 } while (jiffies < timeout);
294
295 #if 1
296 if (!ok) {
297 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
298 fore200e->bus->read(addr), val);
299 }
300 #endif
301
302 return ok;
303 }
304
305
306 static void
307 fore200e_free_rx_buf(struct fore200e* fore200e)
308 {
309 int scheme, magn, nbr;
310 struct buffer* buffer;
311
312 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
313 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
314
315 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
316
317 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
318
319 struct chunk* data = &buffer[ nbr ].data;
320
321 if (data->alloc_addr != NULL)
322 fore200e_chunk_free(fore200e, data);
323 }
324 }
325 }
326 }
327 }
328
329
330 static void
331 fore200e_uninit_bs_queue(struct fore200e* fore200e)
332 {
333 int scheme, magn;
334
335 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
336 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
337
338 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
339 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
340
341 if (status->alloc_addr)
342 fore200e->bus->dma_chunk_free(fore200e, status);
343
344 if (rbd_block->alloc_addr)
345 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
346 }
347 }
348 }
349
350
351 static int
352 fore200e_reset(struct fore200e* fore200e, int diag)
353 {
354 int ok;
355
356 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
357
358 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
359
360 fore200e->bus->reset(fore200e);
361
362 if (diag) {
363 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
364 if (ok == 0) {
365
366 printk(FORE200E "device %s self-test failed\n", fore200e->name);
367 return -ENODEV;
368 }
369
370 printk(FORE200E "device %s self-test passed\n", fore200e->name);
371
372 fore200e->state = FORE200E_STATE_RESET;
373 }
374
375 return 0;
376 }
377
378
379 static void
380 fore200e_shutdown(struct fore200e* fore200e)
381 {
382 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
383 fore200e->name, fore200e->phys_base,
384 fore200e_irq_itoa(fore200e->irq));
385
386 if (fore200e->state > FORE200E_STATE_RESET) {
387 /* first, reset the board to prevent further interrupts or data transfers */
388 fore200e_reset(fore200e, 0);
389 }
390
391 /* then, release all allocated resources */
392 switch(fore200e->state) {
393
394 case FORE200E_STATE_COMPLETE:
395 if (fore200e->stats)
396 kfree(fore200e->stats);
397
398 case FORE200E_STATE_IRQ:
399 free_irq(fore200e->irq, fore200e->atm_dev);
400
401 case FORE200E_STATE_ALLOC_BUF:
402 fore200e_free_rx_buf(fore200e);
403
404 case FORE200E_STATE_INIT_BSQ:
405 fore200e_uninit_bs_queue(fore200e);
406
407 case FORE200E_STATE_INIT_RXQ:
408 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
410
411 case FORE200E_STATE_INIT_TXQ:
412 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
413 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
414
415 case FORE200E_STATE_INIT_CMDQ:
416 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
417
418 case FORE200E_STATE_INITIALIZE:
419 /* nothing to do for that state */
420
421 case FORE200E_STATE_START_FW:
422 /* nothing to do for that state */
423
424 case FORE200E_STATE_LOAD_FW:
425 /* nothing to do for that state */
426
427 case FORE200E_STATE_RESET:
428 /* nothing to do for that state */
429
430 case FORE200E_STATE_MAP:
431 fore200e->bus->unmap(fore200e);
432
433 case FORE200E_STATE_CONFIGURE:
434 /* nothing to do for that state */
435
436 case FORE200E_STATE_REGISTER:
437 /* XXX shouldn't we *start* by deregistering the device? */
438 atm_dev_deregister(fore200e->atm_dev);
439
440 case FORE200E_STATE_BLANK:
441 /* nothing to do for that state */
442 }
443 }
444
445
446
447 #ifdef CONFIG_ATM_FORE200E_PCA
448
449 static u32 fore200e_pca_read(volatile u32* addr)
450 {
451 /* on big-endian hosts, the board is configured to convert
452 the endianess of slave RAM accesses */
453 return le32_to_cpu(readl(addr));
454 }
455
456
457 static void fore200e_pca_write(u32 val, volatile u32* addr)
458 {
459 /* on big-endian hosts, the board is configured to convert
460 the endianess of slave RAM accesses */
461 writel(cpu_to_le32(val), addr);
462 }
463
464
465 static u32
466 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
467 {
468 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
469
470 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
471 virt_addr, size, direction, dma_addr);
472
473 return dma_addr;
474 }
475
476
477 static void
478 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
479 {
480 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
481 dma_addr, size, direction);
482
483 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
484 }
485
486
487 static void
488 fore200e_pca_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
489 {
490 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
491
492 pci_dma_sync_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
493 }
494
495
496 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
497 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
498
499 static int
500 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
501 int size, int nbr, int alignment)
502 {
503 #if defined(__sparc_v9__)
504 /* returned chunks are page-aligned */
505 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
506 chunk->alloc_size,
507 &chunk->dma_addr);
508
509 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
510 return -ENOMEM;
511
512 chunk->align_addr = chunk->alloc_addr;
513 #else
514 if (fore200e_chunk_alloc(fore200e, chunk, size * nbr, alignment, FORE200E_DMA_BIDIRECTIONAL) < 0)
515 return -ENOMEM;
516 #endif
517
518 return 0;
519 }
520
521
522 /* free a DMA consistent chunk of memory */
523
524 static void
525 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
526 {
527 #if defined(__sparc_v9__)
528 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
529 chunk->alloc_size,
530 chunk->alloc_addr,
531 chunk->dma_addr);
532 #else
533 fore200e_chunk_free(fore200e, chunk);
534 #endif
535 }
536
537
538 static int
539 fore200e_pca_irq_check(struct fore200e* fore200e)
540 {
541 /* this is a 1 bit register */
542 return readl(fore200e->regs.pca.psr);
543 }
544
545
546 static void
547 fore200e_pca_irq_ack(struct fore200e* fore200e)
548 {
549 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
550 }
551
552
553 static void
554 fore200e_pca_reset(struct fore200e* fore200e)
555 {
556 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
557 fore200e_spin(10);
558 writel(0, fore200e->regs.pca.hcr);
559 }
560
561
562 static int __init
563 fore200e_pca_map(struct fore200e* fore200e)
564 {
565 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
566
567 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
568
569 if (fore200e->virt_base == NULL) {
570 printk(FORE200E "can't map device %s\n", fore200e->name);
571 return -EFAULT;
572 }
573
574 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
575
576 /* gain access to the PCA-200E specific registers */
577 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
578 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
579 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
580
581 fore200e->state = FORE200E_STATE_MAP;
582 return 0;
583 }
584
585
586 static void
587 fore200e_pca_unmap(struct fore200e* fore200e)
588 {
589 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
590
591 /* XXX iounmap() does nothing on PowerPC (at least in 2.2.12 and 2.3.41),
592 this leads to a kernel panic if the module is loaded and unloaded several times */
593 if (fore200e->virt_base != NULL)
594 iounmap(fore200e->virt_base);
595 }
596
597
598 static int __init
599 fore200e_pca_configure(struct fore200e* fore200e)
600 {
601 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
602 u8 master_ctrl;
603
604 DPRINTK(2, "device %s being configured\n", fore200e->name);
605
606 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
607 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
608 return -EIO;
609 }
610
611 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
612
613 master_ctrl = master_ctrl
614 #if 0
615 | PCA200E_CTRL_DIS_CACHE_RD
616 | PCA200E_CTRL_DIS_WRT_INVAL
617 #endif
618 #if defined(__BIG_ENDIAN)
619 /* request the PCA board to convert the endianess of slave RAM accesses */
620 | PCA200E_CTRL_CONVERT_ENDIAN
621 #endif
622 | PCA200E_CTRL_LARGE_PCI_BURSTS;
623
624 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
625
626 fore200e->state = FORE200E_STATE_CONFIGURE;
627 return 0;
628 }
629
630
631 static struct fore200e* __init
632 fore200e_pca_detect(const struct fore200e_bus* bus, int index)
633 {
634 struct fore200e* fore200e;
635 struct pci_dev* pci_dev = NULL;
636 int count = index;
637
638 if (pci_present() == 0) {
639 printk(FORE200E "no PCI subsystem\n");
640 return NULL;
641 }
642
643 do {
644 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
645 if (pci_dev == NULL)
646 return NULL;
647 } while (count--);
648
649 if (pci_enable_device(pci_dev))
650 return NULL;
651
652 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
653 if (fore200e == NULL)
654 return NULL;
655
656 fore200e->bus = bus;
657 fore200e->bus_dev = pci_dev;
658 fore200e->irq = pci_dev->irq;
659 fore200e->phys_base = pci_resource_start (pci_dev, 0);
660
661 #if defined(__powerpc__)
662 fore200e->phys_base += KERNELBASE;
663 #endif
664
665 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
666
667 pci_set_master(pci_dev);
668
669 return fore200e;
670 }
671
672
673 static int __init
674 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
675 {
676 struct host_cmdq* cmdq = &fore200e->host_cmdq;
677 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
678 struct prom_opcode opcode;
679 int ok;
680 u32 prom_dma;
681
682 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
683
684 opcode.opcode = OPCODE_GET_PROM;
685 opcode.pad = 0;
686
687 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
688
689 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
690
691 *entry->status = STATUS_PENDING;
692
693 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
694
695 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
696
697 *entry->status = STATUS_FREE;
698
699 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
700
701 if (ok == 0) {
702 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
703 return -EIO;
704 }
705
706 #if defined(__BIG_ENDIAN)
707
708 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
709
710 /* MAC address is stored as little-endian */
711 swap_here(&prom->mac_addr[0]);
712 swap_here(&prom->mac_addr[4]);
713 #endif
714
715 return 0;
716 }
717
718
719 static int
720 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
721 {
722 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
723
724 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
725 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
726 }
727
728 #endif /* CONFIG_ATM_FORE200E_PCA */
729
730
731
732
733 #ifdef CONFIG_ATM_FORE200E_SBA
734
735 static u32
736 fore200e_sba_read(volatile u32* addr)
737 {
738 return sbus_readl(addr);
739 }
740
741
742 static void
743 fore200e_sba_write(u32 val, volatile u32* addr)
744 {
745 sbus_writel(val, addr);
746 }
747
748
749 static u32
750 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
751 {
752 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
753
754 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
755 virt_addr, size, direction, dma_addr);
756
757 return dma_addr;
758 }
759
760
761 static void
762 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
763 {
764 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
765 dma_addr, size, direction);
766
767 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
768 }
769
770
771 static void
772 fore200e_sba_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
773 {
774 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
775
776 sbus_dma_sync_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
777 }
778
779
780 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
781 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
782
783 static int
784 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
785 int size, int nbr, int alignment)
786 {
787 chunk->alloc_size = chunk->align_size = size * nbr;
788
789 /* returned chunks are page-aligned */
790 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
791 chunk->alloc_size,
792 &chunk->dma_addr);
793
794 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
795 return -ENOMEM;
796
797 chunk->align_addr = chunk->alloc_addr;
798
799 return 0;
800 }
801
802
803 /* free a DVMA consistent chunk of memory */
804
805 static void
806 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
807 {
808 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
809 chunk->alloc_size,
810 chunk->alloc_addr,
811 chunk->dma_addr);
812 }
813
814
815 static void
816 fore200e_sba_irq_enable(struct fore200e* fore200e)
817 {
818 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
819 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
820 }
821
822
823 static int
824 fore200e_sba_irq_check(struct fore200e* fore200e)
825 {
826 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
827 }
828
829
830 static void
831 fore200e_sba_irq_ack(struct fore200e* fore200e)
832 {
833 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
834 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
835 }
836
837
838 static void
839 fore200e_sba_reset(struct fore200e* fore200e)
840 {
841 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
842 fore200e_spin(10);
843 fore200e->bus->write(0, fore200e->regs.sba.hcr);
844 }
845
846
847 static int __init
848 fore200e_sba_map(struct fore200e* fore200e)
849 {
850 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
851 unsigned int bursts;
852
853 /* gain access to the SBA-200E specific registers */
854
855 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
856 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
857 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
858 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
859
860 if (fore200e->virt_base == NULL) {
861 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
862 return -EFAULT;
863 }
864
865 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
866
867 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
868
869 /* get the supported DVMA burst sizes */
870 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
871
872 if (sbus_can_dma_64bit(sbus_dev))
873 sbus_set_sbus64(sbus_dev, bursts);
874
875 #if 0
876 if (bursts & DMA_BURST16)
877 fore200e->bus->write(SBA200E_BSR_BURST16, fore200e->regs.sba.bsr);
878 else
879 if (bursts & DMA_BURST8)
880 fore200e->bus->write(SBA200E_BSR_BURST8, fore200e->regs.sba.bsr);
881 else
882 if (bursts & DMA_BURST4)
883 fore200e->bus->write(SBA200E_BSR_BURST4, fore200e->regs.sba.bsr);
884 #endif
885
886 fore200e->state = FORE200E_STATE_MAP;
887 return 0;
888 }
889
890
891 static void
892 fore200e_sba_unmap(struct fore200e* fore200e)
893 {
894 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
895 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
896 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
897 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
898 }
899
900
901 static int __init
902 fore200e_sba_configure(struct fore200e* fore200e)
903 {
904 fore200e->state = FORE200E_STATE_CONFIGURE;
905 return 0;
906 }
907
908
909 static struct fore200e* __init
910 fore200e_sba_detect(const struct fore200e_bus* bus, int index)
911 {
912 struct fore200e* fore200e;
913 struct sbus_bus* sbus_bus;
914 struct sbus_dev* sbus_dev = NULL;
915
916 unsigned int count = 0;
917
918 for_each_sbus (sbus_bus) {
919 for_each_sbusdev (sbus_dev, sbus_bus) {
920 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
921 if (count >= index)
922 goto found;
923 count++;
924 }
925 }
926 }
927 return NULL;
928
929 found:
930 #if 1
931 if (sbus_dev->num_registers != 4) {
932 printk(FORE200E "this %s device has %d instead of 4 registers\n",
933 bus->model_name, sbus_dev->num_registers);
934 return NULL;
935 }
936 #endif
937
938 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
939 if (fore200e == NULL)
940 return NULL;
941
942 fore200e->bus = bus;
943 fore200e->bus_dev = sbus_dev;
944 fore200e->irq = sbus_dev->irqs[ 0 ];
945
946 fore200e->phys_base = (unsigned long)sbus_dev;
947
948 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
949
950 return fore200e;
951 }
952
953
954 static int __init
955 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
956 {
957 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
958 int len;
959
960 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
961 if (len < 0)
962 return -EBUSY;
963
964 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
965 if (len < 0)
966 return -EBUSY;
967
968 prom_getproperty(sbus_dev->prom_node, "serialnumber",
969 (char*)&prom->serial_number, sizeof(prom->serial_number));
970
971 prom_getproperty(sbus_dev->prom_node, "promversion",
972 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
973
974 return 0;
975 }
976
977
978 static int
979 fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
980 {
981 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
982
983 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
984 }
985 #endif /* CONFIG_ATM_FORE200E_SBA */
986
987
988 static void
989 fore200e_irq_tx(struct fore200e* fore200e)
990 {
991 struct host_txq_entry* entry;
992 int i;
993
994 entry = fore200e->host_txq.host_entry;
995
996 for (i = 0; i < QUEUE_SIZE_TX; i++) {
997
998 if (*entry->status & STATUS_COMPLETE) {
999
1000 DPRINTK(3, "TX COMPLETED: entry = %p, vcc = %p, skb = %p\n", entry, entry->vcc, entry->skb);
1001
1002 /* free copy of misaligned data */
1003 if (entry->data)
1004 kfree(entry->data);
1005
1006 /* remove DMA mapping */
1007 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1008 FORE200E_DMA_TODEVICE);
1009
1010 /* notify tx completion */
1011 if (entry->vcc->pop)
1012 entry->vcc->pop(entry->vcc, entry->skb);
1013 else
1014 dev_kfree_skb_irq(entry->skb);
1015
1016 /* check error condition */
1017 if (*entry->status & STATUS_ERROR)
1018 atomic_inc(&entry->vcc->stats->tx_err);
1019 else
1020 atomic_inc(&entry->vcc->stats->tx);
1021
1022 *entry->status = STATUS_FREE;
1023
1024 fore200e->host_txq.txing--;
1025 }
1026 entry++;
1027 }
1028 }
1029
1030
1031 static void
1032 fore200e_supply(struct fore200e* fore200e)
1033 {
1034 int scheme, magn, i;
1035
1036 struct host_bsq* bsq;
1037 struct host_bsq_entry* entry;
1038 struct buffer* buffer;
1039
1040 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1041 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1042
1043 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1044
1045 if (fore200e_rx_buf_nbr[ scheme ][ magn ] - bsq->count > RBD_BLK_SIZE) {
1046
1047 DPRINTK(2, "supplying rx buffers to queue %d / %d, count = %d\n",
1048 scheme, magn, bsq->count);
1049
1050 entry = &bsq->host_entry[ bsq->head ];
1051
1052 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1053
1054 for (i = 0; i < RBD_BLK_SIZE; i++) {
1055
1056 buffer = &bsq->buffer[ bsq->free ];
1057
1058 FORE200E_NEXT_ENTRY(bsq->free, fore200e_rx_buf_nbr[ scheme ][ magn ]);
1059
1060 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1061 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1062 }
1063
1064 /* increase the number of supplied rx buffers */
1065 bsq->count += RBD_BLK_SIZE;
1066
1067 *entry->status = STATUS_PENDING;
1068 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1069 }
1070 }
1071 }
1072 }
1073
1074
1075
1076 static struct atm_vcc*
1077 fore200e_find_vcc(struct fore200e* fore200e, struct rpd* rpd)
1078 {
1079 struct atm_vcc* vcc;
1080
1081 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
1082
1083 if (vcc->vpi == rpd->atm_header.vpi && vcc->vci == rpd->atm_header.vci)
1084 break;
1085 }
1086
1087 return vcc;
1088 }
1089
1090
1091 static void
1092 fore200e_push_rpd(struct fore200e* fore200e, struct rpd* rpd)
1093 {
1094 struct atm_vcc* vcc;
1095 struct sk_buff* skb;
1096 struct buffer* buffer;
1097 struct fore200e_vcc* fore200e_vcc;
1098 int i, pdu_len = 0;
1099 #ifdef FORE200E_52BYTE_AAL0_SDU
1100 u32 cell_header = 0;
1101 #endif
1102
1103 vcc = fore200e_find_vcc(fore200e, rpd);
1104 if (vcc == NULL) {
1105
1106 printk(FORE200E "no vcc found for PDU received on %d.%d.%d\n",
1107 fore200e->atm_dev->number, rpd->atm_header.vpi, rpd->atm_header.vci);
1108 return;
1109 }
1110
1111 fore200e_vcc = FORE200E_VCC(vcc);
1112
1113 #ifdef FORE200E_52BYTE_AAL0_SDU
1114 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1115
1116 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1117 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1118 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1119 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1120 rpd->atm_header.clp;
1121 pdu_len = 4;
1122 }
1123 #endif
1124
1125 /* compute total PDU length */
1126 for (i = 0; i < rpd->nseg; i++)
1127 pdu_len += rpd->rsd[ i ].length;
1128
1129 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1130 if (skb == NULL) {
1131
1132 printk(FORE200E "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1133 atomic_inc(&vcc->stats->rx_drop);
1134 return;
1135 }
1136
1137 skb->stamp = vcc->timestamp = xtime;
1138
1139 #ifdef FORE200E_52BYTE_AAL0_SDU
1140 if (cell_header) {
1141 *((u32*)skb_put(skb, 4)) = cell_header;
1142 }
1143 #endif
1144
1145 /* reassemble segments */
1146 for (i = 0; i < rpd->nseg; i++) {
1147
1148 /* rebuild rx buffer address from rsd handle */
1149 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1150
1151 /* ensure DMA synchronisation */
1152 fore200e->bus->dma_sync(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1153
1154 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1155 }
1156
1157 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1158
1159 if (pdu_len < fore200e_vcc->rx_min_pdu)
1160 fore200e_vcc->rx_min_pdu = pdu_len;
1161 if (pdu_len > fore200e_vcc->rx_max_pdu)
1162 fore200e_vcc->rx_max_pdu = pdu_len;
1163
1164 /* push PDU */
1165 if (atm_charge(vcc, skb->truesize) == 0) {
1166
1167 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1168 vcc->itf, vcc->vpi, vcc->vci);
1169
1170 dev_kfree_skb_irq(skb);
1171 return;
1172 }
1173
1174 vcc->push(vcc, skb);
1175 atomic_inc(&vcc->stats->rx);
1176 }
1177
1178
1179 static void
1180 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1181 {
1182 struct buffer* buffer;
1183 int i;
1184
1185 for (i = 0; i < rpd->nseg; i++) {
1186
1187 /* rebuild rx buffer address from rsd handle */
1188 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1189
1190 /* decrease the number of supplied rx buffers */
1191 fore200e->host_bsq[ buffer->scheme ][ buffer->magn ].count--;
1192 }
1193 }
1194
1195
1196 static void
1197 fore200e_irq_rx(struct fore200e* fore200e)
1198 {
1199 struct host_rxq* rxq = &fore200e->host_rxq;
1200 struct host_rxq_entry* entry;
1201
1202 for (;;) {
1203
1204 entry = &rxq->host_entry[ rxq->head ];
1205
1206 /* no more received PDUs */
1207 if ((*entry->status & STATUS_COMPLETE) == 0)
1208 break;
1209
1210 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1211
1212 if ((*entry->status & STATUS_ERROR) == 0) {
1213
1214 fore200e_push_rpd(fore200e, entry->rpd);
1215 }
1216 else {
1217 printk(FORE200E "damaged PDU on %d.%d.%d\n",
1218 fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1219 }
1220
1221 fore200e_collect_rpd(fore200e, entry->rpd);
1222
1223 fore200e_supply(fore200e);
1224
1225 /* rewrite the rpd address to ack the received PDU */
1226 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1227 *entry->status = STATUS_FREE;
1228 }
1229 }
1230
1231
1232 static void
1233 fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1234 {
1235 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1236
1237 if (fore200e->bus->irq_check(fore200e) == 0) {
1238
1239 DPRINTK(3, "unexpected interrupt on device %c\n", fore200e->name[9]);
1240 return;
1241 }
1242 DPRINTK(3, "valid interrupt on device %c\n", fore200e->name[9]);
1243
1244 tasklet_schedule(&fore200e->tasklet);
1245
1246 fore200e->bus->irq_ack(fore200e);
1247 }
1248
1249
1250 static void
1251 fore200e_tasklet(unsigned long data)
1252 {
1253 struct fore200e* fore200e = (struct fore200e*) data;
1254
1255 fore200e_irq_rx(fore200e);
1256
1257 if (fore200e->host_txq.txing)
1258 fore200e_irq_tx(fore200e);
1259 }
1260
1261
1262
1263 static int
1264 fore200e_select_scheme(struct atm_vcc* vcc)
1265 {
1266 int scheme;
1267
1268 #if 1
1269 /* fairly balance VCs over (identical) buffer schemes */
1270 scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1271 #else
1272 /* bit 7 of VPI magically selects the second buffer scheme */
1273 if (vcc->vpi & (1<<7)) {
1274 vcc->vpi &= ((1<<7) - 1); /* reset the magic bit */
1275 scheme = BUFFER_SCHEME_TWO;
1276 }
1277 else {
1278 scheme = BUFFER_SCHEME_ONE;
1279 }
1280 #endif
1281
1282 DPRINTK(1, "vpvc %d.%d.%d uses the %s buffer scheme\n",
1283 vcc->itf, vcc->vpi, vcc->vci, scheme == BUFFER_SCHEME_ONE ? "first" : "second");
1284
1285 return scheme;
1286 }
1287
1288
1289
1290 static int
1291 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1292 {
1293 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1294 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1295 struct activate_opcode activ_opcode;
1296 struct deactivate_opcode deactiv_opcode;
1297 struct vpvc vpvc;
1298 int ok;
1299 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1300
1301 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1302
1303 if (activate) {
1304 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1305
1306 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1307 activ_opcode.aal = aal;
1308 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1309 activ_opcode.pad = 0;
1310 }
1311 else {
1312 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1313 deactiv_opcode.pad = 0;
1314 }
1315
1316 vpvc.vci = vcc->vci;
1317 vpvc.vpi = vcc->vpi;
1318
1319 *entry->status = STATUS_PENDING;
1320
1321 if (activate) {
1322
1323 #ifdef FORE200E_52BYTE_AAL0_SDU
1324 mtu = 48;
1325 #endif
1326 /* the MTU is unused by the cp, except in the case of AAL0 */
1327 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1328 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1329 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1330 }
1331 else {
1332 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1333 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1334 }
1335
1336 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1337
1338 *entry->status = STATUS_FREE;
1339
1340 if (ok == 0) {
1341 printk(FORE200E "unable to %s vpvc %d.%d on device %s\n",
1342 activate ? "open" : "close", vcc->vpi, vcc->vci, fore200e->name);
1343 return -EIO;
1344 }
1345
1346 DPRINTK(1, "vpvc %d.%d %sed on device %s\n", vcc->vpi, vcc->vci,
1347 activate ? "open" : "clos", fore200e->name);
1348
1349 return 0;
1350 }
1351
1352
1353 static int
1354 fore200e_walk_vccs(struct atm_vcc *vcc, short *vpi, int *vci)
1355 {
1356 struct atm_vcc* walk;
1357
1358 /* find a free VPI */
1359 if (*vpi == ATM_VPI_ANY) {
1360
1361 for (*vpi = 0, walk = vcc->dev->vccs; walk; walk = walk->next) {
1362
1363 if ((walk->vci == *vci) && (walk->vpi == *vpi)) {
1364 (*vpi)++;
1365 walk = vcc->dev->vccs;
1366 }
1367 }
1368 }
1369
1370 /* find a free VCI */
1371 if (*vci == ATM_VCI_ANY) {
1372
1373 for (*vci = ATM_NOT_RSV_VCI, walk = vcc->dev->vccs; walk; walk = walk->next) {
1374
1375 if ((walk->vpi = *vpi) && (walk->vci == *vci)) {
1376 *vci = walk->vci + 1;
1377 walk = vcc->dev->vccs;
1378 }
1379 }
1380 }
1381
1382 return 0;
1383 }
1384
1385
1386 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1387
1388 static void
1389 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1390 {
1391 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1392
1393 /* compute the data cells to idle cells ratio from the PCR */
1394 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1395 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1396 }
1397 else {
1398 /* disable rate control */
1399 rate->data_cells = rate->idle_cells = 0;
1400 }
1401 }
1402
1403
1404 static int
1405 fore200e_open(struct atm_vcc *vcc, short vpi, int vci)
1406 {
1407 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1408 struct fore200e_vcc* fore200e_vcc;
1409
1410 /* find a free VPI/VCI */
1411 fore200e_walk_vccs(vcc, &vpi, &vci);
1412
1413 vcc->vpi = vpi;
1414 vcc->vci = vci;
1415
1416 /* ressource checking only? */
1417 if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
1418 return 0;
1419
1420 set_bit(ATM_VF_ADDR, &vcc->flags);
1421 vcc->itf = vcc->dev->number;
1422
1423 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1424 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1425 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1426 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1427 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1428 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1429 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1430
1431 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1432
1433 down(&fore200e->rate_sf);
1434 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1435 up(&fore200e->rate_sf);
1436 return -EAGAIN;
1437 }
1438 /* reserving the pseudo-CBR bandwidth at this point grants us
1439 to reduce the length of the critical section protected
1440 by 'rate_sf'. in counterpart, we have to reset the available
1441 bandwidth if we later encounter an error */
1442
1443 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1444 up(&fore200e->rate_sf);
1445 }
1446
1447 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_KERNEL);
1448 if (fore200e_vcc == NULL) {
1449 down(&fore200e->rate_sf);
1450 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1451 up(&fore200e->rate_sf);
1452 return -ENOMEM;
1453 }
1454
1455 FORE200E_VCC(vcc) = fore200e_vcc;
1456
1457 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1458 kfree(fore200e_vcc);
1459 down(&fore200e->rate_sf);
1460 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1461 up(&fore200e->rate_sf);
1462 return -EBUSY;
1463 }
1464
1465 /* compute rate control parameters */
1466 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1467
1468 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1469
1470 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1471 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1472 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1473 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1474 }
1475
1476 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = 65536;
1477 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1478
1479 set_bit(ATM_VF_READY, &vcc->flags);
1480 return 0;
1481 }
1482
1483
1484
1485 static void
1486 fore200e_close(struct atm_vcc* vcc)
1487 {
1488 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1489
1490 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1491
1492 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1493
1494 kfree(FORE200E_VCC(vcc));
1495
1496 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1497 down(&fore200e->rate_sf);
1498 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1499 up(&fore200e->rate_sf);
1500 }
1501
1502 clear_bit(ATM_VF_READY, &vcc->flags);
1503 }
1504
1505
1506 #if 0
1507 #define FORE200E_SYNC_SEND /* wait tx completion before returning */
1508 #endif
1509
1510
1511 static int
1512 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1513 {
1514 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1515 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1516 struct host_txq* txq = &fore200e->host_txq;
1517 struct host_txq_entry* entry;
1518 struct tpd* tpd;
1519 struct tpd_haddr tpd_haddr;
1520 //unsigned long flags;
1521 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1522 int tx_copy = 0;
1523 int tx_len = skb->len;
1524 u32* cell_header = NULL;
1525 unsigned char* skb_data;
1526 int skb_len;
1527
1528 #ifdef FORE200E_52BYTE_AAL0_SDU
1529 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1530 cell_header = (u32*) skb->data;
1531 skb_data = skb->data + 4; /* skip 4-byte cell header */
1532 skb_len = tx_len = skb->len - 4;
1533
1534 DPRINTK(3, "skipping user-supplied cell header 0x%08x", *cell_header);
1535 }
1536 else
1537 #endif
1538 {
1539 skb_data = skb->data;
1540 skb_len = skb->len;
1541 }
1542
1543 retry_here:
1544
1545 tasklet_disable(&fore200e->tasklet);
1546
1547 entry = &txq->host_entry[ txq->head ];
1548
1549 if (*entry->status != STATUS_FREE) {
1550
1551 /* try to free completed tx queue entries */
1552 fore200e_irq_tx(fore200e);
1553
1554 if (*entry->status != STATUS_FREE) {
1555
1556 tasklet_enable(&fore200e->tasklet);
1557
1558 /* retry once again? */
1559 if(--retry > 0)
1560 goto retry_here;
1561
1562 atomic_inc(&vcc->stats->tx_err);
1563
1564 printk(FORE200E "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1565 fore200e->name, fore200e->cp_queues->heartbeat);
1566 if (vcc->pop)
1567 vcc->pop(vcc, skb);
1568 else
1569 dev_kfree_skb(skb);
1570 return -EIO;
1571 }
1572 }
1573
1574 tpd = entry->tpd;
1575
1576 if (((unsigned long)skb_data) & 0x3) {
1577
1578 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1579 tx_copy = 1;
1580 tx_len = skb_len;
1581 }
1582
1583 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1584
1585 /* this simply NUKES the PCA-200E board */
1586 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1587 tx_copy = 1;
1588 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1589 }
1590
1591 if (tx_copy) {
1592
1593 entry->data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1594 if (entry->data == NULL) {
1595
1596 tasklet_enable(&fore200e->tasklet);
1597 if (vcc->pop)
1598 vcc->pop(vcc, skb);
1599 else
1600 dev_kfree_skb(skb);
1601 return -ENOMEM;
1602 }
1603
1604 memcpy(entry->data, skb_data, skb_len);
1605 if (skb_len < tx_len)
1606 memset(entry->data + skb_len, 0x00, tx_len - skb_len);
1607
1608 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, entry->data, tx_len, FORE200E_DMA_TODEVICE);
1609 }
1610 else {
1611 entry->data = NULL;
1612 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, skb_data, tx_len, FORE200E_DMA_TODEVICE);
1613 }
1614
1615 tpd->tsd[ 0 ].length = tx_len;
1616
1617 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1618 txq->txing++;
1619
1620 tasklet_enable(&fore200e->tasklet);
1621
1622 /* ensure DMA synchronisation */
1623 fore200e->bus->dma_sync(fore200e, tpd->tsd[ 0 ].buffer, tpd->tsd[ 0 ].length, FORE200E_DMA_TODEVICE);
1624
1625 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1626 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1627 tpd->tsd[0].length, skb_len);
1628
1629 if (skb_len < fore200e_vcc->tx_min_pdu)
1630 fore200e_vcc->tx_min_pdu = skb_len;
1631 if (skb_len > fore200e_vcc->tx_max_pdu)
1632 fore200e_vcc->tx_max_pdu = skb_len;
1633
1634 entry->vcc = vcc;
1635 entry->skb = skb;
1636
1637 /* set tx rate control information */
1638 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1639 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1640
1641 if (cell_header) {
1642 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1643 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1644 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1645 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1646 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1647 }
1648 else {
1649 /* set the ATM header, common to all cells conveying the PDU */
1650 tpd->atm_header.clp = 0;
1651 tpd->atm_header.plt = 0;
1652 tpd->atm_header.vci = vcc->vci;
1653 tpd->atm_header.vpi = vcc->vpi;
1654 tpd->atm_header.gfc = 0;
1655 }
1656
1657 tpd->spec.length = tx_len;
1658 tpd->spec.nseg = 1;
1659 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1660 #ifdef FORE200E_SYNC_SEND
1661 tpd->spec.intr = 0;
1662 #else
1663 tpd->spec.intr = 1;
1664 #endif
1665
1666 tpd_haddr.size = sizeof(struct tpd) / 32; /* size is expressed in 32 byte blocks */
1667 tpd_haddr.pad = 0;
1668 tpd_haddr.haddr = entry->tpd_dma >> 5; /* shift the address, as we are in a bitfield */
1669
1670 *entry->status = STATUS_PENDING;
1671 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1672
1673
1674 #ifdef FORE200E_SYNC_SEND
1675 {
1676 int ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 10);
1677
1678 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1679 FORE200E_DMA_TODEVICE);
1680
1681 /* free tmp copy of misaligned data */
1682 if (entry->data)
1683 kfree(entry->data);
1684
1685 /* notify tx completion */
1686 if (vcc->pop)
1687 vcc->pop(vcc, skb);
1688 else
1689 dev_kfree_skb(skb);
1690
1691 if (ok == 0) {
1692 printk(FORE200E "synchronous tx on %d:%d:%d failed\n", vcc->itf, vcc->vpi, vcc->vci);
1693
1694 atomic_inc(&entry->vcc->stats->tx_err);
1695 return -EIO;
1696 }
1697 atomic_inc(&entry->vcc->stats->tx);
1698
1699 DPRINTK(3, "synchronous tx on %d:%d:%d succeeded\n", vcc->itf, vcc->vpi, vcc->vci);
1700
1701 }
1702 #endif
1703
1704 return 0;
1705 }
1706
1707
1708 static int
1709 fore200e_getstats(struct fore200e* fore200e)
1710 {
1711 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1712 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1713 struct stats_opcode opcode;
1714 int ok;
1715 u32 stats_dma_addr;
1716
1717 if (fore200e->stats == NULL) {
1718 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1719 if (fore200e->stats == NULL)
1720 return -ENOMEM;
1721 }
1722
1723 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1724
1725 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1726
1727 opcode.opcode = OPCODE_GET_STATS;
1728 opcode.pad = 0;
1729
1730 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1731
1732 *entry->status = STATUS_PENDING;
1733
1734 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1735
1736 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1737
1738 *entry->status = STATUS_FREE;
1739
1740 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1741
1742 if (ok == 0) {
1743 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1744 return -EIO;
1745 }
1746
1747 return 0;
1748 }
1749
1750
1751 static int
1752 fore200e_getsockopt (struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1753 {
1754 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1755
1756 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1757 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1758
1759 return -EINVAL;
1760 }
1761
1762
1763 static int
1764 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1765 {
1766 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1767
1768 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1769 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1770
1771 return -EINVAL;
1772 }
1773
1774
1775 #if 0 /* currently unused */
1776 static int
1777 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1778 {
1779 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1780 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1781 struct oc3_opcode opcode;
1782 int ok;
1783 u32 oc3_regs_dma_addr;
1784
1785 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1786
1787 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1788
1789 opcode.opcode = OPCODE_GET_OC3;
1790 opcode.reg = 0;
1791 opcode.value = 0;
1792 opcode.mask = 0;
1793
1794 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1795
1796 *entry->status = STATUS_PENDING;
1797
1798 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1799
1800 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1801
1802 *entry->status = STATUS_FREE;
1803
1804 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1805
1806 if (ok == 0) {
1807 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1808 return -EIO;
1809 }
1810
1811 return 0;
1812 }
1813 #endif
1814
1815
1816 static int
1817 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1818 {
1819 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1820 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1821 struct oc3_opcode opcode;
1822 int ok;
1823
1824 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1825
1826 opcode.opcode = OPCODE_SET_OC3;
1827 opcode.reg = reg;
1828 opcode.value = value;
1829 opcode.mask = mask;
1830
1831 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1832
1833 *entry->status = STATUS_PENDING;
1834
1835 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1836
1837 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1838
1839 *entry->status = STATUS_FREE;
1840
1841 if (ok == 0) {
1842 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1843 return -EIO;
1844 }
1845
1846 return 0;
1847 }
1848
1849
1850 static int
1851 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1852 {
1853 u32 mct_value, mct_mask;
1854 int error;
1855
1856 if (!capable(CAP_NET_ADMIN))
1857 return -EPERM;
1858
1859 switch (loop_mode) {
1860
1861 case ATM_LM_NONE:
1862 mct_value = 0;
1863 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1864 break;
1865
1866 case ATM_LM_LOC_PHY:
1867 mct_value = mct_mask = SUNI_MCT_DLE;
1868 break;
1869
1870 case ATM_LM_RMT_PHY:
1871 mct_value = mct_mask = SUNI_MCT_LLE;
1872 break;
1873
1874 default:
1875 return -EINVAL;
1876 }
1877
1878 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1879 if ( error == 0)
1880 fore200e->loop_mode = loop_mode;
1881
1882 return error;
1883 }
1884
1885
1886 static inline unsigned int
1887 fore200e_swap(unsigned int in)
1888 {
1889 #if defined(__LITTLE_ENDIAN)
1890 return swab32(in);
1891 #else
1892 return in;
1893 #endif
1894 }
1895
1896
1897 static int
1898 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
1899 {
1900 struct sonet_stats tmp;
1901
1902 if (fore200e_getstats(fore200e) < 0)
1903 return -EIO;
1904
1905 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
1906 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
1907 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
1908 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
1909 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
1910 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
1911 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
1912 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
1913 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
1914 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
1915 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
1916 fore200e_swap(fore200e->stats->aal34.cells_received) +
1917 fore200e_swap(fore200e->stats->aal5.cells_received);
1918
1919 if (arg)
1920 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1921
1922 return 0;
1923 }
1924
1925
1926 static int
1927 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
1928 {
1929 struct fore200e* fore200e = FORE200E_DEV(dev);
1930
1931 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1932
1933 switch (cmd) {
1934
1935 case SONET_GETSTAT:
1936 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
1937
1938 case SONET_GETDIAG:
1939 return put_user(0, (int*)arg) ? -EFAULT : 0;
1940
1941 case ATM_SETLOOP:
1942 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1943
1944 case ATM_GETLOOP:
1945 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
1946
1947 case ATM_QUERYLOOP:
1948 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
1949 }
1950
1951 return -ENOSYS; /* not implemented */
1952 }
1953
1954
1955 static int
1956 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1957 {
1958 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1959 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1960
1961 DPRINTK(2, "change_qos %d.%d.%d, "
1962 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1963 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1964 "available_cell_rate = %u",
1965 vcc->itf, vcc->vpi, vcc->vci,
1966 fore200e_traffic_class[ qos->txtp.traffic_class ],
1967 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1968 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1969 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1970 flags, fore200e->available_cell_rate);
1971
1972 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1973
1974 down(&fore200e->rate_sf);
1975 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1976 up(&fore200e->rate_sf);
1977 return -EAGAIN;
1978 }
1979
1980 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1981 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1982 up(&fore200e->rate_sf);
1983
1984 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1985
1986 /* update rate control parameters */
1987 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1988
1989 set_bit(ATM_VF_HASQOS, &vcc->flags);
1990 return 0;
1991 }
1992
1993 return -EINVAL;
1994 }
1995
1996
1997 static int __init
1998 fore200e_irq_request(struct fore200e* fore200e)
1999 {
2000 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2001
2002 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2003 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2004 return -EBUSY;
2005 }
2006
2007 printk(FORE200E "IRQ %s reserved for device %s\n",
2008 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2009
2010 tasklet_init(&fore200e->tasklet, fore200e_tasklet, (unsigned long)fore200e);
2011
2012 fore200e->state = FORE200E_STATE_IRQ;
2013 return 0;
2014 }
2015
2016
2017 static int __init
2018 fore200e_get_esi(struct fore200e* fore200e)
2019 {
2020 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2021 int ok, i;
2022
2023 ok = fore200e->bus->prom_read(fore200e, prom);
2024 if (ok < 0)
2025 return -EBUSY;
2026
2027 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2028 fore200e->name,
2029 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2030 prom->serial_number & 0xFFFF,
2031 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2032 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2033
2034 for (i = 0; i < ESI_LEN; i++) {
2035 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2036 }
2037
2038 fore200e_kfree(prom);
2039
2040 return 0;
2041 }
2042
2043
2044 static int __init
2045 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2046 {
2047 int scheme, magn, nbr, size, i;
2048
2049 struct host_bsq* bsq;
2050 struct buffer* buffer;
2051
2052 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2053 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2054
2055 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2056
2057 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2058 size = fore200e_rx_buf_size[ scheme ][ magn ];
2059
2060 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2061
2062 /* allocate the array of receive buffers */
2063 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2064
2065 if (buffer == NULL)
2066 return -ENOMEM;
2067
2068 for (i = 0; i < nbr; i++) {
2069
2070 buffer[ i ].scheme = scheme;
2071 buffer[ i ].magn = magn;
2072
2073 /* allocate the receive buffer body */
2074 if (fore200e_chunk_alloc(fore200e,
2075 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2076 FORE200E_DMA_FROMDEVICE) < 0) {
2077
2078 while (i > 0)
2079 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2080 fore200e_kfree(buffer);
2081
2082 return -ENOMEM;
2083 }
2084 }
2085 /* set next free buffer index */
2086 bsq->free = 0;
2087 }
2088 }
2089
2090 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2091 return 0;
2092 }
2093
2094
2095 static int __init
2096 fore200e_init_bs_queue(struct fore200e* fore200e)
2097 {
2098 int scheme, magn, i;
2099
2100 struct host_bsq* bsq;
2101 struct cp_bsq_entry* cp_entry;
2102
2103 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2104 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2105
2106 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2107
2108 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2109
2110 /* allocate and align the array of status words */
2111 if (fore200e->bus->dma_chunk_alloc(fore200e,
2112 &bsq->status,
2113 sizeof(enum status),
2114 QUEUE_SIZE_BS,
2115 fore200e->bus->status_alignment) < 0) {
2116 return -ENOMEM;
2117 }
2118
2119 /* allocate and align the array of receive buffer descriptors */
2120 if (fore200e->bus->dma_chunk_alloc(fore200e,
2121 &bsq->rbd_block,
2122 sizeof(struct rbd_block),
2123 QUEUE_SIZE_BS,
2124 fore200e->bus->descr_alignment) < 0) {
2125
2126 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2127 return -ENOMEM;
2128 }
2129
2130 /* get the base address of the cp resident buffer supply queue entries */
2131 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2132 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2133
2134 /* fill the host resident and cp resident buffer supply queue entries */
2135 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2136
2137 bsq->host_entry[ i ].status =
2138 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2139 bsq->host_entry[ i ].rbd_block =
2140 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2141 bsq->host_entry[ i ].rbd_block_dma =
2142 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2143 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2144
2145 *bsq->host_entry[ i ].status = STATUS_FREE;
2146
2147 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2148 &cp_entry[ i ].status_haddr);
2149 }
2150 }
2151 }
2152
2153 fore200e->state = FORE200E_STATE_INIT_BSQ;
2154 return 0;
2155 }
2156
2157
2158 static int __init
2159 fore200e_init_rx_queue(struct fore200e* fore200e)
2160 {
2161 struct host_rxq* rxq = &fore200e->host_rxq;
2162 struct cp_rxq_entry* cp_entry;
2163 int i;
2164
2165 DPRINTK(2, "receive queue is being initialized\n");
2166
2167 /* allocate and align the array of status words */
2168 if (fore200e->bus->dma_chunk_alloc(fore200e,
2169 &rxq->status,
2170 sizeof(enum status),
2171 QUEUE_SIZE_RX,
2172 fore200e->bus->status_alignment) < 0) {
2173 return -ENOMEM;
2174 }
2175
2176 /* allocate and align the array of receive PDU descriptors */
2177 if (fore200e->bus->dma_chunk_alloc(fore200e,
2178 &rxq->rpd,
2179 sizeof(struct rpd),
2180 QUEUE_SIZE_RX,
2181 fore200e->bus->descr_alignment) < 0) {
2182
2183 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2184 return -ENOMEM;
2185 }
2186
2187 /* get the base address of the cp resident rx queue entries */
2188 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2189 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2190
2191 /* fill the host resident and cp resident rx entries */
2192 for (i=0; i < QUEUE_SIZE_RX; i++) {
2193
2194 rxq->host_entry[ i ].status =
2195 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2196 rxq->host_entry[ i ].rpd =
2197 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2198 rxq->host_entry[ i ].rpd_dma =
2199 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2200 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2201
2202 *rxq->host_entry[ i ].status = STATUS_FREE;
2203
2204 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2205 &cp_entry[ i ].status_haddr);
2206
2207 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2208 &cp_entry[ i ].rpd_haddr);
2209 }
2210
2211 /* set the head entry of the queue */
2212 rxq->head = 0;
2213
2214 fore200e->state = FORE200E_STATE_INIT_RXQ;
2215 return 0;
2216 }
2217
2218
2219 static int __init
2220 fore200e_init_tx_queue(struct fore200e* fore200e)
2221 {
2222 struct host_txq* txq = &fore200e->host_txq;
2223 struct cp_txq_entry* cp_entry;
2224 int i;
2225
2226 DPRINTK(2, "transmit queue is being initialized\n");
2227
2228 /* allocate and align the array of status words */
2229 if (fore200e->bus->dma_chunk_alloc(fore200e,
2230 &txq->status,
2231 sizeof(enum status),
2232 QUEUE_SIZE_TX,
2233 fore200e->bus->status_alignment) < 0) {
2234 return -ENOMEM;
2235 }
2236
2237 /* allocate and align the array of transmit PDU descriptors */
2238 if (fore200e->bus->dma_chunk_alloc(fore200e,
2239 &txq->tpd,
2240 sizeof(struct tpd),
2241 QUEUE_SIZE_TX,
2242 fore200e->bus->descr_alignment) < 0) {
2243
2244 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2245 return -ENOMEM;
2246 }
2247
2248 /* get the base address of the cp resident tx queue entries */
2249 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2250 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2251
2252 /* fill the host resident and cp resident tx entries */
2253 for (i=0; i < QUEUE_SIZE_TX; i++) {
2254
2255 txq->host_entry[ i ].status =
2256 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2257 txq->host_entry[ i ].tpd =
2258 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2259 txq->host_entry[ i ].tpd_dma =
2260 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2261 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2262
2263 *txq->host_entry[ i ].status = STATUS_FREE;
2264
2265 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2266 &cp_entry[ i ].status_haddr);
2267
2268 /* although there is a one-to-one mapping of tx queue entries and tpds,
2269 we do not write here the DMA (physical) base address of each tpd into
2270 the related cp resident entry, because the cp relies on this write
2271 operation to detect that a new pdu has been submitted for tx */
2272 }
2273
2274 /* set the head entry of the queue */
2275 txq->head = 0;
2276
2277 fore200e->state = FORE200E_STATE_INIT_TXQ;
2278 return 0;
2279 }
2280
2281
2282 static int __init
2283 fore200e_init_cmd_queue(struct fore200e* fore200e)
2284 {
2285 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2286 struct cp_cmdq_entry* cp_entry;
2287 int i;
2288
2289 DPRINTK(2, "command queue is being initialized\n");
2290
2291 /* allocate and align the array of status words */
2292 if (fore200e->bus->dma_chunk_alloc(fore200e,
2293 &cmdq->status,
2294 sizeof(enum status),
2295 QUEUE_SIZE_CMD,
2296 fore200e->bus->status_alignment) < 0) {
2297 return -ENOMEM;
2298 }
2299
2300 /* get the base address of the cp resident cmd queue entries */
2301 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2302 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2303
2304 /* fill the host resident and cp resident cmd entries */
2305 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2306
2307 cmdq->host_entry[ i ].status =
2308 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2309 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2310
2311 *cmdq->host_entry[ i ].status = STATUS_FREE;
2312
2313 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2314 &cp_entry[ i ].status_haddr);
2315 }
2316
2317 /* set the head entry of the queue */
2318 cmdq->head = 0;
2319
2320 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2321 return 0;
2322 }
2323
2324
2325 static void __init
2326 fore200e_param_bs_queue(struct fore200e* fore200e,
2327 enum buffer_scheme scheme, enum buffer_magn magn,
2328 int queue_length, int pool_size, int supply_blksize)
2329 {
2330 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2331
2332 /* dumb value; the firmware doesn't allow us to activate a VC while
2333 selecting a buffer scheme with zero-sized rbd pools */
2334
2335 if (pool_size == 0)
2336 pool_size = 64;
2337
2338 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2339 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2340 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2341 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2342 }
2343
2344
2345 static int __init
2346 fore200e_initialize(struct fore200e* fore200e)
2347 {
2348 struct cp_queues* cpq;
2349 int ok, scheme, magn;
2350
2351 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2352
2353 init_MUTEX(&fore200e->rate_sf);
2354
2355 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2356
2357 /* enable cp to host interrupts */
2358 fore200e->bus->write(1, &cpq->imask);
2359
2360 if (fore200e->bus->irq_enable)
2361 fore200e->bus->irq_enable(fore200e);
2362
2363 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2364
2365 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2366 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2367 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2368
2369 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2370 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2371
2372 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2373 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2374 fore200e_param_bs_queue(fore200e, scheme, magn,
2375 QUEUE_SIZE_BS,
2376 fore200e_rx_buf_nbr[ scheme ][ magn ],
2377 RBD_BLK_SIZE);
2378
2379 /* issue the initialize command */
2380 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2381 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2382
2383 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2384 if (ok == 0) {
2385 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2386 return -ENODEV;
2387 }
2388
2389 printk(FORE200E "device %s initialized\n", fore200e->name);
2390
2391 fore200e->state = FORE200E_STATE_INITIALIZE;
2392 return 0;
2393 }
2394
2395
2396 static void __init
2397 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2398 {
2399 struct cp_monitor* monitor = fore200e->cp_monitor;
2400
2401 #if 0
2402 printk("%c", c);
2403 #endif
2404 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2405 }
2406
2407
2408 static int __init
2409 fore200e_monitor_getc(struct fore200e* fore200e)
2410 {
2411 struct cp_monitor* monitor = fore200e->cp_monitor;
2412 unsigned long timeout = jiffies + MSECS(50);
2413 int c;
2414
2415 while (jiffies < timeout) {
2416
2417 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2418
2419 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2420
2421 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2422 #if 0
2423 printk("%c", c & 0xFF);
2424 #endif
2425 return c & 0xFF;
2426 }
2427 }
2428
2429 return -1;
2430 }
2431
2432
2433 static void __init
2434 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2435 {
2436 while(*str) {
2437
2438 /* the i960 monitor doesn't accept any new character if it has something to say */
2439 while (fore200e_monitor_getc(fore200e) >= 0);
2440
2441 fore200e_monitor_putc(fore200e, *str++);
2442 }
2443
2444 while (fore200e_monitor_getc(fore200e) >= 0);
2445 }
2446
2447
2448 static int __init
2449 fore200e_start_fw(struct fore200e* fore200e)
2450 {
2451 int ok;
2452 char cmd[ 48 ];
2453 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2454
2455 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2456
2457 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2458
2459 fore200e_monitor_puts(fore200e, cmd);
2460
2461 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2462 if (ok == 0) {
2463 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2464 return -ENODEV;
2465 }
2466
2467 printk(FORE200E "device %s firmware started\n", fore200e->name);
2468
2469 fore200e->state = FORE200E_STATE_START_FW;
2470 return 0;
2471 }
2472
2473
2474 static int __init
2475 fore200e_load_fw(struct fore200e* fore200e)
2476 {
2477 u32* fw_data = (u32*) fore200e->bus->fw_data;
2478 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2479
2480 struct fw_header* fw_header = (struct fw_header*) fw_data;
2481
2482 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2483
2484 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2485 fore200e->name, load_addr, fw_size);
2486
2487 #if 1
2488 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2489 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2490 return -ENODEV;
2491 }
2492 #endif
2493
2494 for (; fw_size--; fw_data++, load_addr++)
2495 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2496
2497 fore200e->state = FORE200E_STATE_LOAD_FW;
2498 return 0;
2499 }
2500
2501
2502 static int __init
2503 fore200e_register(struct fore200e* fore200e)
2504 {
2505 struct atm_dev* atm_dev;
2506
2507 DPRINTK(2, "device %s being registered\n", fore200e->name);
2508
2509 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2510 NULL);
2511 if (atm_dev == NULL) {
2512 printk(FORE200E "unable to register device %s\n", fore200e->name);
2513 return -ENODEV;
2514 }
2515
2516 FORE200E_DEV(atm_dev) = fore200e;
2517 fore200e->atm_dev = atm_dev;
2518
2519 atm_dev->ci_range.vpi_bits = 8;
2520 atm_dev->ci_range.vci_bits = 10;
2521
2522 fore200e->available_cell_rate = ATM_OC3_PCR;
2523
2524 fore200e->state = FORE200E_STATE_REGISTER;
2525 return 0;
2526 }
2527
2528
2529 static int __init
2530 fore200e_init(struct fore200e* fore200e)
2531 {
2532 if (fore200e_register(fore200e) < 0)
2533 return -ENODEV;
2534
2535 if (fore200e->bus->configure(fore200e) < 0)
2536 return -ENODEV;
2537
2538 if (fore200e->bus->map(fore200e) < 0)
2539 return -ENODEV;
2540
2541 if (fore200e_reset(fore200e, 1) < 0)
2542 return -ENODEV;
2543
2544 if (fore200e_load_fw(fore200e) < 0)
2545 return -ENODEV;
2546
2547 if (fore200e_start_fw(fore200e) < 0)
2548 return -ENODEV;
2549
2550 if (fore200e_initialize(fore200e) < 0)
2551 return -ENODEV;
2552
2553 if (fore200e_init_cmd_queue(fore200e) < 0)
2554 return -ENOMEM;
2555
2556 if (fore200e_init_tx_queue(fore200e) < 0)
2557 return -ENOMEM;
2558
2559 if (fore200e_init_rx_queue(fore200e) < 0)
2560 return -ENOMEM;
2561
2562 if (fore200e_init_bs_queue(fore200e) < 0)
2563 return -ENOMEM;
2564
2565 if (fore200e_alloc_rx_buf(fore200e) < 0)
2566 return -ENOMEM;
2567
2568 if (fore200e_get_esi(fore200e) < 0)
2569 return -EIO;
2570
2571 if (fore200e_irq_request(fore200e) < 0)
2572 return -EBUSY;
2573
2574 fore200e_supply(fore200e);
2575
2576 /* all done, board initialization is now complete */
2577 fore200e->state = FORE200E_STATE_COMPLETE;
2578 return 0;
2579 }
2580
2581
2582 int __init
2583 fore200e_detect(void)
2584 {
2585 const struct fore200e_bus* bus;
2586 struct fore200e* fore200e;
2587 int index, link;
2588
2589 printk(FORE200E "FORE Systems 200E-series driver - version " FORE200E_VERSION "\n");
2590
2591 /* for each configured bus interface */
2592 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2593
2594 /* detect all boards present on that bus */
2595 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2596
2597 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2598 fore200e->bus->model_name,
2599 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2600
2601 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2602
2603 if (fore200e_init(fore200e) < 0) {
2604
2605 fore200e_shutdown(fore200e);
2606 break;
2607 }
2608
2609 link++;
2610
2611 fore200e->next = fore200e_boards;
2612 fore200e_boards = fore200e;
2613 }
2614 }
2615
2616 return link;
2617 }
2618
2619
2620 #ifdef MODULE
2621 static void
2622 fore200e_cleanup(struct fore200e** head)
2623 {
2624 struct fore200e* fore200e = *head;
2625
2626 fore200e_shutdown(fore200e);
2627
2628 *head = fore200e->next;
2629
2630 kfree(fore200e);
2631 }
2632 #endif
2633
2634
2635 static int
2636 fore200e_proc_read(struct atm_dev *dev,loff_t* pos,char* page)
2637 {
2638 struct fore200e* fore200e = FORE200E_DEV(dev);
2639 int len, left = *pos;
2640
2641 if (!left--) {
2642
2643 if (fore200e_getstats(fore200e) < 0)
2644 return -EIO;
2645
2646 len = sprintf(page,"\n"
2647 " device:\n"
2648 " internal name:\t\t%s\n", fore200e->name);
2649
2650 /* print bus-specific information */
2651 if (fore200e->bus->proc_read)
2652 len += fore200e->bus->proc_read(fore200e, page + len);
2653
2654 len += sprintf(page + len,
2655 " interrupt line:\t\t%s\n"
2656 " physical base address:\t0x%p\n"
2657 " virtual base address:\t0x%p\n"
2658 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2659 " board serial number:\t\t%d\n\n",
2660 fore200e_irq_itoa(fore200e->irq),
2661 (void*)fore200e->phys_base,
2662 (void*)fore200e->virt_base,
2663 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2664 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2665 fore200e->esi[4] * 256 + fore200e->esi[5]);
2666
2667 return len;
2668 }
2669
2670 if (!left--)
2671 return sprintf(page,
2672 " supplied small bufs (1):\t%d\n"
2673 " supplied large bufs (1):\t%d\n"
2674 " supplied small bufs (2):\t%d\n"
2675 " supplied large bufs (2):\t%d\n",
2676 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].count,
2677 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].count,
2678 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].count,
2679 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].count);
2680 if (!left--) {
2681 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2682
2683 len = sprintf(page,"\n\n"
2684 " cell processor:\n"
2685 " heartbeat state:\t\t");
2686
2687 if (hb >> 16 != 0xDEAD)
2688 len += sprintf(page + len, "0x%08x\n", hb);
2689 else
2690 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2691
2692 return len;
2693 }
2694
2695 if (!left--) {
2696 static const char* media_name[] = {
2697 "unshielded twisted pair",
2698 "multimode optical fiber ST",
2699 "multimode optical fiber SC",
2700 "single-mode optical fiber ST",
2701 "single-mode optical fiber SC",
2702 "unknown"
2703 };
2704
2705 static const char* oc3_mode[] = {
2706 "normal operation",
2707 "diagnostic loopback",
2708 "line loopback",
2709 "unknown"
2710 };
2711
2712 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2713 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2714 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2715 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2716 u32 oc3_index;
2717
2718 if (media_index < 0 || media_index > 4)
2719 media_index = 5;
2720
2721 switch (fore200e->loop_mode) {
2722 case ATM_LM_NONE: oc3_index = 0;
2723 break;
2724 case ATM_LM_LOC_PHY: oc3_index = 1;
2725 break;
2726 case ATM_LM_RMT_PHY: oc3_index = 2;
2727 break;
2728 default: oc3_index = 3;
2729 }
2730
2731 return sprintf(page,
2732 " firmware release:\t\t%d.%d.%d\n"
2733 " monitor release:\t\t%d.%d\n"
2734 " media type:\t\t\t%s\n"
2735 " OC-3 revision:\t\t0x%x\n"
2736 " OC-3 mode:\t\t\t%s",
2737 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2738 mon960_release >> 16, mon960_release << 16 >> 16,
2739 media_name[ media_index ],
2740 oc3_revision,
2741 oc3_mode[ oc3_index ]);
2742 }
2743
2744 if (!left--) {
2745 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2746
2747 return sprintf(page,
2748 "\n\n"
2749 " monitor:\n"
2750 " version number:\t\t%d\n"
2751 " boot status word:\t\t0x%08x\n",
2752 fore200e->bus->read(&cp_monitor->mon_version),
2753 fore200e->bus->read(&cp_monitor->bstat));
2754 }
2755
2756 if (!left--)
2757 return sprintf(page,
2758 "\n"
2759 " device statistics:\n"
2760 " 4b5b:\n"
2761 " crc_header_errors:\t\t%10u\n"
2762 " framing_errors:\t\t%10u\n",
2763 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2764 fore200e_swap(fore200e->stats->phy.framing_errors));
2765
2766 if (!left--)
2767 return sprintf(page, "\n"
2768 " OC-3:\n"
2769 " section_bip8_errors:\t%10u\n"
2770 " path_bip8_errors:\t\t%10u\n"
2771 " line_bip24_errors:\t\t%10u\n"
2772 " line_febe_errors:\t\t%10u\n"
2773 " path_febe_errors:\t\t%10u\n"
2774 " corr_hcs_errors:\t\t%10u\n"
2775 " ucorr_hcs_errors:\t\t%10u\n",
2776 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
2777 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
2778 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
2779 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
2780 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
2781 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
2782 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
2783
2784 if (!left--)
2785 return sprintf(page,"\n"
2786 " ATM:\t\t\t\t cells\n"
2787 " TX:\t\t\t%10u\n"
2788 " RX:\t\t\t%10u\n"
2789 " vpi out of range:\t\t%10u\n"
2790 " vpi no conn:\t\t%10u\n"
2791 " vci out of range:\t\t%10u\n"
2792 " vci no conn:\t\t%10u\n",
2793 fore200e_swap(fore200e->stats->atm.cells_transmitted),
2794 fore200e_swap(fore200e->stats->atm.cells_received),
2795 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
2796 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
2797 fore200e_swap(fore200e->stats->atm.vci_bad_range),
2798 fore200e_swap(fore200e->stats->atm.vci_no_conn));
2799
2800 if (!left--)
2801 return sprintf(page,"\n"
2802 " AAL0:\t\t\t cells\n"
2803 " TX:\t\t\t%10u\n"
2804 " RX:\t\t\t%10u\n"
2805 " dropped:\t\t\t%10u\n",
2806 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
2807 fore200e_swap(fore200e->stats->aal0.cells_received),
2808 fore200e_swap(fore200e->stats->aal0.cells_dropped));
2809
2810 if (!left--)
2811 return sprintf(page,"\n"
2812 " AAL3/4:\n"
2813 " SAR sublayer:\t\t cells\n"
2814 " TX:\t\t\t%10u\n"
2815 " RX:\t\t\t%10u\n"
2816 " dropped:\t\t\t%10u\n"
2817 " CRC errors:\t\t%10u\n"
2818 " protocol errors:\t\t%10u\n\n"
2819 " CS sublayer:\t\t PDUs\n"
2820 " TX:\t\t\t%10u\n"
2821 " RX:\t\t\t%10u\n"
2822 " dropped:\t\t\t%10u\n"
2823 " protocol errors:\t\t%10u\n",
2824 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
2825 fore200e_swap(fore200e->stats->aal34.cells_received),
2826 fore200e_swap(fore200e->stats->aal34.cells_dropped),
2827 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
2828 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
2829 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
2830 fore200e_swap(fore200e->stats->aal34.cspdus_received),
2831 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
2832 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
2833
2834 if (!left--)
2835 return sprintf(page,"\n"
2836 " AAL5:\n"
2837 " SAR sublayer:\t\t cells\n"
2838 " TX:\t\t\t%10u\n"
2839 " RX:\t\t\t%10u\n"
2840 " dropped:\t\t\t%10u\n"
2841 " congestions:\t\t%10u\n\n"
2842 " CS sublayer:\t\t PDUs\n"
2843 " TX:\t\t\t%10u\n"
2844 " RX:\t\t\t%10u\n"
2845 " dropped:\t\t\t%10u\n"
2846 " CRC errors:\t\t%10u\n"
2847 " protocol errors:\t\t%10u\n",
2848 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
2849 fore200e_swap(fore200e->stats->aal5.cells_received),
2850 fore200e_swap(fore200e->stats->aal5.cells_dropped),
2851 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
2852 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
2853 fore200e_swap(fore200e->stats->aal5.cspdus_received),
2854 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
2855 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
2856 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
2857
2858 if (!left--)
2859 return sprintf(page,"\n"
2860 " AUX:\t\t allocation failures\n"
2861 " small b1:\t\t\t%10u\n"
2862 " large b1:\t\t\t%10u\n"
2863 " small b2:\t\t\t%10u\n"
2864 " large b2:\t\t\t%10u\n"
2865 " RX PDUs:\t\t\t%10u\n",
2866 fore200e_swap(fore200e->stats->aux.small_b1_failed),
2867 fore200e_swap(fore200e->stats->aux.large_b1_failed),
2868 fore200e_swap(fore200e->stats->aux.small_b2_failed),
2869 fore200e_swap(fore200e->stats->aux.large_b2_failed),
2870 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed));
2871
2872 if (!left--)
2873 return sprintf(page,"\n"
2874 " receive carrier:\t\t\t%s\n",
2875 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2876
2877 if (!left--) {
2878 struct atm_vcc *vcc;
2879 struct fore200e_vcc* fore200e_vcc;
2880
2881 len = sprintf(page,"\n"
2882 " VCCs:\n address\tVPI.VCI:AAL\t(min/max tx PDU size) (min/max rx PDU size)\n");
2883
2884 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
2885
2886 fore200e_vcc = FORE200E_VCC(vcc);
2887
2888 len += sprintf(page + len,
2889 " %x\t%d.%d:%d\t\t(%d/%d)\t(%d/%d)\n",
2890 (u32)(unsigned long)vcc,
2891 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2892 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2893 fore200e_vcc->tx_max_pdu,
2894 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2895 fore200e_vcc->rx_max_pdu
2896 );
2897 }
2898
2899 return len;
2900 }
2901
2902 return 0;
2903 }
2904
2905
2906 #ifdef MODULE
2907 static int __init
2908 fore200e_module_init(void)
2909 {
2910 DPRINTK(1, "module loaded\n");
2911 return fore200e_detect() == 0;
2912 }
2913
2914 static void __exit
2915 fore200e_module_cleanup(void)
2916 {
2917 while (fore200e_boards) {
2918 fore200e_cleanup(&fore200e_boards);
2919 }
2920 DPRINTK(1, "module being removed\n");
2921 }
2922
2923 module_init(fore200e_module_init);
2924 module_exit(fore200e_module_cleanup);
2925 #endif
2926
2927
2928 static const struct atmdev_ops fore200e_ops =
2929 {
2930 open: fore200e_open,
2931 close: fore200e_close,
2932 ioctl: fore200e_ioctl,
2933 getsockopt: fore200e_getsockopt,
2934 setsockopt: fore200e_setsockopt,
2935 send: fore200e_send,
2936 change_qos: fore200e_change_qos,
2937 proc_read: fore200e_proc_read,
2938 owner: THIS_MODULE,
2939 };
2940
2941
2942 #ifdef CONFIG_ATM_FORE200E_PCA
2943 extern const unsigned char _fore200e_pca_fw_data[];
2944 extern const unsigned int _fore200e_pca_fw_size;
2945 #endif
2946 #ifdef CONFIG_ATM_FORE200E_SBA
2947 extern const unsigned char _fore200e_sba_fw_data[];
2948 extern const unsigned int _fore200e_sba_fw_size;
2949 #endif
2950
2951 static const struct fore200e_bus fore200e_bus[] = {
2952 #ifdef CONFIG_ATM_FORE200E_PCA
2953 { "PCA-200E", "pca200e", 32, 4, 32,
2954 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
2955 fore200e_pca_read,
2956 fore200e_pca_write,
2957 fore200e_pca_dma_map,
2958 fore200e_pca_dma_unmap,
2959 fore200e_pca_dma_sync,
2960 fore200e_pca_dma_chunk_alloc,
2961 fore200e_pca_dma_chunk_free,
2962 fore200e_pca_detect,
2963 fore200e_pca_configure,
2964 fore200e_pca_map,
2965 fore200e_pca_reset,
2966 fore200e_pca_prom_read,
2967 fore200e_pca_unmap,
2968 NULL,
2969 fore200e_pca_irq_check,
2970 fore200e_pca_irq_ack,
2971 fore200e_pca_proc_read,
2972 },
2973 #endif
2974 #ifdef CONFIG_ATM_FORE200E_SBA
2975 { "SBA-200E", "sba200e", 32, 64, 32,
2976 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
2977 fore200e_sba_read,
2978 fore200e_sba_write,
2979 fore200e_sba_dma_map,
2980 fore200e_sba_dma_unmap,
2981 fore200e_sba_dma_sync,
2982 fore200e_sba_dma_chunk_alloc,
2983 fore200e_sba_dma_chunk_free,
2984 fore200e_sba_detect,
2985 fore200e_sba_configure,
2986 fore200e_sba_map,
2987 fore200e_sba_reset,
2988 fore200e_sba_prom_read,
2989 fore200e_sba_unmap,
2990 fore200e_sba_irq_enable,
2991 fore200e_sba_irq_check,
2992 fore200e_sba_irq_ack,
2993 fore200e_sba_proc_read,
2994 },
2995 #endif
2996 {}
2997 };
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