include/asm-i386/processor.h

   1 /*
   2  * include/asm-i386/processor.h
   3  *
   4  * Copyright (C) 1994 Linus Torvalds
   5  */
   6
   7 #ifndef __ASM_I386_PROCESSOR_H
   8 #define __ASM_I386_PROCESSOR_H
   9
  10 #include <asm/vm86.h>
  11 #include <asm/math_emu.h>
  12 #include <asm/segment.h>
  13 #include <asm/page.h>
  14 #include <asm/types.h>
  15 #include <asm/sigcontext.h>
  16 #include <asm/cpufeature.h>
  17 #include <linux/config.h>
  18 #include <linux/threads.h>
  19
  20 /*
  21  * Default implementation of macro that returns current
  22  * instruction pointer ("program counter").
  23  */
  24 #define current_text_addr() ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; })
  25
  26 /*
  27  *  CPU type and hardware bug flags. Kept separately for each CPU.
  28  *  Members of this structure are referenced in head.S, so think twice
  29  *  before touching them. [mj]
  30  */
  31
  32 struct cpuinfo_x86 {
  33         __u8    x86;            /* CPU family */
  34         __u8    x86_vendor;     /* CPU vendor */
  35         __u8    x86_model;
  36         __u8    x86_mask;
  37         char    wp_works_ok;    /* It doesn't on 386's */
  38         char    hlt_works_ok;   /* Problems on some 486Dx4's and old 386's */
  39         char    hard_math;
  40         char    rfu;
  41         int     cpuid_level;    /* Maximum supported CPUID level, -1=no CPUID */
  42         __u32   x86_capability[NCAPINTS];
  43         char    x86_vendor_id[16];
  44         char    x86_model_id[64];
  45         int     x86_cache_size;  /* in KB - valid for CPUS which support this
  46                                     call  */
  47         int     fdiv_bug;
  48         int     f00f_bug;
  49         int     coma_bug;
  50         unsigned long loops_per_jiffy;
  51         unsigned long *pgd_quick;
  52         unsigned long *pmd_quick;
  53         unsigned long *pte_quick;
  54         unsigned long pgtable_cache_sz;
  55 };
  56
  57 #define X86_VENDOR_INTEL 0
  58 #define X86_VENDOR_CYRIX 1
  59 #define X86_VENDOR_AMD 2
  60 #define X86_VENDOR_UMC 3
  61 #define X86_VENDOR_NEXGEN 4
  62 #define X86_VENDOR_CENTAUR 5
  63 #define X86_VENDOR_RISE 6
  64 #define X86_VENDOR_TRANSMETA 7
  65 #define X86_VENDOR_UNKNOWN 0xff
  66
  67 /*
  68  * capabilities of CPUs
  69  */
  70
  71 extern struct cpuinfo_x86 boot_cpu_data;
  72 extern struct tss_struct init_tss[NR_CPUS];
  73
  74 #ifdef CONFIG_SMP
  75 extern struct cpuinfo_x86 cpu_data[];
  76 #define current_cpu_data cpu_data[smp_processor_id()]
  77 #else
  78 #define cpu_data &boot_cpu_data
  79 #define current_cpu_data boot_cpu_data
  80 #endif
  81
  82 #define cpu_has_pge     (test_bit(X86_FEATURE_PGE,  boot_cpu_data.x86_capability))
  83 #define cpu_has_pse     (test_bit(X86_FEATURE_PSE,  boot_cpu_data.x86_capability))
  84 #define cpu_has_pae     (test_bit(X86_FEATURE_PAE,  boot_cpu_data.x86_capability))
  85 #define cpu_has_tsc     (test_bit(X86_FEATURE_TSC,  boot_cpu_data.x86_capability))
  86 #define cpu_has_de      (test_bit(X86_FEATURE_DE,   boot_cpu_data.x86_capability))
  87 #define cpu_has_vme     (test_bit(X86_FEATURE_VME,  boot_cpu_data.x86_capability))
  88 #define cpu_has_fxsr    (test_bit(X86_FEATURE_FXSR, boot_cpu_data.x86_capability))
  89 #define cpu_has_xmm     (test_bit(X86_FEATURE_XMM,  boot_cpu_data.x86_capability))
  90 #define cpu_has_fpu     (test_bit(X86_FEATURE_FPU,  boot_cpu_data.x86_capability))
  91
  92 extern char ignore_irq13;
  93
  94 extern void identify_cpu(struct cpuinfo_x86 *);
  95 extern void print_cpu_info(struct cpuinfo_x86 *);
  96 extern void dodgy_tsc(void);
  97
  98 /*
  99  * EFLAGS bits
 100  */
 101 #define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
 102 #define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
 103 #define X86_EFLAGS_AF   0x00000010 /* Auxillary carry Flag */
 104 #define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
 105 #define X86_EFLAGS_SF   0x00000080 /* Sign Flag */
 106 #define X86_EFLAGS_TF   0x00000100 /* Trap Flag */
 107 #define X86_EFLAGS_IF   0x00000200 /* Interrupt Flag */
 108 #define X86_EFLAGS_DF   0x00000400 /* Direction Flag */
 109 #define X86_EFLAGS_OF   0x00000800 /* Overflow Flag */
 110 #define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
 111 #define X86_EFLAGS_NT   0x00004000 /* Nested Task */
 112 #define X86_EFLAGS_RF   0x00010000 /* Resume Flag */
 113 #define X86_EFLAGS_VM   0x00020000 /* Virtual Mode */
 114 #define X86_EFLAGS_AC   0x00040000 /* Alignment Check */
 115 #define X86_EFLAGS_VIF  0x00080000 /* Virtual Interrupt Flag */
 116 #define X86_EFLAGS_VIP  0x00100000 /* Virtual Interrupt Pending */
 117 #define X86_EFLAGS_ID   0x00200000 /* CPUID detection flag */
 118
 119 /*
 120  * Generic CPUID function
 121  */
 122 extern inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
 123 {
 124         __asm__("cpuid"
 125                 : "=a" (*eax),
 126                   "=b" (*ebx),
 127                   "=c" (*ecx),
 128                   "=d" (*edx)
 129                 : "a" (op));
 130 }
 131
 132 /*
 133  * CPUID functions returning a single datum
 134  */
 135 extern inline unsigned int cpuid_eax(unsigned int op)
 136 {
 137         unsigned int eax, ebx, ecx, edx;
 138
 139         __asm__("cpuid"
 140                 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
 141                 : "a" (op));
 142         return eax;
 143 }
 144 extern inline unsigned int cpuid_ebx(unsigned int op)
 145 {
 146         unsigned int eax, ebx, ecx, edx;
 147
 148         __asm__("cpuid"
 149                 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
 150                 : "a" (op));
 151         return ebx;
 152 }
 153 extern inline unsigned int cpuid_ecx(unsigned int op)
 154 {
 155         unsigned int eax, ebx, ecx, edx;
 156
 157         __asm__("cpuid"
 158                 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
 159                 : "a" (op));
 160         return ecx;
 161 }
 162 extern inline unsigned int cpuid_edx(unsigned int op)
 163 {
 164         unsigned int eax, ebx, ecx, edx;
 165
 166         __asm__("cpuid"
 167                 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
 168                 : "a" (op));
 169         return edx;
 170 }
 171
 172 /*
 173  * Intel CPU features in CR4
 174  */
 175 #define X86_CR4_VME             0x0001  /* enable vm86 extensions */
 176 #define X86_CR4_PVI             0x0002  /* virtual interrupts flag enable */
 177 #define X86_CR4_TSD             0x0004  /* disable time stamp at ipl 3 */
 178 #define X86_CR4_DE              0x0008  /* enable debugging extensions */
 179 #define X86_CR4_PSE             0x0010  /* enable page size extensions */
 180 #define X86_CR4_PAE             0x0020  /* enable physical address extensions */
 181 #define X86_CR4_MCE             0x0040  /* Machine check enable */
 182 #define X86_CR4_PGE             0x0080  /* enable global pages */
 183 #define X86_CR4_PCE             0x0100  /* enable performance counters at ipl 3 */
 184 #define X86_CR4_OSFXSR          0x0200  /* enable fast FPU save and restore */
 185 #define X86_CR4_OSXMMEXCPT      0x0400  /* enable unmasked SSE exceptions */
 186
 187 /*
 188  * Save the cr4 feature set we're using (ie
 189  * Pentium 4MB enable and PPro Global page
 190  * enable), so that any CPU's that boot up
 191  * after us can get the correct flags.
 192  */
 193 extern unsigned long mmu_cr4_features;
 194
 195 static inline void set_in_cr4 (unsigned long mask)
 196 {
 197         mmu_cr4_features |= mask;
 198         __asm__("movl %%cr4,%%eax\n\t"
 199                 "orl %0,%%eax\n\t"
 200                 "movl %%eax,%%cr4\n"
 201                 : : "irg" (mask)
 202                 :"ax");
 203 }
 204
 205 static inline void clear_in_cr4 (unsigned long mask)
 206 {
 207         mmu_cr4_features &= ~mask;
 208         __asm__("movl %%cr4,%%eax\n\t"
 209                 "andl %0,%%eax\n\t"
 210                 "movl %%eax,%%cr4\n"
 211                 : : "irg" (~mask)
 212                 :"ax");
 213 }
 214
 215 /*
 216  *      Cyrix CPU configuration register indexes
 217  */
 218 #define CX86_CCR0 0xc0
 219 #define CX86_CCR1 0xc1
 220 #define CX86_CCR2 0xc2
 221 #define CX86_CCR3 0xc3
 222 #define CX86_CCR4 0xe8
 223 #define CX86_CCR5 0xe9
 224 #define CX86_CCR6 0xea
 225 #define CX86_DIR0 0xfe
 226 #define CX86_DIR1 0xff
 227 #define CX86_ARR_BASE 0xc4
 228 #define CX86_RCR_BASE 0xdc
 229
 230 /*
 231  *      Cyrix CPU indexed register access macros
 232  */
 233
 234 #define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
 235
 236 #define setCx86(reg, data) do { \
 237         outb((reg), 0x22); \
 238         outb((data), 0x23); \
 239 } while (0)
 240
 241 /*
 242  * Bus types (default is ISA, but people can check others with these..)
 243  */
 244 #ifdef CONFIG_EISA
 245 extern int EISA_bus;
 246 #else
 247 #define EISA_bus (0)
 248 #endif
 249 extern int MCA_bus;
 250
 251 /* from system description table in BIOS.  Mostly for MCA use, but
 252 others may find it useful. */
 253 extern unsigned int machine_id;
 254 extern unsigned int machine_submodel_id;
 255 extern unsigned int BIOS_revision;
 256 extern unsigned int mca_pentium_flag;
 257
 258 /*
 259  * User space process size: 3GB (default).
 260  */
 261 #define TASK_SIZE       (PAGE_OFFSET)
 262
 263 /* This decides where the kernel will search for a free chunk of vm
 264  * space during mmap's.
 265  */
 266 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 3)
 267
 268 /*
 269  * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
 270  */
 271 #define IO_BITMAP_SIZE  32
 272 #define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
 273 #define INVALID_IO_BITMAP_OFFSET 0x8000
 274
 275 struct i387_fsave_struct {
 276         long    cwd;
 277         long    swd;
 278         long    twd;
 279         long    fip;
 280         long    fcs;
 281         long    foo;
 282         long    fos;
 283         long    st_space[20];   /* 8*10 bytes for each FP-reg = 80 bytes */
 284         long    status;         /* software status information */
 285 };
 286
 287 struct i387_fxsave_struct {
 288         unsigned short  cwd;
 289         unsigned short  swd;
 290         unsigned short  twd;
 291         unsigned short  fop;
 292         long    fip;
 293         long    fcs;
 294         long    foo;
 295         long    fos;
 296         long    mxcsr;
 297         long    reserved;
 298         long    st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
 299         long    xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
 300         long    padding[56];
 301 } __attribute__ ((aligned (16)));
 302
 303 struct i387_soft_struct {
 304         long    cwd;
 305         long    swd;
 306         long    twd;
 307         long    fip;
 308         long    fcs;
 309         long    foo;
 310         long    fos;
 311         long    st_space[20];   /* 8*10 bytes for each FP-reg = 80 bytes */
 312         unsigned char   ftop, changed, lookahead, no_update, rm, alimit;
 313         struct info     *info;
 314         unsigned long   entry_eip;
 315 };
 316
 317 union i387_union {
 318         struct i387_fsave_struct        fsave;
 319         struct i387_fxsave_struct       fxsave;
 320         struct i387_soft_struct soft;
 321 };
 322
 323 typedef struct {
 324         unsigned long seg;
 325 } mm_segment_t;
 326
 327 struct tss_struct {
 328         unsigned short  back_link,__blh;
 329         unsigned long   esp0;
 330         unsigned short  ss0,__ss0h;
 331         unsigned long   esp1;
 332         unsigned short  ss1,__ss1h;
 333         unsigned long   esp2;
 334         unsigned short  ss2,__ss2h;
 335         unsigned long   __cr3;
 336         unsigned long   eip;
 337         unsigned long   eflags;
 338         unsigned long   eax,ecx,edx,ebx;
 339         unsigned long   esp;
 340         unsigned long   ebp;
 341         unsigned long   esi;
 342         unsigned long   edi;
 343         unsigned short  es, __esh;
 344         unsigned short  cs, __csh;
 345         unsigned short  ss, __ssh;
 346         unsigned short  ds, __dsh;
 347         unsigned short  fs, __fsh;
 348         unsigned short  gs, __gsh;
 349         unsigned short  ldt, __ldth;
 350         unsigned short  trace, bitmap;
 351         unsigned long   io_bitmap[IO_BITMAP_SIZE+1];
 352         /*
 353          * pads the TSS to be cacheline-aligned (size is 0x100)
 354          */
 355         unsigned long __cacheline_filler[5];
 356 };
 357
 358 struct thread_struct {
 359         unsigned long   esp0;
 360         unsigned long   eip;
 361         unsigned long   esp;
 362         unsigned long   fs;
 363         unsigned long   gs;
 364 /* Hardware debugging registers */
 365         unsigned long   debugreg[8];  /* %%db0-7 debug registers */
 366 /* fault info */
 367         unsigned long   cr2, trap_no, error_code;
 368 /* floating point info */
 369         union i387_union        i387;
 370 /* virtual 86 mode info */
 371         struct vm86_struct      * vm86_info;
 372         unsigned long           screen_bitmap;
 373         unsigned long           v86flags, v86mask, v86mode, saved_esp0;
 374 /* IO permissions */
 375         int             ioperm;
 376         unsigned long   io_bitmap[IO_BITMAP_SIZE+1];
 377 };
 378
 379 #define INIT_THREAD  {                                          \
 380         0,                                                      \
 381         0, 0, 0, 0,                                             \
 382         { [0 ... 7] = 0 },      /* debugging registers */       \
 383         0, 0, 0,                                                \
 384         { { 0, }, },            /* 387 state */                 \
 385         0,0,0,0,0,0,                                            \
 386         0,{~0,}                 /* io permissions */            \
 387 }
 388
 389 #define INIT_MMAP \
 390 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
 391
 392 #define INIT_TSS  {                                             \
 393         0,0, /* back_link, __blh */                             \
 394         sizeof(init_stack) + (long) &init_stack, /* esp0 */     \
 395         __KERNEL_DS, 0, /* ss0 */                               \
 396         0,0,0,0,0,0, /* stack1, stack2 */                       \
 397         0, /* cr3 */                                            \
 398         0,0, /* eip,eflags */                                   \
 399         0,0,0,0, /* eax,ecx,edx,ebx */                          \
 400         0,0,0,0, /* esp,ebp,esi,edi */                          \
 401         0,0,0,0,0,0, /* es,cs,ss */                             \
 402         0,0,0,0,0,0, /* ds,fs,gs */                             \
 403         __LDT(0),0, /* ldt */                                   \
 404         0, INVALID_IO_BITMAP_OFFSET, /* tace, bitmap */         \
 405         {~0, } /* ioperm */                                     \
 406 }
 407
 408 #define start_thread(regs, new_eip, new_esp) do {               \
 409         __asm__("movl %0,%%fs ; movl %0,%%gs": :"r" (0));       \
 410         set_fs(USER_DS);                                        \
 411         regs->xds = __USER_DS;                                  \
 412         regs->xes = __USER_DS;                                  \
 413         regs->xss = __USER_DS;                                  \
 414         regs->xcs = __USER_CS;                                  \
 415         regs->eip = new_eip;                                    \
 416         regs->esp = new_esp;                                    \
 417 } while (0)
 418
 419 /* Forward declaration, a strange C thing */
 420 struct task_struct;
 421 struct mm_struct;
 422
 423 /* Free all resources held by a thread. */
 424 extern void release_thread(struct task_struct *);
 425 /*
 426  * create a kernel thread without removing it from tasklists
 427  */
 428 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 429
 430 /* Copy and release all segment info associated with a VM */
 431 extern void copy_segments(struct task_struct *p, struct mm_struct * mm);
 432 extern void release_segments(struct mm_struct * mm);
 433
 434 /*
 435  * Return saved PC of a blocked thread.
 436  */
 437 extern inline unsigned long thread_saved_pc(struct thread_struct *t)
 438 {
 439         return ((unsigned long *)t->esp)[3];
 440 }
 441
 442 unsigned long get_wchan(struct task_struct *p);
 443 #define KSTK_EIP(tsk)   (((unsigned long *)(4096+(unsigned long)(tsk)))[1019])
 444 #define KSTK_ESP(tsk)   (((unsigned long *)(4096+(unsigned long)(tsk)))[1022])
 445
 446 #define THREAD_SIZE (2*PAGE_SIZE)
 447 #define alloc_task_struct() ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
 448 #define free_task_struct(p) free_pages((unsigned long) (p), 1)
 449 #define get_task_struct(tsk)      atomic_inc(&virt_to_page(tsk)->count)
 450
 451 #define init_task       (init_task_union.task)
 452 #define init_stack      (init_task_union.stack)
 453
 454 struct microcode {
 455         unsigned int hdrver;
 456         unsigned int rev;
 457         unsigned int date;
 458         unsigned int sig;
 459         unsigned int cksum;
 460         unsigned int ldrver;
 461         unsigned int pf;
 462         unsigned int reserved[5];
 463         unsigned int bits[500];
 464 };
 465
 466 /* '6' because it used to be for P6 only (but now covers Pentium 4 as well) */
 467 #define MICROCODE_IOCFREE       _IO('6',0)
 468
 469 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
 470 extern inline void rep_nop(void)
 471 {
 472         __asm__ __volatile__("rep;nop");
 473 }
 474
 475 #endif /* __ASM_I386_PROCESSOR_H */