2 * Support for indirect PCI bridges.
4 * Copyright (C) 1998 Gabriel Paubert.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
18 #include <asm/processor.h>
22 #define cfg_read(val, addr, type, op) *val = op((type)(addr))
23 #define cfg_write(val, addr, type, op) op((type *)(addr), (val))
26 extern unsigned char in_8 (volatile unsigned *addr
);
27 extern unsigned short in_le16 (volatile unsigned *addr
);
28 extern unsigned in_le32 (volatile unsigned *addr
);
29 extern void out_8 (volatile unsigned *addr
, char val
);
30 extern void out_le16 (volatile unsigned *addr
, unsigned short val
);
31 extern void out_le32 (volatile unsigned *addr
, unsigned int val
);
32 #endif /* CONFIG_IXP425 */
34 #if defined(CONFIG_MPC8260)
35 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
37 indirect_##rw##_config_##size(struct pci_controller *hose, \
38 pci_dev_t dev, int offset, type val) \
40 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
42 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
45 #elif defined(CONFIG_E500)
46 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
48 indirect_##rw##_config_##size(struct pci_controller *hose, \
49 pci_dev_t dev, int offset, type val) \
51 *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
53 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
56 #elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
57 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
59 indirect_##rw##_config_##size(struct pci_controller *hose, \
60 pci_dev_t dev, int offset, type val) \
62 if (PCI_BUS(dev) > 0) \
63 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
65 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
66 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
70 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
72 indirect_##rw##_config_##size(struct pci_controller *hose, \
73 pci_dev_t dev, int offset, type val) \
75 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
76 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
81 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \
83 indirect_##rw##_config_##size(struct pci_controller *hose, \
84 pci_dev_t dev, int offset, type val) \
86 unsigned int msr = mfmsr(); \
87 mtmsr(msr & ~(MSR_EE | MSR_CE)); \
88 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
89 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
90 out_le32(hose->cfg_addr, 0x00000000); \
95 INDIRECT_PCI_OP(read
, byte
, u8
*, in_8
, 3)
96 INDIRECT_PCI_OP(read
, word
, u16
*, in_le16
, 2)
97 INDIRECT_PCI_OP(read
, dword
, u32
*, in_le32
, 0)
99 INDIRECT_PCI_OP_ERRATA6(write
, byte
, u8
, out_8
, 3)
100 INDIRECT_PCI_OP_ERRATA6(write
, word
, u16
, out_le16
, 2)
101 INDIRECT_PCI_OP_ERRATA6(write
, dword
, u32
, out_le32
, 0)
103 INDIRECT_PCI_OP(write
, byte
, u8
, out_8
, 3)
104 INDIRECT_PCI_OP(write
, word
, u16
, out_le16
, 2)
105 INDIRECT_PCI_OP(write
, dword
, u32
, out_le32
, 0)
108 void pci_setup_indirect(struct pci_controller
* hose
, u32 cfg_addr
, u32 cfg_data
)
111 indirect_read_config_byte
,
112 indirect_read_config_word
,
113 indirect_read_config_dword
,
114 indirect_write_config_byte
,
115 indirect_write_config_word
,
116 indirect_write_config_dword
);
118 hose
->cfg_addr
= (unsigned int *) cfg_addr
;
119 hose
->cfg_data
= (unsigned char *) cfg_data
;
123 #endif /* !__I386__ && !CONFIG_IXDP425 */
124 #endif /* CONFIG_PCI */