sys/dev/agp/agp_amd.c

   1 /*-
   2  * Copyright (c) 2000 Doug Rabson
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  *      $FreeBSD: src/sys/pci/agp_amd.c,v 1.3.2.4 2002/04/25 23:41:36 cokane Exp $
  27  *      $DragonFly: src/sys/dev/agp/agp_amd.c,v 1.8 2006/10/25 22:55:52 dillon Exp $
  28  */
  29
  30 #include "opt_bus.h"
  31 #include "opt_pci.h"
  32
  33 #include <sys/param.h>
  34 #include <sys/systm.h>
  35 #include <sys/malloc.h>
  36 #include <sys/kernel.h>
  37 #include <sys/bus.h>
  38 #include <sys/lock.h>
  39 #include <sys/rman.h>
  40
  41 #include <bus/pci/pcivar.h>
  42 #include <bus/pci/pcireg.h>
  43 #include "agppriv.h"
  44 #include "agpreg.h"
  45
  46 #include <vm/vm.h>
  47 #include <vm/vm_object.h>
  48 #include <vm/pmap.h>
  49 #include <machine/clock.h>
  50
  51 MALLOC_DECLARE(M_AGP);
  52
  53 #define READ2(off)      bus_space_read_2(sc->bst, sc->bsh, off)
  54 #define READ4(off)      bus_space_read_4(sc->bst, sc->bsh, off)
  55 #define WRITE2(off,v)   bus_space_write_2(sc->bst, sc->bsh, off, v)
  56 #define WRITE4(off,v)   bus_space_write_4(sc->bst, sc->bsh, off, v)
  57
  58 struct agp_amd_gatt {
  59         u_int32_t       ag_entries;
  60         u_int32_t      *ag_virtual;     /* virtual address of gatt */
  61         vm_offset_t     ag_physical;
  62         u_int32_t      *ag_vdir;        /* virtual address of page dir */
  63         vm_offset_t     ag_pdir;        /* physical address of page dir */
  64 };
  65
  66 struct agp_amd_softc {
  67         struct agp_softc agp;
  68         struct resource *regs;  /* memory mapped control registers */
  69         bus_space_tag_t bst;    /* bus_space tag */
  70         bus_space_handle_t bsh; /* bus_space handle */
  71         u_int32_t       initial_aperture; /* aperture size at startup */
  72         struct agp_amd_gatt *gatt;
  73 };
  74
  75 static struct agp_amd_gatt *
  76 agp_amd_alloc_gatt(device_t dev)
  77 {
  78         u_int32_t apsize = AGP_GET_APERTURE(dev);
  79         u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
  80         struct agp_amd_gatt *gatt;
  81         int i, npages, pdir_offset;
  82
  83         if (bootverbose)
  84                 device_printf(dev,
  85                               "allocating GATT for aperture of size %dM\n",
  86                               apsize / (1024*1024));
  87
  88         gatt = kmalloc(sizeof(struct agp_amd_gatt), M_AGP, M_INTWAIT);
  89
  90         /*
  91          * The AMD751 uses a page directory to map a non-contiguous
  92          * gatt so we don't need to use contigmalloc.
  93          * Malloc individual gatt pages and map them into the page
  94          * directory.
  95          */
  96         gatt->ag_entries = entries;
  97         gatt->ag_virtual = kmalloc(entries * sizeof(u_int32_t),
  98                                   M_AGP, M_INTWAIT | M_ZERO);
  99
 100         /*
 101          * Allocate the page directory.
 102          */
 103         gatt->ag_vdir = kmalloc(AGP_PAGE_SIZE, M_AGP, M_INTWAIT | M_ZERO);
 104         gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir);
 105         if(bootverbose)
 106                 device_printf(dev, "gatt -> ag_pdir %8x\n",
 107                                 (vm_offset_t)gatt->ag_pdir);
 108         /*
 109          * Allocate the gatt pages
 110          */
 111         gatt->ag_entries = entries;
 112         if(bootverbose)
 113                 device_printf(dev, "allocating GATT for %d AGP page entries\n",
 114                         gatt->ag_entries);
 115         gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
 116
 117         /*
 118          * Map the pages of the GATT into the page directory.
 119          *
 120          * The GATT page addresses are mapped into the directory offset by
 121          * an amount dependent on the base address of the aperture. This
 122          * is and offset into the page directory, not an offset added to
 123          * the addresses of the gatt pages.
 124          */
 125
 126         pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22;
 127
 128         npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
 129                   >> AGP_PAGE_SHIFT);
 130
 131         for (i = 0; i < npages; i++) {
 132                 vm_offset_t va;
 133                 vm_offset_t pa;
 134
 135                 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE;
 136                 pa = vtophys(va);
 137                 gatt->ag_vdir[i + pdir_offset] = pa | 1;
 138         }
 139
 140         /*
 141          * Make sure the chipset can see everything.
 142          */
 143         agp_flush_cache();
 144
 145         return gatt;
 146 }
 147
 148 static void
 149 agp_amd_free_gatt(struct agp_amd_gatt *gatt)
 150 {
 151         kfree(gatt->ag_virtual, M_AGP);
 152         kfree(gatt->ag_vdir, M_AGP);
 153         kfree(gatt, M_AGP);
 154 }
 155
 156 static const char*
 157 agp_amd_match(device_t dev)
 158 {
 159         if (pci_get_class(dev) != PCIC_BRIDGE
 160             || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
 161                 return NULL;
 162
 163         if (agp_find_caps(dev) == 0)
 164                 return NULL;
 165
 166         switch (pci_get_devid(dev)) {
 167
 168         case 0x70061022:
 169                 return ("AMD 751 host to AGP bridge");
 170
 171         case 0x700e1022:
 172                 return ("AMD 761 host to AGP bridge");
 173
 174         case 0x700c1022:
 175                 return ("AMD 762 host to AGP bridge");
 176
 177         };
 178
 179         return NULL;
 180 }
 181
 182 static int
 183 agp_amd_probe(device_t dev)
 184 {
 185         const char *desc;
 186
 187         desc = agp_amd_match(dev);
 188         if (desc) {
 189                 device_verbose(dev);
 190                 device_set_desc(dev, desc);
 191                 return 0;
 192         }
 193
 194         return ENXIO;
 195 }
 196
 197 static int
 198 agp_amd_attach(device_t dev)
 199 {
 200         struct agp_amd_softc *sc = device_get_softc(dev);
 201         struct agp_amd_gatt *gatt;
 202         int error, rid;
 203
 204         error = agp_generic_attach(dev);
 205         if (error)
 206                 return error;
 207
 208         rid = AGP_AMD751_REGISTERS;
 209         sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
 210                                       0, ~0, 1, RF_ACTIVE);
 211         if (!sc->regs) {
 212                 agp_generic_detach(dev);
 213                 return ENOMEM;
 214         }
 215
 216         sc->bst = rman_get_bustag(sc->regs);
 217         sc->bsh = rman_get_bushandle(sc->regs);
 218
 219         sc->initial_aperture = AGP_GET_APERTURE(dev);
 220         if (sc->initial_aperture == 0) {
 221                 device_printf(dev, "bad initial aperture size, disabling\n");
 222                 return ENXIO;
 223         }
 224
 225         for (;;) {
 226                 gatt = agp_amd_alloc_gatt(dev);
 227                 if (gatt)
 228                         break;
 229
 230                 /*
 231                  * Probably contigmalloc failure. Try reducing the
 232                  * aperture so that the gatt size reduces.
 233                  */
 234                 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2))
 235                         return ENOMEM;
 236         }
 237         sc->gatt = gatt;
 238
 239         /* Install the gatt. */
 240         WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir);
 241
 242         /* Enable synchronisation between host and agp. */
 243         pci_write_config(dev,
 244                          AGP_AMD751_MODECTRL,
 245                          AGP_AMD751_MODECTRL_SYNEN, 1);
 246
 247         /* Set indexing mode for two-level and enable page dir cache */
 248         pci_write_config(dev,
 249                          AGP_AMD751_MODECTRL2,
 250                          AGP_AMD751_MODECTRL2_GPDCE, 1);
 251
 252         /* Enable the TLB and flush */
 253         WRITE2(AGP_AMD751_STATUS,
 254                READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
 255         AGP_FLUSH_TLB(dev);
 256
 257         return 0;
 258 }
 259
 260 static int
 261 agp_amd_detach(device_t dev)
 262 {
 263         struct agp_amd_softc *sc = device_get_softc(dev);
 264         int error;
 265
 266         error = agp_generic_detach(dev);
 267         if (error)
 268                 return error;
 269
 270         /* Disable the TLB.. */
 271         WRITE2(AGP_AMD751_STATUS,
 272                READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
 273
 274         /* Disable host-agp sync */
 275         pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1);
 276
 277         /* Clear the GATT base */
 278         WRITE4(AGP_AMD751_ATTBASE, 0);
 279
 280         /* Put the aperture back the way it started. */
 281         AGP_SET_APERTURE(dev, sc->initial_aperture);
 282
 283         agp_amd_free_gatt(sc->gatt);
 284
 285         bus_release_resource(dev, SYS_RES_MEMORY,
 286                              AGP_AMD751_REGISTERS, sc->regs);
 287
 288         return 0;
 289 }
 290
 291 static u_int32_t
 292 agp_amd_get_aperture(device_t dev)
 293 {
 294         int vas;
 295
 296         /*
 297          * The aperture size is equal to 32M<<vas.
 298          */
 299         vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1;
 300         return (32*1024*1024) << vas;
 301 }
 302
 303 static int
 304 agp_amd_set_aperture(device_t dev, u_int32_t aperture)
 305 {
 306         int vas;
 307
 308         /*
 309          * Check for a power of two and make sure its within the
 310          * programmable range.
 311          */
 312         if (aperture & (aperture - 1)
 313             || aperture < 32*1024*1024
 314             || aperture > 2U*1024*1024*1024)
 315                 return EINVAL;
 316
 317         vas = ffs(aperture / 32*1024*1024) - 1;
 318
 319         /*
 320          * While the size register is bits 1-3 of APCTRL, bit 0 must be
 321          * set for the size value to be 'valid'
 322          */
 323         pci_write_config(dev, AGP_AMD751_APCTRL,
 324                          (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06)
 325                           | ((vas << 1) | 1))), 1);
 326
 327         return 0;
 328 }
 329
 330 static int
 331 agp_amd_bind_page(device_t dev, int offset, vm_offset_t physical)
 332 {
 333         struct agp_amd_softc *sc = device_get_softc(dev);
 334
 335         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
 336                 return EINVAL;
 337
 338         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
 339
 340         /* invalidate the cache */
 341         AGP_FLUSH_TLB(dev);
 342         return 0;
 343 }
 344
 345 static int
 346 agp_amd_unbind_page(device_t dev, int offset)
 347 {
 348         struct agp_amd_softc *sc = device_get_softc(dev);
 349
 350         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
 351                 return EINVAL;
 352
 353         sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
 354         return 0;
 355 }
 356
 357 static void
 358 agp_amd_flush_tlb(device_t dev)
 359 {
 360         struct agp_amd_softc *sc = device_get_softc(dev);
 361
 362         /* Set the cache invalidate bit and wait for the chipset to clear */
 363         WRITE4(AGP_AMD751_TLBCTRL, 1);
 364         do {
 365                 DELAY(1);
 366         } while (READ4(AGP_AMD751_TLBCTRL));
 367 }
 368
 369 static device_method_t agp_amd_methods[] = {
 370         /* Device interface */
 371         DEVMETHOD(device_probe,         agp_amd_probe),
 372         DEVMETHOD(device_attach,        agp_amd_attach),
 373         DEVMETHOD(device_detach,        agp_amd_detach),
 374         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
 375         DEVMETHOD(device_suspend,       bus_generic_suspend),
 376         DEVMETHOD(device_resume,        bus_generic_resume),
 377
 378         /* AGP interface */
 379         DEVMETHOD(agp_get_aperture,     agp_amd_get_aperture),
 380         DEVMETHOD(agp_set_aperture,     agp_amd_set_aperture),
 381         DEVMETHOD(agp_bind_page,        agp_amd_bind_page),
 382         DEVMETHOD(agp_unbind_page,      agp_amd_unbind_page),
 383         DEVMETHOD(agp_flush_tlb,        agp_amd_flush_tlb),
 384         DEVMETHOD(agp_enable,           agp_generic_enable),
 385         DEVMETHOD(agp_alloc_memory,     agp_generic_alloc_memory),
 386         DEVMETHOD(agp_free_memory,      agp_generic_free_memory),
 387         DEVMETHOD(agp_bind_memory,      agp_generic_bind_memory),
 388         DEVMETHOD(agp_unbind_memory,    agp_generic_unbind_memory),
 389
 390         { 0, 0 }
 391 };
 392
 393 static driver_t agp_amd_driver = {
 394         "agp",
 395         agp_amd_methods,
 396         sizeof(struct agp_amd_softc),
 397 };
 398
 399 static devclass_t agp_devclass;
 400
 401 DRIVER_MODULE(agp_amd, pci, agp_amd_driver, agp_devclass, 0, 0);
 402 MODULE_DEPEND(agp_amd, agp, 1, 1, 1);
 403 MODULE_DEPEND(agp_amd, pci, 1, 1, 1);