sound/soc/codecs/cs47l15.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // ALSA SoC Audio driver for CS47L15 codec
   4 //
   5 // Copyright (C) 2016-2019 Cirrus Logic, Inc. and
   6 //                         Cirrus Logic International Semiconductor Ltd.
   7 //
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/device.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/pm.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/regmap.h>
  17 #include <sound/core.h>
  18 #include <sound/pcm.h>
  19 #include <sound/pcm_params.h>
  20 #include <sound/soc.h>
  21 #include <sound/tlv.h>
  22
  23 #include <linux/irqchip/irq-madera.h>
  24 #include <linux/mfd/madera/core.h>
  25 #include <linux/mfd/madera/registers.h>
  26
  27 #include "madera.h"
  28 #include "wm_adsp.h"
  29
  30 #define CS47L15_NUM_ADSP 1
  31 #define CS47L15_MONO_OUTPUTS 1
  32
  33 /* Mid-mode registers */
  34 #define CS47L15_ADC_INT_BIAS_MASK       0x3800
  35 #define CS47L15_ADC_INT_BIAS_SHIFT      11
  36 #define CS47L15_PGA_BIAS_SEL_MASK       0x03
  37 #define CS47L15_PGA_BIAS_SEL_SHIFT      0
  38
  39 #define DRV_NAME "cs47l15-codec"
  40
  41 struct cs47l15 {
  42         struct madera_priv core;
  43         struct madera_fll fll[2];
  44
  45         bool in1_lp_mode;
  46 };
  47
  48 static const struct cs_dsp_region cs47l15_dsp1_regions[] = {
  49         { .type = WMFW_ADSP2_PM, .base = 0x080000 },
  50         { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
  51         { .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
  52         { .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
  53 };
  54
  55 static const char * const cs47l15_outdemux_texts[] = {
  56         "HPOUT",
  57         "EPOUT",
  58 };
  59
  60 static SOC_ENUM_SINGLE_DECL(cs47l15_outdemux_enum, SND_SOC_NOPM, 0,
  61                             cs47l15_outdemux_texts);
  62
  63 static const struct snd_kcontrol_new cs47l15_outdemux =
  64         SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l15_outdemux_enum,
  65                           madera_out1_demux_get, madera_out1_demux_put);
  66
  67 static int cs47l15_adsp_power_ev(struct snd_soc_dapm_widget *w,
  68                                  struct snd_kcontrol *kcontrol,
  69                                  int event)
  70 {
  71         struct snd_soc_component *component =
  72                 snd_soc_dapm_to_component(w->dapm);
  73         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
  74         struct madera_priv *priv = &cs47l15->core;
  75         struct madera *madera = priv->madera;
  76         unsigned int freq;
  77         int ret;
  78
  79         ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq);
  80         if (ret != 0) {
  81                 dev_err(madera->dev,
  82                         "Failed to read MADERA_DSP_CLOCK_2: %d\n", ret);
  83                 return ret;
  84         }
  85
  86         switch (event) {
  87         case SND_SOC_DAPM_PRE_PMU:
  88                 ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq);
  89                 if (ret)
  90                         return ret;
  91                 break;
  92         default:
  93                 break;
  94         }
  95
  96         return wm_adsp_early_event(w, kcontrol, event);
  97 }
  98
  99 #define CS47L15_NG_SRC(name, base) \
 100         SOC_SINGLE(name " NG HPOUT1L Switch",  base,  0, 1, 0), \
 101         SOC_SINGLE(name " NG HPOUT1R Switch",  base,  1, 1, 0), \
 102         SOC_SINGLE(name " NG SPKOUTL Switch",  base,  6, 1, 0), \
 103         SOC_SINGLE(name " NG SPKDAT1L Switch", base,  8, 1, 0), \
 104         SOC_SINGLE(name " NG SPKDAT1R Switch", base,  9, 1, 0)
 105
 106 static int cs47l15_in1_adc_get(struct snd_kcontrol *kcontrol,
 107                                struct snd_ctl_elem_value *ucontrol)
 108 {
 109         struct snd_soc_component *component =
 110                 snd_soc_kcontrol_component(kcontrol);
 111         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
 112
 113         ucontrol->value.integer.value[0] = !!cs47l15->in1_lp_mode;
 114
 115         return 0;
 116 }
 117
 118 static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
 119                                struct snd_ctl_elem_value *ucontrol)
 120 {
 121         struct snd_soc_component *component =
 122                 snd_soc_kcontrol_component(kcontrol);
 123         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
 124
 125         if (!!ucontrol->value.integer.value[0] == cs47l15->in1_lp_mode)
 126                 return 0;
 127
 128         switch (ucontrol->value.integer.value[0]) {
 129         case 0:
 130                 /* Set IN1 to normal mode */
 131                 snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
 132                                               MADERA_IN1_OSR_MASK,
 133                                               5 << MADERA_IN1_OSR_SHIFT);
 134                 snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
 135                                               CS47L15_ADC_INT_BIAS_MASK,
 136                                               4 << CS47L15_ADC_INT_BIAS_SHIFT);
 137                 snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
 138                                               CS47L15_PGA_BIAS_SEL_MASK, 0);
 139                 cs47l15->in1_lp_mode = false;
 140                 break;
 141         default:
 142                 /* Set IN1 to LP mode */
 143                 snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
 144                                               MADERA_IN1_OSR_MASK,
 145                                               4 << MADERA_IN1_OSR_SHIFT);
 146                 snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
 147                                               CS47L15_ADC_INT_BIAS_MASK,
 148                                               1 << CS47L15_ADC_INT_BIAS_SHIFT);
 149                 snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
 150                                               CS47L15_PGA_BIAS_SEL_MASK,
 151                                               3 << CS47L15_PGA_BIAS_SEL_SHIFT);
 152                 cs47l15->in1_lp_mode = true;
 153                 break;
 154         }
 155
 156         return 1;
 157 }
 158
 159 static const struct snd_kcontrol_new cs47l15_snd_controls[] = {
 160 SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]),
 161 SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]),
 162
 163 SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL,
 164                      MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
 165 SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL,
 166                      MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
 167
 168 SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum),
 169
 170 SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, MADERA_IN1L_HPF_SHIFT, 1, 0),
 171 SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, MADERA_IN1R_HPF_SHIFT, 1, 0),
 172 SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, MADERA_IN2L_HPF_SHIFT, 1, 0),
 173 SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, MADERA_IN2R_HPF_SHIFT, 1, 0),
 174
 175 SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L,
 176                MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 177 SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R,
 178                MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 179 SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L,
 180                MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 181 SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R,
 182                MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 183
 184 SOC_ENUM("Input Ramp Up", madera_in_vi_ramp),
 185 SOC_ENUM("Input Ramp Down", madera_in_vd_ramp),
 186
 187 MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE),
 188 MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE),
 189 MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE),
 190 MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE),
 191
 192 MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2),
 193 SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT,
 194                24, 0, madera_eq_tlv),
 195 SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT,
 196                24, 0, madera_eq_tlv),
 197 SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT,
 198                24, 0, madera_eq_tlv),
 199 SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT,
 200                24, 0, madera_eq_tlv),
 201 SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT,
 202                24, 0, madera_eq_tlv),
 203
 204 MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2),
 205 SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT,
 206                24, 0, madera_eq_tlv),
 207 SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT,
 208                24, 0, madera_eq_tlv),
 209 SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT,
 210                24, 0, madera_eq_tlv),
 211 SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT,
 212                24, 0, madera_eq_tlv),
 213 SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT,
 214                24, 0, madera_eq_tlv),
 215
 216 MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2),
 217 SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT,
 218                24, 0, madera_eq_tlv),
 219 SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT,
 220                24, 0, madera_eq_tlv),
 221 SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT,
 222                24, 0, madera_eq_tlv),
 223 SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT,
 224                24, 0, madera_eq_tlv),
 225 SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT,
 226                24, 0, madera_eq_tlv),
 227
 228 MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2),
 229 SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT,
 230                24, 0, madera_eq_tlv),
 231 SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT,
 232                24, 0, madera_eq_tlv),
 233 SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT,
 234                24, 0, madera_eq_tlv),
 235 SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT,
 236                24, 0, madera_eq_tlv),
 237 SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT,
 238                24, 0, madera_eq_tlv),
 239
 240 MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE),
 241 MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE),
 242 MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2LMIX_INPUT_1_SOURCE),
 243 MADERA_MIXER_CONTROLS("DRC2R", MADERA_DRC2RMIX_INPUT_1_SOURCE),
 244
 245 SND_SOC_BYTES_MASK("DRC1", MADERA_DRC1_CTRL1, 5,
 246                    MADERA_DRC1R_ENA | MADERA_DRC1L_ENA),
 247 SND_SOC_BYTES_MASK("DRC2", MADERA_DRC2_CTRL1, 5,
 248                    MADERA_DRC2R_ENA | MADERA_DRC2L_ENA),
 249
 250 MADERA_MIXER_CONTROLS("LHPF1", MADERA_HPLP1MIX_INPUT_1_SOURCE),
 251 MADERA_MIXER_CONTROLS("LHPF2", MADERA_HPLP2MIX_INPUT_1_SOURCE),
 252 MADERA_MIXER_CONTROLS("LHPF3", MADERA_HPLP3MIX_INPUT_1_SOURCE),
 253 MADERA_MIXER_CONTROLS("LHPF4", MADERA_HPLP4MIX_INPUT_1_SOURCE),
 254
 255 MADERA_LHPF_CONTROL("LHPF1 Coefficients", MADERA_HPLPF1_2),
 256 MADERA_LHPF_CONTROL("LHPF2 Coefficients", MADERA_HPLPF2_2),
 257 MADERA_LHPF_CONTROL("LHPF3 Coefficients", MADERA_HPLPF3_2),
 258 MADERA_LHPF_CONTROL("LHPF4 Coefficients", MADERA_HPLPF4_2),
 259
 260 SOC_ENUM("LHPF1 Mode", madera_lhpf1_mode),
 261 SOC_ENUM("LHPF2 Mode", madera_lhpf2_mode),
 262 SOC_ENUM("LHPF3 Mode", madera_lhpf3_mode),
 263 SOC_ENUM("LHPF4 Mode", madera_lhpf4_mode),
 264
 265 MADERA_RATE_ENUM("ISRC1 FSL", madera_isrc_fsl[0]),
 266 MADERA_RATE_ENUM("ISRC2 FSL", madera_isrc_fsl[1]),
 267 MADERA_RATE_ENUM("ISRC1 FSH", madera_isrc_fsh[0]),
 268 MADERA_RATE_ENUM("ISRC2 FSH", madera_isrc_fsh[1]),
 269
 270 WM_ADSP2_PRELOAD_SWITCH("DSP1", 1),
 271
 272 MADERA_MIXER_CONTROLS("DSP1L", MADERA_DSP1LMIX_INPUT_1_SOURCE),
 273 MADERA_MIXER_CONTROLS("DSP1R", MADERA_DSP1RMIX_INPUT_1_SOURCE),
 274
 275 SOC_SINGLE_TLV("Noise Generator Volume", MADERA_COMFORT_NOISE_GENERATOR,
 276                MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv),
 277
 278 MADERA_MIXER_CONTROLS("HPOUT1L", MADERA_OUT1LMIX_INPUT_1_SOURCE),
 279 MADERA_MIXER_CONTROLS("HPOUT1R", MADERA_OUT1RMIX_INPUT_1_SOURCE),
 280 MADERA_MIXER_CONTROLS("SPKOUTL", MADERA_OUT4LMIX_INPUT_1_SOURCE),
 281 MADERA_MIXER_CONTROLS("SPKDAT1L", MADERA_OUT5LMIX_INPUT_1_SOURCE),
 282 MADERA_MIXER_CONTROLS("SPKDAT1R", MADERA_OUT5RMIX_INPUT_1_SOURCE),
 283
 284 SOC_SINGLE("HPOUT1 SC Protect Switch", MADERA_HP1_SHORT_CIRCUIT_CTRL,
 285            MADERA_HP1_SC_ENA_SHIFT, 1, 0),
 286
 287 SOC_SINGLE("SPKDAT1 High Performance Switch", MADERA_OUTPUT_PATH_CONFIG_5L,
 288            MADERA_OUT5_OSR_SHIFT, 1, 0),
 289
 290 SOC_DOUBLE_R("HPOUT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_1L,
 291              MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1),
 292 SOC_SINGLE("Speaker Digital Switch", MADERA_DAC_DIGITAL_VOLUME_4L,
 293            MADERA_OUT4L_MUTE_SHIFT, 1, 1),
 294 SOC_DOUBLE_R("SPKDAT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_5L,
 295              MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1),
 296
 297 SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_1L,
 298                  MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT,
 299                  0xbf, 0, madera_digital_tlv),
 300 SOC_SINGLE_TLV("Speaker Digital Volume", MADERA_DAC_DIGITAL_VOLUME_4L,
 301                MADERA_OUT4L_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
 302 SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_5L,
 303                  MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT,
 304                  0xbf, 0, madera_digital_tlv),
 305
 306 SOC_DOUBLE("SPKDAT1 Switch", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT,
 307            MADERA_SPK1R_MUTE_SHIFT, 1, 1),
 308
 309 SOC_ENUM("Output Ramp Up", madera_out_vi_ramp),
 310 SOC_ENUM("Output Ramp Down", madera_out_vd_ramp),
 311
 312 SOC_SINGLE("Noise Gate Switch", MADERA_NOISE_GATE_CONTROL,
 313            MADERA_NGATE_ENA_SHIFT, 1, 0),
 314 SOC_SINGLE_TLV("Noise Gate Threshold Volume", MADERA_NOISE_GATE_CONTROL,
 315                MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv),
 316 SOC_ENUM("Noise Gate Hold", madera_ng_hold),
 317
 318 SOC_SINGLE_BOOL_EXT("IN1 LP Mode Switch", 0,
 319                     cs47l15_in1_adc_get, cs47l15_in1_adc_put),
 320
 321 CS47L15_NG_SRC("HPOUT1L", MADERA_NOISE_GATE_SELECT_1L),
 322 CS47L15_NG_SRC("HPOUT1R", MADERA_NOISE_GATE_SELECT_1R),
 323 CS47L15_NG_SRC("SPKOUTL", MADERA_NOISE_GATE_SELECT_4L),
 324 CS47L15_NG_SRC("SPKDAT1L", MADERA_NOISE_GATE_SELECT_5L),
 325 CS47L15_NG_SRC("SPKDAT1R", MADERA_NOISE_GATE_SELECT_5R),
 326
 327 MADERA_MIXER_CONTROLS("AIF1TX1", MADERA_AIF1TX1MIX_INPUT_1_SOURCE),
 328 MADERA_MIXER_CONTROLS("AIF1TX2", MADERA_AIF1TX2MIX_INPUT_1_SOURCE),
 329 MADERA_MIXER_CONTROLS("AIF1TX3", MADERA_AIF1TX3MIX_INPUT_1_SOURCE),
 330 MADERA_MIXER_CONTROLS("AIF1TX4", MADERA_AIF1TX4MIX_INPUT_1_SOURCE),
 331 MADERA_MIXER_CONTROLS("AIF1TX5", MADERA_AIF1TX5MIX_INPUT_1_SOURCE),
 332 MADERA_MIXER_CONTROLS("AIF1TX6", MADERA_AIF1TX6MIX_INPUT_1_SOURCE),
 333
 334 MADERA_MIXER_CONTROLS("AIF2TX1", MADERA_AIF2TX1MIX_INPUT_1_SOURCE),
 335 MADERA_MIXER_CONTROLS("AIF2TX2", MADERA_AIF2TX2MIX_INPUT_1_SOURCE),
 336 MADERA_MIXER_CONTROLS("AIF2TX3", MADERA_AIF2TX3MIX_INPUT_1_SOURCE),
 337 MADERA_MIXER_CONTROLS("AIF2TX4", MADERA_AIF2TX4MIX_INPUT_1_SOURCE),
 338
 339 MADERA_MIXER_CONTROLS("AIF3TX1", MADERA_AIF3TX1MIX_INPUT_1_SOURCE),
 340 MADERA_MIXER_CONTROLS("AIF3TX2", MADERA_AIF3TX2MIX_INPUT_1_SOURCE),
 341
 342 MADERA_GAINMUX_CONTROLS("SPDIF1TX1", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE),
 343 MADERA_GAINMUX_CONTROLS("SPDIF1TX2", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE),
 344
 345 WM_ADSP_FW_CONTROL("DSP1", 0),
 346 };
 347
 348 MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE);
 349 MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE);
 350 MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE);
 351 MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE);
 352
 353 MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE);
 354 MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE);
 355 MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE);
 356 MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE);
 357
 358 MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE);
 359 MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE);
 360 MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE);
 361 MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE);
 362
 363 MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE);
 364 MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE);
 365 MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE);
 366
 367 MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE);
 368 MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE);
 369
 370 MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE);
 371 MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE);
 372 MADERA_MIXER_ENUMS(SPKOUTL, MADERA_OUT4LMIX_INPUT_1_SOURCE);
 373 MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE);
 374 MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE);
 375
 376 MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE);
 377 MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE);
 378 MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE);
 379 MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE);
 380 MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE);
 381 MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE);
 382
 383 MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE);
 384 MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE);
 385 MADERA_MIXER_ENUMS(AIF2TX3, MADERA_AIF2TX3MIX_INPUT_1_SOURCE);
 386 MADERA_MIXER_ENUMS(AIF2TX4, MADERA_AIF2TX4MIX_INPUT_1_SOURCE);
 387
 388 MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE);
 389 MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE);
 390
 391 MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE);
 392 MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE);
 393
 394 MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE);
 395 MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE);
 396 MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE);
 397 MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE);
 398
 399 MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE);
 400 MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE);
 401 MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE);
 402 MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE);
 403
 404 MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE);
 405 MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE);
 406 MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE);
 407 MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE);
 408
 409 MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE);
 410 MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE);
 411 MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE);
 412 MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE);
 413
 414 static const char * const cs47l15_aec_loopback_texts[] = {
 415         "HPOUT1L", "HPOUT1R", "SPKOUTL", "SPKDAT1L", "SPKDAT1R",
 416 };
 417
 418 static const unsigned int cs47l15_aec_loopback_values[] = {
 419         0, 1, 6, 8, 9,
 420 };
 421
 422 static const struct soc_enum cs47l15_aec1_loopback =
 423         SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1,
 424                               MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf,
 425                               ARRAY_SIZE(cs47l15_aec_loopback_texts),
 426                               cs47l15_aec_loopback_texts,
 427                               cs47l15_aec_loopback_values);
 428
 429 static const struct soc_enum cs47l15_aec2_loopback =
 430         SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_2,
 431                               MADERA_AEC2_LOOPBACK_SRC_SHIFT, 0xf,
 432                               ARRAY_SIZE(cs47l15_aec_loopback_texts),
 433                               cs47l15_aec_loopback_texts,
 434                               cs47l15_aec_loopback_values);
 435
 436 static const struct snd_kcontrol_new cs47l15_aec_loopback_mux[] = {
 437         SOC_DAPM_ENUM("AEC1 Loopback", cs47l15_aec1_loopback),
 438         SOC_DAPM_ENUM("AEC2 Loopback", cs47l15_aec2_loopback),
 439 };
 440
 441 static const struct snd_soc_dapm_widget cs47l15_dapm_widgets[] = {
 442 SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,
 443                     0, madera_sysclk_ev,
 444                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
 445                     SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
 446 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
 447                     MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0),
 448 SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, MADERA_DSP_CLK_ENA_SHIFT,
 449                     0, madera_clk_ev,
 450                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 451
 452 SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD1", 20, 0),
 453 SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS),
 454 SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0),
 455
 456 SND_SOC_DAPM_SUPPLY("MICBIAS1", MADERA_MIC_BIAS_CTRL_1,
 457                     MADERA_MICB1_ENA_SHIFT, 0, NULL, 0),
 458
 459 SND_SOC_DAPM_SUPPLY("MICBIAS1A", MADERA_MIC_BIAS_CTRL_5,
 460                     MADERA_MICB1A_ENA_SHIFT, 0, NULL, 0),
 461 SND_SOC_DAPM_SUPPLY("MICBIAS1B", MADERA_MIC_BIAS_CTRL_5,
 462                     MADERA_MICB1B_ENA_SHIFT, 0, NULL, 0),
 463 SND_SOC_DAPM_SUPPLY("MICBIAS1C", MADERA_MIC_BIAS_CTRL_5,
 464                     MADERA_MICB1C_ENA_SHIFT, 0, NULL, 0),
 465
 466 SND_SOC_DAPM_SUPPLY("FXCLK", SND_SOC_NOPM,
 467                     MADERA_DOM_GRP_FX, 0,
 468                     madera_domain_clk_ev,
 469                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 470 SND_SOC_DAPM_SUPPLY("ISRC1CLK", SND_SOC_NOPM,
 471                     MADERA_DOM_GRP_ISRC1, 0,
 472                     madera_domain_clk_ev,
 473                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 474 SND_SOC_DAPM_SUPPLY("ISRC2CLK", SND_SOC_NOPM,
 475                     MADERA_DOM_GRP_ISRC2, 0,
 476                     madera_domain_clk_ev,
 477                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 478 SND_SOC_DAPM_SUPPLY("OUTCLK", SND_SOC_NOPM,
 479                     MADERA_DOM_GRP_OUT, 0,
 480                     madera_domain_clk_ev,
 481                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 482 SND_SOC_DAPM_SUPPLY("SPDCLK", SND_SOC_NOPM,
 483                     MADERA_DOM_GRP_SPD, 0,
 484                     madera_domain_clk_ev,
 485                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 486 SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM,
 487                     MADERA_DOM_GRP_DSP1, 0,
 488                     madera_domain_clk_ev,
 489                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 490 SND_SOC_DAPM_SUPPLY("AIF1TXCLK", SND_SOC_NOPM,
 491                     MADERA_DOM_GRP_AIF1, 0,
 492                     madera_domain_clk_ev,
 493                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 494 SND_SOC_DAPM_SUPPLY("AIF2TXCLK", SND_SOC_NOPM,
 495                     MADERA_DOM_GRP_AIF2, 0,
 496                     madera_domain_clk_ev,
 497                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 498 SND_SOC_DAPM_SUPPLY("AIF3TXCLK", SND_SOC_NOPM,
 499                     MADERA_DOM_GRP_AIF3, 0,
 500                     madera_domain_clk_ev,
 501                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 502 SND_SOC_DAPM_SUPPLY("PWMCLK", SND_SOC_NOPM,
 503                     MADERA_DOM_GRP_PWM, 0,
 504                     madera_domain_clk_ev,
 505                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 506
 507 SND_SOC_DAPM_SIGGEN("TONE"),
 508 SND_SOC_DAPM_SIGGEN("NOISE"),
 509
 510 SND_SOC_DAPM_INPUT("IN1ALN"),
 511 SND_SOC_DAPM_INPUT("IN1ALP"),
 512 SND_SOC_DAPM_INPUT("IN1BLN"),
 513 SND_SOC_DAPM_INPUT("IN1BLP"),
 514 SND_SOC_DAPM_INPUT("IN1ARN"),
 515 SND_SOC_DAPM_INPUT("IN1ARP"),
 516 SND_SOC_DAPM_INPUT("IN1BRN"),
 517 SND_SOC_DAPM_INPUT("IN1BRP"),
 518 SND_SOC_DAPM_INPUT("IN2N"),
 519 SND_SOC_DAPM_INPUT("IN2P"),
 520 SND_SOC_DAPM_INPUT("SPKRXDAT"),
 521
 522 SND_SOC_DAPM_MUX("IN1L Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[0]),
 523 SND_SOC_DAPM_MUX("IN1R Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[1]),
 524
 525 SND_SOC_DAPM_MUX("IN1L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
 526 SND_SOC_DAPM_MUX("IN1R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
 527
 528 SND_SOC_DAPM_MUX("IN2L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
 529 SND_SOC_DAPM_MUX("IN2R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
 530
 531 SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"),
 532 SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"),
 533
 534 SND_SOC_DAPM_OUTPUT("DSP Trigger Out"),
 535
 536 SND_SOC_DAPM_DEMUX("HPOUT1 Demux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
 537 SND_SOC_DAPM_MUX("HPOUT1 Mono Mux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
 538
 539 SND_SOC_DAPM_PGA("PWM1 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT,
 540                  0, NULL, 0),
 541 SND_SOC_DAPM_PGA("PWM2 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT,
 542                  0, NULL, 0),
 543
 544 SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0,
 545                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0),
 546 SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 1,
 547                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0),
 548 SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 2,
 549                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0),
 550 SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 3,
 551                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0),
 552 SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 4,
 553                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0),
 554 SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 5,
 555                      MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0),
 556
 557 SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0,
 558                      MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0),
 559 SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 1,
 560                      MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0),
 561 SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 2,
 562                      MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX3_ENA_SHIFT, 0),
 563 SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 3,
 564                      MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX4_ENA_SHIFT, 0),
 565
 566 SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0,
 567                      MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0),
 568 SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 1,
 569                      MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0),
 570
 571 SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM,
 572                    MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
 573                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 574                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 575 SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM,
 576                    MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
 577                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 578                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 579 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
 580                    MADERA_OUT4L_ENA_SHIFT, 0, NULL, 0, madera_spk_ev,
 581                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 582 SND_SOC_DAPM_PGA_E("OUT5L", MADERA_OUTPUT_ENABLES_1,
 583                    MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
 584                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 585 SND_SOC_DAPM_PGA_E("OUT5R", MADERA_OUTPUT_ENABLES_1,
 586                    MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
 587                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 588
 589 SND_SOC_DAPM_PGA("SPD1TX1", MADERA_SPD1_TX_CONTROL,
 590                  MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0),
 591 SND_SOC_DAPM_PGA("SPD1TX2", MADERA_SPD1_TX_CONTROL,
 592                  MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0),
 593 SND_SOC_DAPM_OUT_DRV("SPD1", MADERA_SPD1_TX_CONTROL,
 594                      MADERA_SPD1_ENA_SHIFT, 0, NULL, 0),
 595
 596 /*
 597  * mux_in widgets : arranged in the order of sources
 598  * specified in MADERA_MIXER_INPUT_ROUTES
 599  */
 600
 601 SND_SOC_DAPM_PGA("Noise Generator", MADERA_COMFORT_NOISE_GENERATOR,
 602                  MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0),
 603
 604 SND_SOC_DAPM_PGA("Tone Generator 1", MADERA_TONE_GENERATOR_1,
 605                  MADERA_TONE1_ENA_SHIFT, 0, NULL, 0),
 606 SND_SOC_DAPM_PGA("Tone Generator 2", MADERA_TONE_GENERATOR_1,
 607                  MADERA_TONE2_ENA_SHIFT, 0, NULL, 0),
 608
 609 SND_SOC_DAPM_SIGGEN("HAPTICS"),
 610
 611 SND_SOC_DAPM_MUX("AEC1 Loopback", MADERA_DAC_AEC_CONTROL_1,
 612                  MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0,
 613                  &cs47l15_aec_loopback_mux[0]),
 614 SND_SOC_DAPM_MUX("AEC2 Loopback", MADERA_DAC_AEC_CONTROL_2,
 615                  MADERA_AEC2_LOOPBACK_ENA_SHIFT, 0,
 616                  &cs47l15_aec_loopback_mux[1]),
 617
 618 SND_SOC_DAPM_PGA_E("IN1L", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT,
 619                    0, NULL, 0, madera_in_ev,
 620                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 621                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 622 SND_SOC_DAPM_PGA_E("IN1R", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT,
 623                    0, NULL, 0, madera_in_ev,
 624                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 625                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 626 SND_SOC_DAPM_PGA_E("IN2L", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT,
 627                    0, NULL, 0, madera_in_ev,
 628                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 629                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 630 SND_SOC_DAPM_PGA_E("IN2R", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT,
 631                    0, NULL, 0, madera_in_ev,
 632                    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
 633                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
 634
 635 SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0,
 636                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0),
 637 SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 1,
 638                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0),
 639 SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 2,
 640                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0),
 641 SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 3,
 642                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0),
 643 SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 4,
 644                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0),
 645 SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 5,
 646                     MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0),
 647
 648 SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0,
 649                     MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0),
 650 SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 1,
 651                     MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0),
 652 SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 2,
 653                     MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX3_ENA_SHIFT, 0),
 654 SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 3,
 655                     MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX4_ENA_SHIFT, 0),
 656
 657 SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0,
 658                     MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0),
 659 SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 1,
 660                     MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0),
 661
 662 SND_SOC_DAPM_PGA("EQ1", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0),
 663 SND_SOC_DAPM_PGA("EQ2", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0),
 664 SND_SOC_DAPM_PGA("EQ3", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0),
 665 SND_SOC_DAPM_PGA("EQ4", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0),
 666
 667 SND_SOC_DAPM_PGA("DRC1L", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0,
 668                  NULL, 0),
 669 SND_SOC_DAPM_PGA("DRC1R", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0,
 670                  NULL, 0),
 671 SND_SOC_DAPM_PGA("DRC2L", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0,
 672                  NULL, 0),
 673 SND_SOC_DAPM_PGA("DRC2R", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0,
 674                  NULL, 0),
 675
 676 SND_SOC_DAPM_PGA("LHPF1", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0, NULL, 0),
 677 SND_SOC_DAPM_PGA("LHPF2", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0, NULL, 0),
 678 SND_SOC_DAPM_PGA("LHPF3", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0, NULL, 0),
 679 SND_SOC_DAPM_PGA("LHPF4", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0, NULL, 0),
 680
 681 SND_SOC_DAPM_PGA("ISRC1DEC1", MADERA_ISRC_1_CTRL_3,
 682                  MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0),
 683 SND_SOC_DAPM_PGA("ISRC1DEC2", MADERA_ISRC_1_CTRL_3,
 684                  MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0),
 685 SND_SOC_DAPM_PGA("ISRC1DEC3", MADERA_ISRC_1_CTRL_3,
 686                  MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0),
 687 SND_SOC_DAPM_PGA("ISRC1DEC4", MADERA_ISRC_1_CTRL_3,
 688                  MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0),
 689
 690 SND_SOC_DAPM_PGA("ISRC1INT1", MADERA_ISRC_1_CTRL_3,
 691                  MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0),
 692 SND_SOC_DAPM_PGA("ISRC1INT2", MADERA_ISRC_1_CTRL_3,
 693                  MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0),
 694 SND_SOC_DAPM_PGA("ISRC1INT3", MADERA_ISRC_1_CTRL_3,
 695                  MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0),
 696 SND_SOC_DAPM_PGA("ISRC1INT4", MADERA_ISRC_1_CTRL_3,
 697                  MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0),
 698
 699 SND_SOC_DAPM_PGA("ISRC2DEC1", MADERA_ISRC_2_CTRL_3,
 700                  MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0),
 701 SND_SOC_DAPM_PGA("ISRC2DEC2", MADERA_ISRC_2_CTRL_3,
 702                  MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0),
 703 SND_SOC_DAPM_PGA("ISRC2DEC3", MADERA_ISRC_2_CTRL_3,
 704                  MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0),
 705 SND_SOC_DAPM_PGA("ISRC2DEC4", MADERA_ISRC_2_CTRL_3,
 706                  MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0),
 707
 708 SND_SOC_DAPM_PGA("ISRC2INT1", MADERA_ISRC_2_CTRL_3,
 709                  MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0),
 710 SND_SOC_DAPM_PGA("ISRC2INT2", MADERA_ISRC_2_CTRL_3,
 711                  MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0),
 712 SND_SOC_DAPM_PGA("ISRC2INT3", MADERA_ISRC_2_CTRL_3,
 713                  MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0),
 714 SND_SOC_DAPM_PGA("ISRC2INT4", MADERA_ISRC_2_CTRL_3,
 715                  MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0),
 716
 717 WM_ADSP2("DSP1", 0, cs47l15_adsp_power_ev),
 718
 719 /* end of ordered widget list */
 720
 721 MADERA_MIXER_WIDGETS(EQ1, "EQ1"),
 722 MADERA_MIXER_WIDGETS(EQ2, "EQ2"),
 723 MADERA_MIXER_WIDGETS(EQ3, "EQ3"),
 724 MADERA_MIXER_WIDGETS(EQ4, "EQ4"),
 725
 726 MADERA_MIXER_WIDGETS(DRC1L, "DRC1L"),
 727 MADERA_MIXER_WIDGETS(DRC1R, "DRC1R"),
 728 MADERA_MIXER_WIDGETS(DRC2L, "DRC2L"),
 729 MADERA_MIXER_WIDGETS(DRC2R, "DRC2R"),
 730
 731 SND_SOC_DAPM_SWITCH("DRC1 Activity Output", SND_SOC_NOPM, 0, 0,
 732                     &madera_drc_activity_output_mux[0]),
 733 SND_SOC_DAPM_SWITCH("DRC2 Activity Output", SND_SOC_NOPM, 0, 0,
 734                     &madera_drc_activity_output_mux[1]),
 735
 736 MADERA_MIXER_WIDGETS(LHPF1, "LHPF1"),
 737 MADERA_MIXER_WIDGETS(LHPF2, "LHPF2"),
 738 MADERA_MIXER_WIDGETS(LHPF3, "LHPF3"),
 739 MADERA_MIXER_WIDGETS(LHPF4, "LHPF4"),
 740
 741 MADERA_MIXER_WIDGETS(PWM1, "PWM1"),
 742 MADERA_MIXER_WIDGETS(PWM2, "PWM2"),
 743
 744 MADERA_MIXER_WIDGETS(OUT1L, "HPOUT1L"),
 745 MADERA_MIXER_WIDGETS(OUT1R, "HPOUT1R"),
 746 MADERA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"),
 747 MADERA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"),
 748 MADERA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"),
 749
 750 MADERA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"),
 751 MADERA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"),
 752 MADERA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"),
 753 MADERA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"),
 754 MADERA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"),
 755 MADERA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"),
 756
 757 MADERA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"),
 758 MADERA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"),
 759 MADERA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"),
 760 MADERA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"),
 761
 762 MADERA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"),
 763 MADERA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"),
 764
 765 MADERA_MUX_WIDGETS(SPD1TX1, "SPDIF1TX1"),
 766 MADERA_MUX_WIDGETS(SPD1TX2, "SPDIF1TX2"),
 767
 768 MADERA_DSP_WIDGETS(DSP1, "DSP1"),
 769
 770 SND_SOC_DAPM_SWITCH("DSP1 Trigger Output", SND_SOC_NOPM, 0, 0,
 771                     &madera_dsp_trigger_output_mux[0]),
 772
 773 MADERA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"),
 774 MADERA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"),
 775 MADERA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"),
 776 MADERA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"),
 777
 778 MADERA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"),
 779 MADERA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"),
 780 MADERA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"),
 781 MADERA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"),
 782
 783 MADERA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"),
 784 MADERA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"),
 785 MADERA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"),
 786 MADERA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"),
 787
 788 MADERA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"),
 789 MADERA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"),
 790 MADERA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"),
 791 MADERA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"),
 792
 793 SND_SOC_DAPM_OUTPUT("HPOUTL"),
 794 SND_SOC_DAPM_OUTPUT("HPOUTR"),
 795 SND_SOC_DAPM_OUTPUT("EPOUTP"),
 796 SND_SOC_DAPM_OUTPUT("EPOUTN"),
 797 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
 798 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
 799 SND_SOC_DAPM_OUTPUT("SPKDAT1L"),
 800 SND_SOC_DAPM_OUTPUT("SPKDAT1R"),
 801 SND_SOC_DAPM_OUTPUT("SPDIF1"),
 802
 803 SND_SOC_DAPM_OUTPUT("MICSUPP"),
 804 };
 805
 806 #define MADERA_MIXER_INPUT_ROUTES(name) \
 807         { name, "Noise Generator", "Noise Generator" }, \
 808         { name, "Tone Generator 1", "Tone Generator 1" }, \
 809         { name, "Tone Generator 2", "Tone Generator 2" }, \
 810         { name, "Haptics", "HAPTICS" }, \
 811         { name, "AEC1", "AEC1 Loopback" }, \
 812         { name, "AEC2", "AEC2 Loopback" }, \
 813         { name, "IN1L", "IN1L" }, \
 814         { name, "IN1R", "IN1R" }, \
 815         { name, "IN2L", "IN2L" }, \
 816         { name, "IN2R", "IN2R" }, \
 817         { name, "AIF1RX1", "AIF1RX1" }, \
 818         { name, "AIF1RX2", "AIF1RX2" }, \
 819         { name, "AIF1RX3", "AIF1RX3" }, \
 820         { name, "AIF1RX4", "AIF1RX4" }, \
 821         { name, "AIF1RX5", "AIF1RX5" }, \
 822         { name, "AIF1RX6", "AIF1RX6" }, \
 823         { name, "AIF2RX1", "AIF2RX1" }, \
 824         { name, "AIF2RX2", "AIF2RX2" }, \
 825         { name, "AIF2RX3", "AIF2RX3" }, \
 826         { name, "AIF2RX4", "AIF2RX4" }, \
 827         { name, "AIF3RX1", "AIF3RX1" }, \
 828         { name, "AIF3RX2", "AIF3RX2" }, \
 829         { name, "EQ1", "EQ1" }, \
 830         { name, "EQ2", "EQ2" }, \
 831         { name, "EQ3", "EQ3" }, \
 832         { name, "EQ4", "EQ4" }, \
 833         { name, "DRC1L", "DRC1L" }, \
 834         { name, "DRC1R", "DRC1R" }, \
 835         { name, "DRC2L", "DRC2L" }, \
 836         { name, "DRC2R", "DRC2R" }, \
 837         { name, "LHPF1", "LHPF1" }, \
 838         { name, "LHPF2", "LHPF2" }, \
 839         { name, "LHPF3", "LHPF3" }, \
 840         { name, "LHPF4", "LHPF4" }, \
 841         { name, "ISRC1DEC1", "ISRC1DEC1" }, \
 842         { name, "ISRC1DEC2", "ISRC1DEC2" }, \
 843         { name, "ISRC1DEC3", "ISRC1DEC3" }, \
 844         { name, "ISRC1DEC4", "ISRC1DEC4" }, \
 845         { name, "ISRC1INT1", "ISRC1INT1" }, \
 846         { name, "ISRC1INT2", "ISRC1INT2" }, \
 847         { name, "ISRC1INT3", "ISRC1INT3" }, \
 848         { name, "ISRC1INT4", "ISRC1INT4" }, \
 849         { name, "ISRC2DEC1", "ISRC2DEC1" }, \
 850         { name, "ISRC2DEC2", "ISRC2DEC2" }, \
 851         { name, "ISRC2DEC3", "ISRC2DEC3" }, \
 852         { name, "ISRC2DEC4", "ISRC2DEC4" }, \
 853         { name, "ISRC2INT1", "ISRC2INT1" }, \
 854         { name, "ISRC2INT2", "ISRC2INT2" }, \
 855         { name, "ISRC2INT3", "ISRC2INT3" }, \
 856         { name, "ISRC2INT4", "ISRC2INT4" }, \
 857         { name, "DSP1.1", "DSP1" }, \
 858         { name, "DSP1.2", "DSP1" }, \
 859         { name, "DSP1.3", "DSP1" }, \
 860         { name, "DSP1.4", "DSP1" }, \
 861         { name, "DSP1.5", "DSP1" }, \
 862         { name, "DSP1.6", "DSP1" }
 863
 864 static const struct snd_soc_dapm_route cs47l15_dapm_routes[] = {
 865         /* Internal clock domains */
 866         { "EQ1", NULL, "FXCLK" },
 867         { "EQ2", NULL, "FXCLK" },
 868         { "EQ3", NULL, "FXCLK" },
 869         { "EQ4", NULL, "FXCLK" },
 870         { "DRC1L", NULL, "FXCLK" },
 871         { "DRC1R", NULL, "FXCLK" },
 872         { "DRC2L", NULL, "FXCLK" },
 873         { "DRC2R", NULL, "FXCLK" },
 874         { "LHPF1", NULL, "FXCLK" },
 875         { "LHPF2", NULL, "FXCLK" },
 876         { "LHPF3", NULL, "FXCLK" },
 877         { "LHPF4", NULL, "FXCLK" },
 878         { "PWM1 Mixer", NULL, "PWMCLK" },
 879         { "PWM2 Mixer", NULL, "PWMCLK" },
 880         { "OUT1L", NULL, "OUTCLK" },
 881         { "OUT1R", NULL, "OUTCLK" },
 882         { "OUT4L", NULL, "OUTCLK" },
 883         { "OUT5L", NULL, "OUTCLK" },
 884         { "OUT5R", NULL, "OUTCLK" },
 885         { "AIF1TX1", NULL, "AIF1TXCLK" },
 886         { "AIF1TX2", NULL, "AIF1TXCLK" },
 887         { "AIF1TX3", NULL, "AIF1TXCLK" },
 888         { "AIF1TX4", NULL, "AIF1TXCLK" },
 889         { "AIF1TX5", NULL, "AIF1TXCLK" },
 890         { "AIF1TX6", NULL, "AIF1TXCLK" },
 891         { "AIF2TX1", NULL, "AIF2TXCLK" },
 892         { "AIF2TX2", NULL, "AIF2TXCLK" },
 893         { "AIF2TX3", NULL, "AIF2TXCLK" },
 894         { "AIF2TX4", NULL, "AIF2TXCLK" },
 895         { "AIF3TX1", NULL, "AIF3TXCLK" },
 896         { "AIF3TX2", NULL, "AIF3TXCLK" },
 897         { "SPD1TX1", NULL, "SPDCLK" },
 898         { "SPD1TX2", NULL, "SPDCLK" },
 899         { "DSP1", NULL, "DSP1CLK" },
 900         { "ISRC1DEC1", NULL, "ISRC1CLK" },
 901         { "ISRC1DEC2", NULL, "ISRC1CLK" },
 902         { "ISRC1DEC3", NULL, "ISRC1CLK" },
 903         { "ISRC1DEC4", NULL, "ISRC1CLK" },
 904         { "ISRC1INT1", NULL, "ISRC1CLK" },
 905         { "ISRC1INT2", NULL, "ISRC1CLK" },
 906         { "ISRC1INT3", NULL, "ISRC1CLK" },
 907         { "ISRC1INT4", NULL, "ISRC1CLK" },
 908         { "ISRC2DEC1", NULL, "ISRC2CLK" },
 909         { "ISRC2DEC2", NULL, "ISRC2CLK" },
 910         { "ISRC2DEC3", NULL, "ISRC2CLK" },
 911         { "ISRC2DEC4", NULL, "ISRC2CLK" },
 912         { "ISRC2INT1", NULL, "ISRC2CLK" },
 913         { "ISRC2INT2", NULL, "ISRC2CLK" },
 914         { "ISRC2INT3", NULL, "ISRC2CLK" },
 915         { "ISRC2INT4", NULL, "ISRC2CLK" },
 916
 917         { "OUT1L", NULL, "CPVDD1" },
 918         { "OUT1R", NULL, "CPVDD1" },
 919         { "OUT4L", NULL, "SPKVDD" },
 920
 921         { "OUT1L", NULL, "SYSCLK" },
 922         { "OUT1R", NULL, "SYSCLK" },
 923         { "OUT4L", NULL, "SYSCLK" },
 924         { "OUT5L", NULL, "SYSCLK" },
 925         { "OUT5R", NULL, "SYSCLK" },
 926
 927         { "SPD1", NULL, "SYSCLK" },
 928         { "SPD1", NULL, "SPD1TX1" },
 929         { "SPD1", NULL, "SPD1TX2" },
 930
 931         { "IN1L", NULL, "SYSCLK" },
 932         { "IN1R", NULL, "SYSCLK" },
 933         { "IN2L", NULL, "SYSCLK" },
 934         { "IN2R", NULL, "SYSCLK" },
 935
 936         { "MICBIAS1", NULL, "MICVDD" },
 937
 938         { "MICBIAS1A", NULL, "MICBIAS1" },
 939         { "MICBIAS1B", NULL, "MICBIAS1" },
 940         { "MICBIAS1C", NULL, "MICBIAS1" },
 941
 942         { "Noise Generator", NULL, "SYSCLK" },
 943         { "Tone Generator 1", NULL, "SYSCLK" },
 944         { "Tone Generator 2", NULL, "SYSCLK" },
 945
 946         { "Noise Generator", NULL, "NOISE" },
 947         { "Tone Generator 1", NULL, "TONE" },
 948         { "Tone Generator 2", NULL, "TONE" },
 949
 950         { "AIF1 Capture", NULL, "AIF1TX1" },
 951         { "AIF1 Capture", NULL, "AIF1TX2" },
 952         { "AIF1 Capture", NULL, "AIF1TX3" },
 953         { "AIF1 Capture", NULL, "AIF1TX4" },
 954         { "AIF1 Capture", NULL, "AIF1TX5" },
 955         { "AIF1 Capture", NULL, "AIF1TX6" },
 956
 957         { "AIF1RX1", NULL, "AIF1 Playback" },
 958         { "AIF1RX2", NULL, "AIF1 Playback" },
 959         { "AIF1RX3", NULL, "AIF1 Playback" },
 960         { "AIF1RX4", NULL, "AIF1 Playback" },
 961         { "AIF1RX5", NULL, "AIF1 Playback" },
 962         { "AIF1RX6", NULL, "AIF1 Playback" },
 963
 964         { "AIF2 Capture", NULL, "AIF2TX1" },
 965         { "AIF2 Capture", NULL, "AIF2TX2" },
 966         { "AIF2 Capture", NULL, "AIF2TX3" },
 967         { "AIF2 Capture", NULL, "AIF2TX4" },
 968
 969         { "AIF2RX1", NULL, "AIF2 Playback" },
 970         { "AIF2RX2", NULL, "AIF2 Playback" },
 971         { "AIF2RX3", NULL, "AIF2 Playback" },
 972         { "AIF2RX4", NULL, "AIF2 Playback" },
 973
 974         { "AIF3 Capture", NULL, "AIF3TX1" },
 975         { "AIF3 Capture", NULL, "AIF3TX2" },
 976
 977         { "AIF3RX1", NULL, "AIF3 Playback" },
 978         { "AIF3RX2", NULL, "AIF3 Playback" },
 979
 980         { "AIF1 Playback", NULL, "SYSCLK" },
 981         { "AIF2 Playback", NULL, "SYSCLK" },
 982         { "AIF3 Playback", NULL, "SYSCLK" },
 983
 984         { "AIF1 Capture", NULL, "SYSCLK" },
 985         { "AIF2 Capture", NULL, "SYSCLK" },
 986         { "AIF3 Capture", NULL, "SYSCLK" },
 987
 988         { "Audio Trace DSP", NULL, "DSP1" },
 989
 990         { "IN1L Analog Mux", "A", "IN1ALN" },
 991         { "IN1L Analog Mux", "A", "IN1ALP" },
 992         { "IN1L Analog Mux", "B", "IN1BLN" },
 993         { "IN1L Analog Mux", "B", "IN1BLP" },
 994         { "IN1R Analog Mux", "A", "IN1ARN" },
 995         { "IN1R Analog Mux", "A", "IN1ARP" },
 996         { "IN1R Analog Mux", "B", "IN1BRN" },
 997         { "IN1R Analog Mux", "B", "IN1BRP" },
 998
 999         { "IN1L Mode", "Analog", "IN1L Analog Mux" },
1000         { "IN1R Mode", "Analog", "IN1R Analog Mux" },
1001
1002         { "IN1L Mode", "Digital", "IN1ALN" },
1003         { "IN1L Mode", "Digital", "IN1ALP" },
1004         { "IN1R Mode", "Digital", "IN1ALN" },
1005         { "IN1R Mode", "Digital", "IN1ALP" },
1006
1007         { "IN1L", NULL, "IN1L Mode" },
1008         { "IN1R", NULL, "IN1R Mode" },
1009
1010         { "IN2L Mode", "Analog", "IN2N" },
1011         { "IN2L Mode", "Analog", "IN2P" },
1012
1013         { "IN2L Mode", "Digital", "SPKRXDAT" },
1014         { "IN2R Mode", "Digital", "SPKRXDAT" },
1015
1016         { "IN2L", NULL, "IN2L Mode" },
1017         { "IN2R", NULL, "IN2R Mode" },
1018
1019         MADERA_MIXER_ROUTES("OUT1L", "HPOUT1L"),
1020         MADERA_MIXER_ROUTES("OUT1R", "HPOUT1R"),
1021         MADERA_MIXER_ROUTES("OUT4L", "SPKOUTL"),
1022         MADERA_MIXER_ROUTES("OUT5L", "SPKDAT1L"),
1023         MADERA_MIXER_ROUTES("OUT5R", "SPKDAT1R"),
1024
1025         MADERA_MIXER_ROUTES("PWM1 Driver", "PWM1"),
1026         MADERA_MIXER_ROUTES("PWM2 Driver", "PWM2"),
1027
1028         MADERA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"),
1029         MADERA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"),
1030         MADERA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"),
1031         MADERA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"),
1032         MADERA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"),
1033         MADERA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"),
1034
1035         MADERA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"),
1036         MADERA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"),
1037         MADERA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"),
1038         MADERA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"),
1039
1040         MADERA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"),
1041         MADERA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"),
1042
1043         MADERA_MUX_ROUTES("SPD1TX1", "SPDIF1TX1"),
1044         MADERA_MUX_ROUTES("SPD1TX2", "SPDIF1TX2"),
1045
1046         MADERA_MIXER_ROUTES("EQ1", "EQ1"),
1047         MADERA_MIXER_ROUTES("EQ2", "EQ2"),
1048         MADERA_MIXER_ROUTES("EQ3", "EQ3"),
1049         MADERA_MIXER_ROUTES("EQ4", "EQ4"),
1050
1051         MADERA_MIXER_ROUTES("DRC1L", "DRC1L"),
1052         MADERA_MIXER_ROUTES("DRC1R", "DRC1R"),
1053         MADERA_MIXER_ROUTES("DRC2L", "DRC2L"),
1054         MADERA_MIXER_ROUTES("DRC2R", "DRC2R"),
1055
1056         MADERA_MIXER_ROUTES("LHPF1", "LHPF1"),
1057         MADERA_MIXER_ROUTES("LHPF2", "LHPF2"),
1058         MADERA_MIXER_ROUTES("LHPF3", "LHPF3"),
1059         MADERA_MIXER_ROUTES("LHPF4", "LHPF4"),
1060
1061         MADERA_DSP_ROUTES("DSP1"),
1062
1063         { "DSP Trigger Out", NULL, "DSP1 Trigger Output" },
1064
1065         { "DSP1 Trigger Output", "Switch", "DSP1" },
1066
1067         MADERA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"),
1068         MADERA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"),
1069         MADERA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"),
1070         MADERA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"),
1071
1072         MADERA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"),
1073         MADERA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"),
1074         MADERA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"),
1075         MADERA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"),
1076
1077         MADERA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"),
1078         MADERA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"),
1079         MADERA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"),
1080         MADERA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"),
1081
1082         MADERA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"),
1083         MADERA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"),
1084         MADERA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"),
1085         MADERA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"),
1086
1087         { "AEC1 Loopback", "HPOUT1L", "OUT1L" },
1088         { "AEC1 Loopback", "HPOUT1R", "OUT1R" },
1089         { "AEC2 Loopback", "HPOUT1L", "OUT1L" },
1090         { "AEC2 Loopback", "HPOUT1R", "OUT1R" },
1091         { "HPOUT1 Demux", NULL, "OUT1L" },
1092         { "HPOUT1 Demux", NULL, "OUT1R" },
1093
1094         { "OUT1R", NULL, "HPOUT1 Mono Mux" },
1095         { "HPOUT1 Mono Mux", "EPOUT", "OUT1L" },
1096
1097         { "HPOUTL", "HPOUT", "HPOUT1 Demux" },
1098         { "HPOUTR", "HPOUT", "HPOUT1 Demux" },
1099         { "EPOUTP", "EPOUT", "HPOUT1 Demux" },
1100         { "EPOUTN", "EPOUT", "HPOUT1 Demux" },
1101
1102         { "AEC1 Loopback", "SPKOUTL", "OUT4L" },
1103         { "AEC2 Loopback", "SPKOUTL", "OUT4L" },
1104         { "SPKOUTN", NULL, "OUT4L" },
1105         { "SPKOUTP", NULL, "OUT4L" },
1106
1107         { "AEC1 Loopback", "SPKDAT1L", "OUT5L" },
1108         { "AEC1 Loopback", "SPKDAT1R", "OUT5R" },
1109         { "AEC2 Loopback", "SPKDAT1L", "OUT5L" },
1110         { "AEC2 Loopback", "SPKDAT1R", "OUT5R" },
1111         { "SPKDAT1L", NULL, "OUT5L" },
1112         { "SPKDAT1R", NULL, "OUT5R" },
1113
1114         { "SPDIF1", NULL, "SPD1" },
1115
1116         { "MICSUPP", NULL, "SYSCLK" },
1117
1118         { "DRC1 Signal Activity", NULL, "DRC1 Activity Output" },
1119         { "DRC2 Signal Activity", NULL, "DRC2 Activity Output" },
1120         { "DRC1 Activity Output", "Switch", "DRC1L" },
1121         { "DRC1 Activity Output", "Switch", "DRC1R" },
1122         { "DRC2 Activity Output", "Switch", "DRC2L" },
1123         { "DRC2 Activity Output", "Switch", "DRC2R" },
1124 };
1125
1126 static int cs47l15_set_fll(struct snd_soc_component *component, int fll_id,
1127                            int source, unsigned int fref, unsigned int fout)
1128 {
1129         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1130
1131         switch (fll_id) {
1132         case MADERA_FLL1_REFCLK:
1133                 return madera_set_fll_refclk(&cs47l15->fll[0], source, fref,
1134                                              fout);
1135         case MADERA_FLLAO_REFCLK:
1136                 return madera_set_fll_ao_refclk(&cs47l15->fll[1], source, fref,
1137                                                 fout);
1138         case MADERA_FLL1_SYNCCLK:
1139                 return madera_set_fll_syncclk(&cs47l15->fll[0], source, fref,
1140                                               fout);
1141         default:
1142                 return -EINVAL;
1143         }
1144 }
1145
1146 static const struct snd_soc_dai_ops cs47l15_dai_ops = {
1147         .compress_new = snd_soc_new_compress,
1148 };
1149
1150 static struct snd_soc_dai_driver cs47l15_dai[] = {
1151         {
1152                 .name = "cs47l15-aif1",
1153                 .id = 1,
1154                 .base = MADERA_AIF1_BCLK_CTRL,
1155                 .playback = {
1156                         .stream_name = "AIF1 Playback",
1157                         .channels_min = 1,
1158                         .channels_max = 6,
1159                         .rates = MADERA_RATES,
1160                         .formats = MADERA_FORMATS,
1161                 },
1162                 .capture = {
1163                         .stream_name = "AIF1 Capture",
1164                         .channels_min = 1,
1165                         .channels_max = 6,
1166                         .rates = MADERA_RATES,
1167                         .formats = MADERA_FORMATS,
1168                  },
1169                 .ops = &madera_dai_ops,
1170                 .symmetric_rate = 1,
1171                 .symmetric_sample_bits = 1,
1172         },
1173         {
1174                 .name = "cs47l15-aif2",
1175                 .id = 2,
1176                 .base = MADERA_AIF2_BCLK_CTRL,
1177                 .playback = {
1178                         .stream_name = "AIF2 Playback",
1179                         .channels_min = 1,
1180                         .channels_max = 4,
1181                         .rates = MADERA_RATES,
1182                         .formats = MADERA_FORMATS,
1183                 },
1184                 .capture = {
1185                         .stream_name = "AIF2 Capture",
1186                         .channels_min = 1,
1187                         .channels_max = 4,
1188                         .rates = MADERA_RATES,
1189                         .formats = MADERA_FORMATS,
1190                  },
1191                 .ops = &madera_dai_ops,
1192                 .symmetric_rate = 1,
1193                 .symmetric_sample_bits = 1,
1194         },
1195         {
1196                 .name = "cs47l15-aif3",
1197                 .id = 3,
1198                 .base = MADERA_AIF3_BCLK_CTRL,
1199                 .playback = {
1200                         .stream_name = "AIF3 Playback",
1201                         .channels_min = 1,
1202                         .channels_max = 2,
1203                         .rates = MADERA_RATES,
1204                         .formats = MADERA_FORMATS,
1205                 },
1206                 .capture = {
1207                         .stream_name = "AIF3 Capture",
1208                         .channels_min = 1,
1209                         .channels_max = 2,
1210                         .rates = MADERA_RATES,
1211                         .formats = MADERA_FORMATS,
1212                  },
1213                 .ops = &madera_dai_ops,
1214                 .symmetric_rate = 1,
1215                 .symmetric_sample_bits = 1,
1216         },
1217         {
1218                 .name = "cs47l15-cpu-trace",
1219                 .capture = {
1220                         .stream_name = "Audio Trace CPU",
1221                         .channels_min = 1,
1222                         .channels_max = 6,
1223                         .rates = MADERA_RATES,
1224                         .formats = MADERA_FORMATS,
1225                 },
1226                 .ops = &cs47l15_dai_ops,
1227         },
1228         {
1229                 .name = "cs47l15-dsp-trace",
1230                 .capture = {
1231                         .stream_name = "Audio Trace DSP",
1232                         .channels_min = 1,
1233                         .channels_max = 6,
1234                         .rates = MADERA_RATES,
1235                         .formats = MADERA_FORMATS,
1236                 },
1237         },
1238 };
1239
1240 static int cs47l15_open(struct snd_soc_component *component,
1241                         struct snd_compr_stream *stream)
1242 {
1243         struct snd_soc_pcm_runtime *rtd = stream->private_data;
1244         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1245         struct madera_priv *priv = &cs47l15->core;
1246         struct madera *madera = priv->madera;
1247         int n_adsp;
1248
1249         if (strcmp(snd_soc_rtd_to_codec(rtd, 0)->name, "cs47l15-dsp-trace") == 0) {
1250                 n_adsp = 0;
1251         } else {
1252                 dev_err(madera->dev,
1253                         "No suitable compressed stream for DAI '%s'\n",
1254                         snd_soc_rtd_to_codec(rtd, 0)->name);
1255                 return -EINVAL;
1256         }
1257
1258         return wm_adsp_compr_open(&priv->adsp[n_adsp], stream);
1259 }
1260
1261 static irqreturn_t cs47l15_adsp2_irq(int irq, void *data)
1262 {
1263         struct cs47l15 *cs47l15 = data;
1264         struct madera_priv *priv = &cs47l15->core;
1265         struct madera *madera = priv->madera;
1266         int ret;
1267
1268         ret = wm_adsp_compr_handle_irq(&priv->adsp[0]);
1269         if (ret == -ENODEV) {
1270                 dev_err(madera->dev, "Spurious compressed data IRQ\n");
1271                 return IRQ_NONE;
1272         }
1273
1274         return IRQ_HANDLED;
1275 }
1276
1277 static const struct snd_soc_dapm_route cs47l15_mono_routes[] = {
1278         { "HPOUT1 Mono Mux", "HPOUT", "OUT1L" },
1279 };
1280
1281 static int cs47l15_component_probe(struct snd_soc_component *component)
1282 {
1283         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1284         struct madera *madera = cs47l15->core.madera;
1285         int ret;
1286
1287         snd_soc_component_init_regmap(component, madera->regmap);
1288
1289         mutex_lock(&madera->dapm_ptr_lock);
1290         madera->dapm = snd_soc_component_get_dapm(component);
1291         mutex_unlock(&madera->dapm_ptr_lock);
1292
1293         ret = madera_init_inputs(component);
1294         if (ret)
1295                 return ret;
1296
1297         ret = madera_init_outputs(component, cs47l15_mono_routes,
1298                                   ARRAY_SIZE(cs47l15_mono_routes),
1299                                   CS47L15_MONO_OUTPUTS);
1300         if (ret)
1301                 return ret;
1302
1303         snd_soc_component_disable_pin(component, "HAPTICS");
1304
1305         ret = snd_soc_add_component_controls(component,
1306                                              madera_adsp_rate_controls,
1307                                              CS47L15_NUM_ADSP);
1308         if (ret)
1309                 return ret;
1310
1311         wm_adsp2_component_probe(&cs47l15->core.adsp[0], component);
1312
1313         return 0;
1314 }
1315
1316 static void cs47l15_component_remove(struct snd_soc_component *component)
1317 {
1318         struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1319         struct madera *madera = cs47l15->core.madera;
1320
1321         mutex_lock(&madera->dapm_ptr_lock);
1322         madera->dapm = NULL;
1323         mutex_unlock(&madera->dapm_ptr_lock);
1324
1325         wm_adsp2_component_remove(&cs47l15->core.adsp[0], component);
1326 }
1327
1328 #define CS47L15_DIG_VU 0x0200
1329
1330 static unsigned int cs47l15_digital_vu[] = {
1331         MADERA_DAC_DIGITAL_VOLUME_1L,
1332         MADERA_DAC_DIGITAL_VOLUME_1R,
1333         MADERA_DAC_DIGITAL_VOLUME_4L,
1334         MADERA_DAC_DIGITAL_VOLUME_5L,
1335         MADERA_DAC_DIGITAL_VOLUME_5R,
1336 };
1337
1338 static const struct snd_compress_ops cs47l15_compress_ops = {
1339         .open = &cs47l15_open,
1340         .free = &wm_adsp_compr_free,
1341         .set_params = &wm_adsp_compr_set_params,
1342         .get_caps = &wm_adsp_compr_get_caps,
1343         .trigger = &wm_adsp_compr_trigger,
1344         .pointer = &wm_adsp_compr_pointer,
1345         .copy = &wm_adsp_compr_copy,
1346 };
1347
1348 static const struct snd_soc_component_driver soc_component_dev_cs47l15 = {
1349         .probe                  = &cs47l15_component_probe,
1350         .remove                 = &cs47l15_component_remove,
1351         .set_sysclk             = &madera_set_sysclk,
1352         .set_pll                = &cs47l15_set_fll,
1353         .name                   = DRV_NAME,
1354         .compress_ops           = &cs47l15_compress_ops,
1355         .controls               = cs47l15_snd_controls,
1356         .num_controls           = ARRAY_SIZE(cs47l15_snd_controls),
1357         .dapm_widgets           = cs47l15_dapm_widgets,
1358         .num_dapm_widgets       = ARRAY_SIZE(cs47l15_dapm_widgets),
1359         .dapm_routes            = cs47l15_dapm_routes,
1360         .num_dapm_routes        = ARRAY_SIZE(cs47l15_dapm_routes),
1361         .use_pmdown_time        = 1,
1362         .endianness             = 1,
1363 };
1364
1365 static int cs47l15_probe(struct platform_device *pdev)
1366 {
1367         struct madera *madera = dev_get_drvdata(pdev->dev.parent);
1368         struct cs47l15 *cs47l15;
1369         int i, ret;
1370
1371         BUILD_BUG_ON(ARRAY_SIZE(cs47l15_dai) > MADERA_MAX_DAI);
1372
1373         /* quick exit if Madera irqchip driver hasn't completed probe */
1374         if (!madera->irq_dev) {
1375                 dev_dbg(&pdev->dev, "irqchip driver not ready\n");
1376                 return -EPROBE_DEFER;
1377         }
1378
1379         cs47l15 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l15),
1380                                GFP_KERNEL);
1381         if (!cs47l15)
1382                 return -ENOMEM;
1383
1384         platform_set_drvdata(pdev, cs47l15);
1385
1386         cs47l15->core.madera = madera;
1387         cs47l15->core.dev = &pdev->dev;
1388         cs47l15->core.num_inputs = 4;
1389
1390         ret = madera_core_init(&cs47l15->core);
1391         if (ret)
1392                 return ret;
1393
1394         ret = madera_init_overheat(&cs47l15->core);
1395         if (ret)
1396                 goto error_core;
1397
1398         ret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1,
1399                                  "ADSP2 Compressed IRQ", cs47l15_adsp2_irq,
1400                                  cs47l15);
1401         if (ret != 0) {
1402                 dev_err(&pdev->dev, "Failed to request DSP IRQ: %d\n", ret);
1403                 goto error_overheat;
1404         }
1405
1406         ret = madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 1);
1407         if (ret)
1408                 dev_warn(&pdev->dev, "Failed to set DSP IRQ wake: %d\n", ret);
1409
1410         cs47l15->core.adsp[0].part = "cs47l15";
1411         cs47l15->core.adsp[0].cs_dsp.num = 1;
1412         cs47l15->core.adsp[0].cs_dsp.type = WMFW_ADSP2;
1413         cs47l15->core.adsp[0].cs_dsp.rev = 2;
1414         cs47l15->core.adsp[0].cs_dsp.dev = madera->dev;
1415         cs47l15->core.adsp[0].cs_dsp.regmap = madera->regmap_32bit;
1416
1417         cs47l15->core.adsp[0].cs_dsp.base = MADERA_DSP1_CONFIG_1;
1418         cs47l15->core.adsp[0].cs_dsp.mem = cs47l15_dsp1_regions;
1419         cs47l15->core.adsp[0].cs_dsp.num_mems = ARRAY_SIZE(cs47l15_dsp1_regions);
1420
1421         cs47l15->core.adsp[0].cs_dsp.lock_regions =
1422                 CS_ADSP2_REGION_1 | CS_ADSP2_REGION_2 | CS_ADSP2_REGION_3;
1423
1424         ret = wm_adsp2_init(&cs47l15->core.adsp[0]);
1425         if (ret != 0)
1426                 goto error_dsp_irq;
1427
1428         ret = madera_init_bus_error_irq(&cs47l15->core, 0, wm_adsp2_bus_error);
1429         if (ret)
1430                 goto error_adsp;
1431
1432         madera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1,
1433                         &cs47l15->fll[0]);
1434         madera_init_fll(madera, 4, MADERA_FLLAO_CONTROL_1 - 1,
1435                         &cs47l15->fll[1]);
1436
1437         for (i = 0; i < ARRAY_SIZE(cs47l15_dai); i++)
1438                 madera_init_dai(&cs47l15->core, i);
1439
1440         /* Latch volume update bits */
1441         for (i = 0; i < ARRAY_SIZE(cs47l15_digital_vu); i++)
1442                 regmap_update_bits(madera->regmap, cs47l15_digital_vu[i],
1443                                    CS47L15_DIG_VU, CS47L15_DIG_VU);
1444
1445         pm_runtime_enable(&pdev->dev);
1446         pm_runtime_idle(&pdev->dev);
1447
1448         ret = devm_snd_soc_register_component(&pdev->dev,
1449                                               &soc_component_dev_cs47l15,
1450                                               cs47l15_dai,
1451                                               ARRAY_SIZE(cs47l15_dai));
1452         if (ret < 0) {
1453                 dev_err(&pdev->dev, "Failed to register component: %d\n", ret);
1454                 goto error_pm_runtime;
1455         }
1456
1457         return ret;
1458
1459 error_pm_runtime:
1460         pm_runtime_disable(&pdev->dev);
1461         madera_free_bus_error_irq(&cs47l15->core, 0);
1462 error_adsp:
1463         wm_adsp2_remove(&cs47l15->core.adsp[0]);
1464 error_dsp_irq:
1465         madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 0);
1466         madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1467 error_overheat:
1468         madera_free_overheat(&cs47l15->core);
1469 error_core:
1470         madera_core_free(&cs47l15->core);
1471
1472         return ret;
1473 }
1474
1475 static void cs47l15_remove(struct platform_device *pdev)
1476 {
1477         struct cs47l15 *cs47l15 = platform_get_drvdata(pdev);
1478
1479         pm_runtime_disable(&pdev->dev);
1480
1481         madera_free_bus_error_irq(&cs47l15->core, 0);
1482
1483         wm_adsp2_remove(&cs47l15->core.adsp[0]);
1484
1485         madera_set_irq_wake(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, 0);
1486         madera_free_irq(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1487         madera_free_overheat(&cs47l15->core);
1488         madera_core_free(&cs47l15->core);
1489 }
1490
1491 static struct platform_driver cs47l15_codec_driver = {
1492         .driver = {
1493                 .name = "cs47l15-codec",
1494         },
1495         .probe = &cs47l15_probe,
1496         .remove = cs47l15_remove,
1497 };
1498
1499 module_platform_driver(cs47l15_codec_driver);
1500
1501 MODULE_SOFTDEP("pre: madera irq-madera arizona-micsupp");
1502 MODULE_DESCRIPTION("ASoC CS47L15 driver");
1503 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1504 MODULE_AUTHOR("Jaswinder Jassal <jjassal@opensource.cirrus.com>");
1505 MODULE_LICENSE("GPL v2");
1506 MODULE_ALIAS("platform:cs47l15-codec");