?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
drm/rockchip: dw_hdmi_qp: Add basic RK3576 HDMI output support
[drm/drm-misc.git] / sound / soc / codecs / da7219.c
blobe2da3e317b5a3e5c914b1c4cd1c0fa9b452544b5
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * da7219.c - DA7219 ALSA SoC Codec Driver
4 *
5 * Copyright (c) 2015 Dialog Semiconductor
6 *
7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/clk.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk-provider.h>
14 #include <linux/i2c.h>
15 #include <linux/of.h>
16 #include <linux/property.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/pm.h>
20 #include <linux/module.h>
21 #include <linux/delay.h>
22 #include <linux/regulator/consumer.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <asm/div64.h>
30
31 #include <sound/da7219.h>
32 #include "da7219.h"
33 #include "da7219-aad.h"
34
35
36 /*
37 * TLVs and Enums
38 */
39
40 /* Input TLVs */
41 static const DECLARE_TLV_DB_SCALE(da7219_mic_gain_tlv, -600, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7219_mixin_gain_tlv, -450, 150, 0);
43 static const DECLARE_TLV_DB_SCALE(da7219_adc_dig_gain_tlv, -8325, 75, 0);
44 static const DECLARE_TLV_DB_SCALE(da7219_alc_threshold_tlv, -9450, 150, 0);
45 static const DECLARE_TLV_DB_SCALE(da7219_alc_gain_tlv, 0, 600, 0);
46 static const DECLARE_TLV_DB_SCALE(da7219_alc_ana_gain_tlv, 0, 600, 0);
47 static const DECLARE_TLV_DB_SCALE(da7219_sidetone_gain_tlv, -4200, 300, 0);
48 static const DECLARE_TLV_DB_SCALE(da7219_tonegen_gain_tlv, -4500, 300, 0);
49
50 /* Output TLVs */
51 static const DECLARE_TLV_DB_SCALE(da7219_dac_eq_band_tlv, -1050, 150, 0);
52
53 static const DECLARE_TLV_DB_RANGE(da7219_dac_dig_gain_tlv,
54 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
55 /* -77.25dB to 12dB */
56 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7725, 75, 0)
57 );
58
59 static const DECLARE_TLV_DB_SCALE(da7219_dac_ng_threshold_tlv, -10200, 600, 0);
60 static const DECLARE_TLV_DB_SCALE(da7219_hp_gain_tlv, -5700, 100, 0);
61
62 /* Input Enums */
63 static const char * const da7219_alc_attack_rate_txt[] = {
64 "7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs",
65 "469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs",
66 "30024/fs"
67 };
68
69 static const struct soc_enum da7219_alc_attack_rate =
70 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_ATTACK_SHIFT,
71 DA7219_ALC_ATTACK_MAX, da7219_alc_attack_rate_txt);
72
73 static const char * const da7219_alc_release_rate_txt[] = {
74 "28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs",
75 "1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs"
76 };
77
78 static const struct soc_enum da7219_alc_release_rate =
79 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_RELEASE_SHIFT,
80 DA7219_ALC_RELEASE_MAX, da7219_alc_release_rate_txt);
81
82 static const char * const da7219_alc_hold_time_txt[] = {
83 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
84 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
85 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
86 };
87
88 static const struct soc_enum da7219_alc_hold_time =
89 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_HOLD_SHIFT,
90 DA7219_ALC_HOLD_MAX, da7219_alc_hold_time_txt);
91
92 static const char * const da7219_alc_env_rate_txt[] = {
93 "1/4", "1/16", "1/256", "1/65536"
94 };
95
96 static const struct soc_enum da7219_alc_env_attack_rate =
97 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_ATTACK_SHIFT,
98 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
99
100 static const struct soc_enum da7219_alc_env_release_rate =
101 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_RELEASE_SHIFT,
102 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
103
104 static const char * const da7219_alc_anticlip_step_txt[] = {
105 "0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs"
106 };
107
108 static const struct soc_enum da7219_alc_anticlip_step =
109 SOC_ENUM_SINGLE(DA7219_ALC_ANTICLIP_CTRL,
110 DA7219_ALC_ANTICLIP_STEP_SHIFT,
111 DA7219_ALC_ANTICLIP_STEP_MAX,
112 da7219_alc_anticlip_step_txt);
113
114 /* Input/Output Enums */
115 static const char * const da7219_gain_ramp_rate_txt[] = {
116 "Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8",
117 "Nominal Rate / 16"
118 };
119
120 static const struct soc_enum da7219_gain_ramp_rate =
121 SOC_ENUM_SINGLE(DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_SHIFT,
122 DA7219_GAIN_RAMP_RATE_MAX, da7219_gain_ramp_rate_txt);
123
124 static const char * const da7219_hpf_mode_txt[] = {
125 "Disabled", "Audio", "Voice"
126 };
127
128 static const unsigned int da7219_hpf_mode_val[] = {
129 DA7219_HPF_DISABLED, DA7219_HPF_AUDIO_EN, DA7219_HPF_VOICE_EN,
130 };
131
132 static const struct soc_enum da7219_adc_hpf_mode =
133 SOC_VALUE_ENUM_SINGLE(DA7219_ADC_FILTERS1, DA7219_HPF_MODE_SHIFT,
134 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
135 da7219_hpf_mode_txt, da7219_hpf_mode_val);
136
137 static const struct soc_enum da7219_dac_hpf_mode =
138 SOC_VALUE_ENUM_SINGLE(DA7219_DAC_FILTERS1, DA7219_HPF_MODE_SHIFT,
139 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
140 da7219_hpf_mode_txt, da7219_hpf_mode_val);
141
142 static const char * const da7219_audio_hpf_corner_txt[] = {
143 "2Hz", "4Hz", "8Hz", "16Hz"
144 };
145
146 static const struct soc_enum da7219_adc_audio_hpf_corner =
147 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
148 DA7219_ADC_AUDIO_HPF_CORNER_SHIFT,
149 DA7219_AUDIO_HPF_CORNER_MAX,
150 da7219_audio_hpf_corner_txt);
151
152 static const struct soc_enum da7219_dac_audio_hpf_corner =
153 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
154 DA7219_DAC_AUDIO_HPF_CORNER_SHIFT,
155 DA7219_AUDIO_HPF_CORNER_MAX,
156 da7219_audio_hpf_corner_txt);
157
158 static const char * const da7219_voice_hpf_corner_txt[] = {
159 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
160 };
161
162 static const struct soc_enum da7219_adc_voice_hpf_corner =
163 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
164 DA7219_ADC_VOICE_HPF_CORNER_SHIFT,
165 DA7219_VOICE_HPF_CORNER_MAX,
166 da7219_voice_hpf_corner_txt);
167
168 static const struct soc_enum da7219_dac_voice_hpf_corner =
169 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
170 DA7219_DAC_VOICE_HPF_CORNER_SHIFT,
171 DA7219_VOICE_HPF_CORNER_MAX,
172 da7219_voice_hpf_corner_txt);
173
174 static const char * const da7219_tonegen_dtmf_key_txt[] = {
175 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
176 "*", "#"
177 };
178
179 static const struct soc_enum da7219_tonegen_dtmf_key =
180 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG1, DA7219_DTMF_REG_SHIFT,
181 DA7219_DTMF_REG_MAX, da7219_tonegen_dtmf_key_txt);
182
183 static const char * const da7219_tonegen_swg_sel_txt[] = {
184 "Sum", "SWG1", "SWG2", "SWG1_1-Cos"
185 };
186
187 static const struct soc_enum da7219_tonegen_swg_sel =
188 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG2, DA7219_SWG_SEL_SHIFT,
189 DA7219_SWG_SEL_MAX, da7219_tonegen_swg_sel_txt);
190
191 /* Output Enums */
192 static const char * const da7219_dac_softmute_rate_txt[] = {
193 "1 Sample", "2 Samples", "4 Samples", "8 Samples", "16 Samples",
194 "32 Samples", "64 Samples"
195 };
196
197 static const struct soc_enum da7219_dac_softmute_rate =
198 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS5, DA7219_DAC_SOFTMUTE_RATE_SHIFT,
199 DA7219_DAC_SOFTMUTE_RATE_MAX,
200 da7219_dac_softmute_rate_txt);
201
202 static const char * const da7219_dac_ng_setup_time_txt[] = {
203 "256 Samples", "512 Samples", "1024 Samples", "2048 Samples"
204 };
205
206 static const struct soc_enum da7219_dac_ng_setup_time =
207 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
208 DA7219_DAC_NG_SETUP_TIME_SHIFT,
209 DA7219_DAC_NG_SETUP_TIME_MAX,
210 da7219_dac_ng_setup_time_txt);
211
212 static const char * const da7219_dac_ng_rampup_txt[] = {
213 "0.22ms/dB", "0.0138ms/dB"
214 };
215
216 static const struct soc_enum da7219_dac_ng_rampup_rate =
217 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
218 DA7219_DAC_NG_RAMPUP_RATE_SHIFT,
219 DA7219_DAC_NG_RAMP_RATE_MAX,
220 da7219_dac_ng_rampup_txt);
221
222 static const char * const da7219_dac_ng_rampdown_txt[] = {
223 "0.88ms/dB", "14.08ms/dB"
224 };
225
226 static const struct soc_enum da7219_dac_ng_rampdown_rate =
227 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
228 DA7219_DAC_NG_RAMPDN_RATE_SHIFT,
229 DA7219_DAC_NG_RAMP_RATE_MAX,
230 da7219_dac_ng_rampdown_txt);
231
232
233 static const char * const da7219_cp_track_mode_txt[] = {
234 "Largest Volume", "DAC Volume", "Signal Magnitude"
235 };
236
237 static const unsigned int da7219_cp_track_mode_val[] = {
238 DA7219_CP_MCHANGE_LARGEST_VOL, DA7219_CP_MCHANGE_DAC_VOL,
239 DA7219_CP_MCHANGE_SIG_MAG
240 };
241
242 static const struct soc_enum da7219_cp_track_mode =
243 SOC_VALUE_ENUM_SINGLE(DA7219_CP_CTRL, DA7219_CP_MCHANGE_SHIFT,
244 DA7219_CP_MCHANGE_REL_MASK, DA7219_CP_MCHANGE_MAX,
245 da7219_cp_track_mode_txt,
246 da7219_cp_track_mode_val);
247
248
249 /*
250 * Control Functions
251 */
252
253 /* Locked Kcontrol calls */
254 static int da7219_volsw_locked_get(struct snd_kcontrol *kcontrol,
255 struct snd_ctl_elem_value *ucontrol)
256 {
257 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
258 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
259 int ret;
260
261 mutex_lock(&da7219->ctrl_lock);
262 ret = snd_soc_get_volsw(kcontrol, ucontrol);
263 mutex_unlock(&da7219->ctrl_lock);
264
265 return ret;
266 }
267
268 static int da7219_volsw_locked_put(struct snd_kcontrol *kcontrol,
269 struct snd_ctl_elem_value *ucontrol)
270 {
271 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
272 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
273 int ret;
274
275 mutex_lock(&da7219->ctrl_lock);
276 ret = snd_soc_put_volsw(kcontrol, ucontrol);
277 mutex_unlock(&da7219->ctrl_lock);
278
279 return ret;
280 }
281
282 static int da7219_enum_locked_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
284 {
285 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
286 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
287 int ret;
288
289 mutex_lock(&da7219->ctrl_lock);
290 ret = snd_soc_get_enum_double(kcontrol, ucontrol);
291 mutex_unlock(&da7219->ctrl_lock);
292
293 return ret;
294 }
295
296 static int da7219_enum_locked_put(struct snd_kcontrol *kcontrol,
297 struct snd_ctl_elem_value *ucontrol)
298 {
299 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
300 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
301 int ret;
302
303 mutex_lock(&da7219->ctrl_lock);
304 ret = snd_soc_put_enum_double(kcontrol, ucontrol);
305 mutex_unlock(&da7219->ctrl_lock);
306
307 return ret;
308 }
309
310 /* ALC */
311 static void da7219_alc_calib(struct snd_soc_component *component)
312 {
313 u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl;
314
315 /* Save current state of mic control register */
316 mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL);
317
318 /* Save current state of input mixer control register */
319 mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL);
320
321 /* Save current state of input ADC control register */
322 adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL);
323
324 /* Enable then Mute MIC PGAs */
325 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK,
326 DA7219_MIC_1_AMP_EN_MASK);
327 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL,
328 DA7219_MIC_1_AMP_MUTE_EN_MASK,
329 DA7219_MIC_1_AMP_MUTE_EN_MASK);
330
331 /* Enable input mixers unmuted */
332 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
333 DA7219_MIXIN_L_AMP_EN_MASK |
334 DA7219_MIXIN_L_AMP_MUTE_EN_MASK,
335 DA7219_MIXIN_L_AMP_EN_MASK);
336
337 /* Enable input filters unmuted */
338 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL,
339 DA7219_ADC_L_MUTE_EN_MASK | DA7219_ADC_L_EN_MASK,
340 DA7219_ADC_L_EN_MASK);
341
342 /* Perform auto calibration */
343 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
344 DA7219_ALC_AUTO_CALIB_EN_MASK,
345 DA7219_ALC_AUTO_CALIB_EN_MASK);
346 do {
347 calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1);
348 } while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK);
349
350 /* If auto calibration fails, disable DC offset, hybrid ALC */
351 if (calib_ctrl & DA7219_ALC_CALIB_OVERFLOW_MASK) {
352 dev_warn(component->dev,
353 "ALC auto calibration failed with overflow\n");
354 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
355 DA7219_ALC_OFFSET_EN_MASK |
356 DA7219_ALC_SYNC_MODE_MASK, 0);
357 } else {
358 /* Enable DC offset cancellation, hybrid mode */
359 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
360 DA7219_ALC_OFFSET_EN_MASK |
361 DA7219_ALC_SYNC_MODE_MASK,
362 DA7219_ALC_OFFSET_EN_MASK |
363 DA7219_ALC_SYNC_MODE_MASK);
364 }
365
366 /* Restore input filter control register to original state */
367 snd_soc_component_write(component, DA7219_ADC_L_CTRL, adc_ctrl);
368
369 /* Restore input mixer control registers to original state */
370 snd_soc_component_write(component, DA7219_MIXIN_L_CTRL, mixin_ctrl);
371
372 /* Restore MIC control registers to original states */
373 snd_soc_component_write(component, DA7219_MIC_1_CTRL, mic_ctrl);
374 }
375
376 static int da7219_mixin_gain_put(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol)
378 {
379 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
380 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
381 int ret;
382
383 ret = snd_soc_put_volsw(kcontrol, ucontrol);
384
385 /*
386 * If ALC in operation and value of control has been updated,
387 * make sure calibrated offsets are updated.
388 */
389 if ((ret == 1) && (da7219->alc_en))
390 da7219_alc_calib(component);
391
392 return ret;
393 }
394
395 static int da7219_alc_sw_put(struct snd_kcontrol *kcontrol,
396 struct snd_ctl_elem_value *ucontrol)
397 {
398 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
399 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
400
401
402 /* Force ALC offset calibration if enabling ALC */
403 if ((ucontrol->value.integer.value[0]) && (!da7219->alc_en)) {
404 da7219_alc_calib(component);
405 da7219->alc_en = true;
406 } else {
407 da7219->alc_en = false;
408 }
409
410 return snd_soc_put_volsw(kcontrol, ucontrol);
411 }
412
413 /* ToneGen */
414 static int da7219_tonegen_freq_get(struct snd_kcontrol *kcontrol,
415 struct snd_ctl_elem_value *ucontrol)
416 {
417 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
418 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
419 struct soc_mixer_control *mixer_ctrl =
420 (struct soc_mixer_control *) kcontrol->private_value;
421 unsigned int reg = mixer_ctrl->reg;
422 __le16 val;
423 int ret;
424
425 mutex_lock(&da7219->ctrl_lock);
426 ret = regmap_raw_read(da7219->regmap, reg, &val, sizeof(val));
427 mutex_unlock(&da7219->ctrl_lock);
428
429 if (ret)
430 return ret;
431
432 /*
433 * Frequency value spans two 8-bit registers, lower then upper byte.
434 * Therefore we need to convert to host endianness here.
435 */
436 ucontrol->value.integer.value[0] = le16_to_cpu(val);
437
438 return 0;
439 }
440
441 static int da7219_tonegen_freq_put(struct snd_kcontrol *kcontrol,
442 struct snd_ctl_elem_value *ucontrol)
443 {
444 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
445 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
446 struct soc_mixer_control *mixer_ctrl =
447 (struct soc_mixer_control *) kcontrol->private_value;
448 unsigned int reg = mixer_ctrl->reg;
449 __le16 val_new, val_old;
450 int ret;
451
452 /*
453 * Frequency value spans two 8-bit registers, lower then upper byte.
454 * Therefore we need to convert to little endian here to align with
455 * HW registers.
456 */
457 val_new = cpu_to_le16(ucontrol->value.integer.value[0]);
458
459 mutex_lock(&da7219->ctrl_lock);
460 ret = regmap_raw_read(da7219->regmap, reg, &val_old, sizeof(val_old));
461 if (ret == 0 && (val_old != val_new))
462 ret = regmap_raw_write(da7219->regmap, reg,
463 &val_new, sizeof(val_new));
464 mutex_unlock(&da7219->ctrl_lock);
465
466 if (ret < 0)
467 return ret;
468
469 return val_old != val_new;
470 }
471
472
473 /*
474 * KControls
475 */
476
477 static const struct snd_kcontrol_new da7219_snd_controls[] = {
478 /* Mics */
479 SOC_SINGLE_TLV("Mic Volume", DA7219_MIC_1_GAIN,
480 DA7219_MIC_1_AMP_GAIN_SHIFT, DA7219_MIC_1_AMP_GAIN_MAX,
481 DA7219_NO_INVERT, da7219_mic_gain_tlv),
482 SOC_SINGLE("Mic Switch", DA7219_MIC_1_CTRL,
483 DA7219_MIC_1_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
484 DA7219_INVERT),
485
486 /* Mixer Input */
487 SOC_SINGLE_EXT_TLV("Mixin Volume", DA7219_MIXIN_L_GAIN,
488 DA7219_MIXIN_L_AMP_GAIN_SHIFT,
489 DA7219_MIXIN_L_AMP_GAIN_MAX, DA7219_NO_INVERT,
490 snd_soc_get_volsw, da7219_mixin_gain_put,
491 da7219_mixin_gain_tlv),
492 SOC_SINGLE("Mixin Switch", DA7219_MIXIN_L_CTRL,
493 DA7219_MIXIN_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
494 DA7219_INVERT),
495 SOC_SINGLE("Mixin Gain Ramp Switch", DA7219_MIXIN_L_CTRL,
496 DA7219_MIXIN_L_AMP_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
497 DA7219_NO_INVERT),
498 SOC_SINGLE("Mixin ZC Gain Switch", DA7219_MIXIN_L_CTRL,
499 DA7219_MIXIN_L_AMP_ZC_EN_SHIFT, DA7219_SWITCH_EN_MAX,
500 DA7219_NO_INVERT),
501
502 /* ADC */
503 SOC_SINGLE_TLV("Capture Digital Volume", DA7219_ADC_L_GAIN,
504 DA7219_ADC_L_DIGITAL_GAIN_SHIFT,
505 DA7219_ADC_L_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
506 da7219_adc_dig_gain_tlv),
507 SOC_SINGLE("Capture Digital Switch", DA7219_ADC_L_CTRL,
508 DA7219_ADC_L_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
509 DA7219_INVERT),
510 SOC_SINGLE("Capture Digital Gain Ramp Switch", DA7219_ADC_L_CTRL,
511 DA7219_ADC_L_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
512 DA7219_NO_INVERT),
513
514 /* ALC */
515 SOC_ENUM("ALC Attack Rate", da7219_alc_attack_rate),
516 SOC_ENUM("ALC Release Rate", da7219_alc_release_rate),
517 SOC_ENUM("ALC Hold Time", da7219_alc_hold_time),
518 SOC_ENUM("ALC Envelope Attack Rate", da7219_alc_env_attack_rate),
519 SOC_ENUM("ALC Envelope Release Rate", da7219_alc_env_release_rate),
520 SOC_SINGLE_TLV("ALC Noise Threshold", DA7219_ALC_NOISE,
521 DA7219_ALC_NOISE_SHIFT, DA7219_ALC_THRESHOLD_MAX,
522 DA7219_INVERT, da7219_alc_threshold_tlv),
523 SOC_SINGLE_TLV("ALC Min Threshold", DA7219_ALC_TARGET_MIN,
524 DA7219_ALC_THRESHOLD_MIN_SHIFT, DA7219_ALC_THRESHOLD_MAX,
525 DA7219_INVERT, da7219_alc_threshold_tlv),
526 SOC_SINGLE_TLV("ALC Max Threshold", DA7219_ALC_TARGET_MAX,
527 DA7219_ALC_THRESHOLD_MAX_SHIFT, DA7219_ALC_THRESHOLD_MAX,
528 DA7219_INVERT, da7219_alc_threshold_tlv),
529 SOC_SINGLE_TLV("ALC Max Attenuation", DA7219_ALC_GAIN_LIMITS,
530 DA7219_ALC_ATTEN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
531 DA7219_NO_INVERT, da7219_alc_gain_tlv),
532 SOC_SINGLE_TLV("ALC Max Volume", DA7219_ALC_GAIN_LIMITS,
533 DA7219_ALC_GAIN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
534 DA7219_NO_INVERT, da7219_alc_gain_tlv),
535 SOC_SINGLE_RANGE_TLV("ALC Min Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
536 DA7219_ALC_ANA_GAIN_MIN_SHIFT,
537 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
538 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
539 SOC_SINGLE_RANGE_TLV("ALC Max Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
540 DA7219_ALC_ANA_GAIN_MAX_SHIFT,
541 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
542 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
543 SOC_ENUM("ALC Anticlip Step", da7219_alc_anticlip_step),
544 SOC_SINGLE("ALC Anticlip Switch", DA7219_ALC_ANTICLIP_CTRL,
545 DA7219_ALC_ANTIPCLIP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
546 DA7219_NO_INVERT),
547 SOC_SINGLE_EXT("ALC Switch", DA7219_ALC_CTRL1, DA7219_ALC_EN_SHIFT,
548 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT,
549 snd_soc_get_volsw, da7219_alc_sw_put),
550
551 /* Input High-Pass Filters */
552 SOC_ENUM("ADC HPF Mode", da7219_adc_hpf_mode),
553 SOC_ENUM("ADC HPF Corner Audio", da7219_adc_audio_hpf_corner),
554 SOC_ENUM("ADC HPF Corner Voice", da7219_adc_voice_hpf_corner),
555
556 /* Sidetone Filter */
557 SOC_SINGLE_TLV("Sidetone Volume", DA7219_SIDETONE_GAIN,
558 DA7219_SIDETONE_GAIN_SHIFT, DA7219_SIDETONE_GAIN_MAX,
559 DA7219_NO_INVERT, da7219_sidetone_gain_tlv),
560 SOC_SINGLE("Sidetone Switch", DA7219_SIDETONE_CTRL,
561 DA7219_SIDETONE_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
562 DA7219_INVERT),
563
564 /* Tone Generator */
565 SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7219_TONE_GEN_CFG2,
566 DA7219_TONE_GEN_GAIN_SHIFT, DA7219_TONE_GEN_GAIN_MAX,
567 DA7219_NO_INVERT, da7219_volsw_locked_get,
568 da7219_volsw_locked_put, da7219_tonegen_gain_tlv),
569 SOC_ENUM_EXT("ToneGen DTMF Key", da7219_tonegen_dtmf_key,
570 da7219_enum_locked_get, da7219_enum_locked_put),
571 SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7219_TONE_GEN_CFG1,
572 DA7219_DTMF_EN_SHIFT, DA7219_SWITCH_EN_MAX,
573 DA7219_NO_INVERT, da7219_volsw_locked_get,
574 da7219_volsw_locked_put),
575 SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7219_tonegen_swg_sel,
576 da7219_enum_locked_get, da7219_enum_locked_put),
577 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7219_TONE_GEN_FREQ1_L,
578 DA7219_FREQ1_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
579 da7219_tonegen_freq_get, da7219_tonegen_freq_put),
580 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7219_TONE_GEN_FREQ2_L,
581 DA7219_FREQ2_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
582 da7219_tonegen_freq_get, da7219_tonegen_freq_put),
583 SOC_SINGLE_EXT("ToneGen On Time", DA7219_TONE_GEN_ON_PER,
584 DA7219_BEEP_ON_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
585 DA7219_NO_INVERT, da7219_volsw_locked_get,
586 da7219_volsw_locked_put),
587 SOC_SINGLE("ToneGen Off Time", DA7219_TONE_GEN_OFF_PER,
588 DA7219_BEEP_OFF_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
589 DA7219_NO_INVERT),
590
591 /* Gain ramping */
592 SOC_ENUM("Gain Ramp Rate", da7219_gain_ramp_rate),
593
594 /* DAC High-Pass Filter */
595 SOC_ENUM_EXT("DAC HPF Mode", da7219_dac_hpf_mode,
596 da7219_enum_locked_get, da7219_enum_locked_put),
597 SOC_ENUM("DAC HPF Corner Audio", da7219_dac_audio_hpf_corner),
598 SOC_ENUM("DAC HPF Corner Voice", da7219_dac_voice_hpf_corner),
599
600 /* DAC 5-Band Equaliser */
601 SOC_SINGLE_TLV("DAC EQ Band1 Volume", DA7219_DAC_FILTERS2,
602 DA7219_DAC_EQ_BAND1_SHIFT, DA7219_DAC_EQ_BAND_MAX,
603 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
604 SOC_SINGLE_TLV("DAC EQ Band2 Volume", DA7219_DAC_FILTERS2,
605 DA7219_DAC_EQ_BAND2_SHIFT, DA7219_DAC_EQ_BAND_MAX,
606 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
607 SOC_SINGLE_TLV("DAC EQ Band3 Volume", DA7219_DAC_FILTERS3,
608 DA7219_DAC_EQ_BAND3_SHIFT, DA7219_DAC_EQ_BAND_MAX,
609 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
610 SOC_SINGLE_TLV("DAC EQ Band4 Volume", DA7219_DAC_FILTERS3,
611 DA7219_DAC_EQ_BAND4_SHIFT, DA7219_DAC_EQ_BAND_MAX,
612 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
613 SOC_SINGLE_TLV("DAC EQ Band5 Volume", DA7219_DAC_FILTERS4,
614 DA7219_DAC_EQ_BAND5_SHIFT, DA7219_DAC_EQ_BAND_MAX,
615 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
616 SOC_SINGLE_EXT("DAC EQ Switch", DA7219_DAC_FILTERS4,
617 DA7219_DAC_EQ_EN_SHIFT, DA7219_SWITCH_EN_MAX,
618 DA7219_NO_INVERT, da7219_volsw_locked_get,
619 da7219_volsw_locked_put),
620
621 /* DAC Softmute */
622 SOC_ENUM("DAC Soft Mute Rate", da7219_dac_softmute_rate),
623 SOC_SINGLE_EXT("DAC Soft Mute Switch", DA7219_DAC_FILTERS5,
624 DA7219_DAC_SOFTMUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
625 DA7219_NO_INVERT, da7219_volsw_locked_get,
626 da7219_volsw_locked_put),
627
628 /* DAC Noise Gate */
629 SOC_ENUM("DAC NG Setup Time", da7219_dac_ng_setup_time),
630 SOC_ENUM("DAC NG Rampup Rate", da7219_dac_ng_rampup_rate),
631 SOC_ENUM("DAC NG Rampdown Rate", da7219_dac_ng_rampdown_rate),
632 SOC_SINGLE_TLV("DAC NG Off Threshold", DA7219_DAC_NG_OFF_THRESH,
633 DA7219_DAC_NG_OFF_THRESHOLD_SHIFT,
634 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
635 da7219_dac_ng_threshold_tlv),
636 SOC_SINGLE_TLV("DAC NG On Threshold", DA7219_DAC_NG_ON_THRESH,
637 DA7219_DAC_NG_ON_THRESHOLD_SHIFT,
638 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
639 da7219_dac_ng_threshold_tlv),
640 SOC_SINGLE("DAC NG Switch", DA7219_DAC_NG_CTRL, DA7219_DAC_NG_EN_SHIFT,
641 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
642
643 /* DACs */
644 SOC_DOUBLE_R_EXT_TLV("Playback Digital Volume", DA7219_DAC_L_GAIN,
645 DA7219_DAC_R_GAIN, DA7219_DAC_L_DIGITAL_GAIN_SHIFT,
646 DA7219_DAC_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
647 da7219_volsw_locked_get, da7219_volsw_locked_put,
648 da7219_dac_dig_gain_tlv),
649 SOC_DOUBLE_R_EXT("Playback Digital Switch", DA7219_DAC_L_CTRL,
650 DA7219_DAC_R_CTRL, DA7219_DAC_L_MUTE_EN_SHIFT,
651 DA7219_SWITCH_EN_MAX, DA7219_INVERT,
652 da7219_volsw_locked_get, da7219_volsw_locked_put),
653 SOC_DOUBLE_R("Playback Digital Gain Ramp Switch", DA7219_DAC_L_CTRL,
654 DA7219_DAC_R_CTRL, DA7219_DAC_L_RAMP_EN_SHIFT,
655 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
656
657 /* CP */
658 SOC_ENUM("Charge Pump Track Mode", da7219_cp_track_mode),
659 SOC_SINGLE("Charge Pump Threshold", DA7219_CP_VOL_THRESHOLD1,
660 DA7219_CP_THRESH_VDD2_SHIFT, DA7219_CP_THRESH_VDD2_MAX,
661 DA7219_NO_INVERT),
662
663 /* Headphones */
664 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", DA7219_HP_L_GAIN,
665 DA7219_HP_R_GAIN, DA7219_HP_L_AMP_GAIN_SHIFT,
666 DA7219_HP_AMP_GAIN_MAX, DA7219_NO_INVERT,
667 da7219_volsw_locked_get, da7219_volsw_locked_put,
668 da7219_hp_gain_tlv),
669 SOC_DOUBLE_R_EXT("Headphone Switch", DA7219_HP_L_CTRL, DA7219_HP_R_CTRL,
670 DA7219_HP_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
671 DA7219_INVERT, da7219_volsw_locked_get,
672 da7219_volsw_locked_put),
673 SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7219_HP_L_CTRL,
674 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_RAMP_EN_SHIFT,
675 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
676 SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7219_HP_L_CTRL,
677 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_ZC_EN_SHIFT,
678 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
679 };
680
681
682 /*
683 * DAPM Mux Controls
684 */
685
686 static const char * const da7219_out_sel_txt[] = {
687 "ADC", "Tone Generator", "DAIL", "DAIR"
688 };
689
690 static const struct soc_enum da7219_out_dail_sel =
691 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
692 DA7219_DAI_L_SRC_SHIFT,
693 DA7219_OUT_SRC_MAX,
694 da7219_out_sel_txt);
695
696 static const struct snd_kcontrol_new da7219_out_dail_sel_mux =
697 SOC_DAPM_ENUM("Out DAIL Mux", da7219_out_dail_sel);
698
699 static const struct soc_enum da7219_out_dair_sel =
700 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
701 DA7219_DAI_R_SRC_SHIFT,
702 DA7219_OUT_SRC_MAX,
703 da7219_out_sel_txt);
704
705 static const struct snd_kcontrol_new da7219_out_dair_sel_mux =
706 SOC_DAPM_ENUM("Out DAIR Mux", da7219_out_dair_sel);
707
708 static const struct soc_enum da7219_out_dacl_sel =
709 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
710 DA7219_DAC_L_SRC_SHIFT,
711 DA7219_OUT_SRC_MAX,
712 da7219_out_sel_txt);
713
714 static const struct snd_kcontrol_new da7219_out_dacl_sel_mux =
715 SOC_DAPM_ENUM("Out DACL Mux", da7219_out_dacl_sel);
716
717 static const struct soc_enum da7219_out_dacr_sel =
718 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
719 DA7219_DAC_R_SRC_SHIFT,
720 DA7219_OUT_SRC_MAX,
721 da7219_out_sel_txt);
722
723 static const struct snd_kcontrol_new da7219_out_dacr_sel_mux =
724 SOC_DAPM_ENUM("Out DACR Mux", da7219_out_dacr_sel);
725
726
727 /*
728 * DAPM Mixer Controls
729 */
730
731 static const struct snd_kcontrol_new da7219_mixin_controls[] = {
732 SOC_DAPM_SINGLE("Mic Switch", DA7219_MIXIN_L_SELECT,
733 DA7219_MIXIN_L_MIX_SELECT_SHIFT,
734 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
735 };
736
737 static const struct snd_kcontrol_new da7219_mixout_l_controls[] = {
738 SOC_DAPM_SINGLE("DACL Switch", DA7219_MIXOUT_L_SELECT,
739 DA7219_MIXOUT_L_MIX_SELECT_SHIFT,
740 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
741 };
742
743 static const struct snd_kcontrol_new da7219_mixout_r_controls[] = {
744 SOC_DAPM_SINGLE("DACR Switch", DA7219_MIXOUT_R_SELECT,
745 DA7219_MIXOUT_R_MIX_SELECT_SHIFT,
746 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
747 };
748
749 #define DA7219_DMIX_ST_CTRLS(reg) \
750 SOC_DAPM_SINGLE("Out FilterL Switch", reg, \
751 DA7219_DMIX_ST_SRC_OUTFILT1L_SHIFT, \
752 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \
753 SOC_DAPM_SINGLE("Out FilterR Switch", reg, \
754 DA7219_DMIX_ST_SRC_OUTFILT1R_SHIFT, \
755 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \
756 SOC_DAPM_SINGLE("Sidetone Switch", reg, \
757 DA7219_DMIX_ST_SRC_SIDETONE_SHIFT, \
758 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT) \
759
760 static const struct snd_kcontrol_new da7219_st_out_filtl_mix_controls[] = {
761 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1L),
762 };
763
764 static const struct snd_kcontrol_new da7219_st_out_filtr_mix_controls[] = {
765 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1R),
766 };
767
768
769 /*
770 * DAPM Events
771 */
772
773 static int da7219_mic_pga_event(struct snd_soc_dapm_widget *w,
774 struct snd_kcontrol *kcontrol, int event)
775 {
776 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
777 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
778
779 switch (event) {
780 case SND_SOC_DAPM_POST_PMU:
781 if (da7219->micbias_on_event) {
782 /*
783 * Delay only for first capture after bias enabled to
784 * avoid possible DC offset related noise.
785 */
786 da7219->micbias_on_event = false;
787 msleep(da7219->mic_pga_delay);
788 }
789 break;
790 default:
791 break;
792 }
793
794 return 0;
795 }
796
797 static int da7219_dai_event(struct snd_soc_dapm_widget *w,
798 struct snd_kcontrol *kcontrol, int event)
799 {
800 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
801 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
802 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
803 u8 pll_ctrl, pll_status;
804 int i = 0, ret;
805 bool srm_lock = false;
806
807 switch (event) {
808 case SND_SOC_DAPM_PRE_PMU:
809 if (da7219->master) {
810 /* Enable DAI clks for master mode */
811 if (bclk) {
812 ret = clk_prepare_enable(bclk);
813 if (ret) {
814 dev_err(component->dev,
815 "Failed to enable DAI clks\n");
816 return ret;
817 }
818 } else {
819 snd_soc_component_update_bits(component,
820 DA7219_DAI_CLK_MODE,
821 DA7219_DAI_CLK_EN_MASK,
822 DA7219_DAI_CLK_EN_MASK);
823 }
824 }
825
826 /* PC synchronised to DAI */
827 snd_soc_component_update_bits(component, DA7219_PC_COUNT,
828 DA7219_PC_FREERUN_MASK, 0);
829
830 /* Slave mode, if SRM not enabled no need for status checks */
831 pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
832 if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM)
833 return 0;
834
835 /* Check SRM has locked */
836 do {
837 pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
838 if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) {
839 srm_lock = true;
840 } else {
841 ++i;
842 msleep(50);
843 }
844 } while ((i < DA7219_SRM_CHECK_RETRIES) && (!srm_lock));
845
846 if (!srm_lock)
847 dev_warn(component->dev, "SRM failed to lock\n");
848
849 return 0;
850 case SND_SOC_DAPM_POST_PMD:
851 /* PC free-running */
852 snd_soc_component_update_bits(component, DA7219_PC_COUNT,
853 DA7219_PC_FREERUN_MASK,
854 DA7219_PC_FREERUN_MASK);
855
856 /* Disable DAI clks if in master mode */
857 if (da7219->master) {
858 if (bclk)
859 clk_disable_unprepare(bclk);
860 else
861 snd_soc_component_update_bits(component,
862 DA7219_DAI_CLK_MODE,
863 DA7219_DAI_CLK_EN_MASK,
864 0);
865 }
866
867 return 0;
868 default:
869 return -EINVAL;
870 }
871 }
872
873 static int da7219_settling_event(struct snd_soc_dapm_widget *w,
874 struct snd_kcontrol *kcontrol, int event)
875 {
876 switch (event) {
877 case SND_SOC_DAPM_POST_PMU:
878 case SND_SOC_DAPM_POST_PMD:
879 msleep(DA7219_SETTLING_DELAY);
880 break;
881 default:
882 break;
883 }
884
885 return 0;
886 }
887
888 static int da7219_mixout_event(struct snd_soc_dapm_widget *w,
889 struct snd_kcontrol *kcontrol, int event)
890 {
891 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
892 u8 hp_ctrl, min_gain_mask;
893
894 switch (w->reg) {
895 case DA7219_MIXOUT_L_CTRL:
896 hp_ctrl = DA7219_HP_L_CTRL;
897 min_gain_mask = DA7219_HP_L_AMP_MIN_GAIN_EN_MASK;
898 break;
899 case DA7219_MIXOUT_R_CTRL:
900 hp_ctrl = DA7219_HP_R_CTRL;
901 min_gain_mask = DA7219_HP_R_AMP_MIN_GAIN_EN_MASK;
902 break;
903 default:
904 return -EINVAL;
905 }
906
907 switch (event) {
908 case SND_SOC_DAPM_PRE_PMD:
909 /* Enable minimum gain on HP to avoid pops */
910 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask,
911 min_gain_mask);
912
913 msleep(DA7219_MIN_GAIN_DELAY);
914
915 break;
916 case SND_SOC_DAPM_POST_PMU:
917 /* Remove minimum gain on HP */
918 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 0);
919
920 break;
921 }
922
923 return 0;
924 }
925
926 static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w,
927 struct snd_kcontrol *kcontrol, int event)
928 {
929 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
930 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
931
932 switch (event) {
933 case SND_SOC_DAPM_PRE_PMU:
934 case SND_SOC_DAPM_PRE_PMD:
935 /* Ensure nominal gain ramping for DAPM sequence */
936 da7219->gain_ramp_ctrl =
937 snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
938 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
939 DA7219_GAIN_RAMP_RATE_NOMINAL);
940 break;
941 case SND_SOC_DAPM_POST_PMU:
942 case SND_SOC_DAPM_POST_PMD:
943 /* Restore previous gain ramp settings */
944 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
945 da7219->gain_ramp_ctrl);
946 break;
947 }
948
949 return 0;
950 }
951
952
953 /*
954 * DAPM Widgets
955 */
956
957 static const struct snd_soc_dapm_widget da7219_dapm_widgets[] = {
958 /* Input Supplies */
959 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7219_MICBIAS_CTRL,
960 DA7219_MICBIAS1_EN_SHIFT, DA7219_NO_INVERT,
961 NULL, 0),
962
963 /* Inputs */
964 SND_SOC_DAPM_INPUT("MIC"),
965
966 /* Input PGAs */
967 SND_SOC_DAPM_PGA_E("Mic PGA", DA7219_MIC_1_CTRL,
968 DA7219_MIC_1_AMP_EN_SHIFT, DA7219_NO_INVERT,
969 NULL, 0, da7219_mic_pga_event, SND_SOC_DAPM_POST_PMU),
970 SND_SOC_DAPM_PGA_E("Mixin PGA", DA7219_MIXIN_L_CTRL,
971 DA7219_MIXIN_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
972 NULL, 0, da7219_settling_event, SND_SOC_DAPM_POST_PMU),
973
974 /* Input Filters */
975 SND_SOC_DAPM_ADC("ADC", NULL, DA7219_ADC_L_CTRL, DA7219_ADC_L_EN_SHIFT,
976 DA7219_NO_INVERT),
977
978 /* Tone Generator */
979 SND_SOC_DAPM_SIGGEN("TONE"),
980 SND_SOC_DAPM_PGA("Tone Generator", DA7219_TONE_GEN_CFG1,
981 DA7219_START_STOPN_SHIFT, DA7219_NO_INVERT, NULL, 0),
982
983 /* Sidetone Input */
984 SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7219_SIDETONE_CTRL,
985 DA7219_SIDETONE_EN_SHIFT, DA7219_NO_INVERT),
986
987 /* Input Mixer Supply */
988 SND_SOC_DAPM_SUPPLY("Mixer In Supply", DA7219_MIXIN_L_CTRL,
989 DA7219_MIXIN_L_MIX_EN_SHIFT, DA7219_NO_INVERT,
990 NULL, 0),
991
992 /* Input Mixer */
993 SND_SOC_DAPM_MIXER("Mixer In", SND_SOC_NOPM, 0, 0,
994 da7219_mixin_controls,
995 ARRAY_SIZE(da7219_mixin_controls)),
996
997 /* Input Muxes */
998 SND_SOC_DAPM_MUX("Out DAIL Mux", SND_SOC_NOPM, 0, 0,
999 &da7219_out_dail_sel_mux),
1000 SND_SOC_DAPM_MUX("Out DAIR Mux", SND_SOC_NOPM, 0, 0,
1001 &da7219_out_dair_sel_mux),
1002
1003 /* DAI Supply */
1004 SND_SOC_DAPM_SUPPLY("DAI", DA7219_DAI_CTRL, DA7219_DAI_EN_SHIFT,
1005 DA7219_NO_INVERT, da7219_dai_event,
1006 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1007
1008 /* DAI */
1009 SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, DA7219_DAI_TDM_CTRL,
1010 DA7219_DAI_OE_SHIFT, DA7219_NO_INVERT),
1011 SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0),
1012
1013 /* Output Muxes */
1014 SND_SOC_DAPM_MUX("Out DACL Mux", SND_SOC_NOPM, 0, 0,
1015 &da7219_out_dacl_sel_mux),
1016 SND_SOC_DAPM_MUX("Out DACR Mux", SND_SOC_NOPM, 0, 0,
1017 &da7219_out_dacr_sel_mux),
1018
1019 /* Output Mixers */
1020 SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1021 da7219_mixout_l_controls,
1022 ARRAY_SIZE(da7219_mixout_l_controls)),
1023 SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1024 da7219_mixout_r_controls,
1025 ARRAY_SIZE(da7219_mixout_r_controls)),
1026
1027 /* Sidetone Mixers */
1028 SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1029 da7219_st_out_filtl_mix_controls,
1030 ARRAY_SIZE(da7219_st_out_filtl_mix_controls)),
1031 SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0,
1032 0, da7219_st_out_filtr_mix_controls,
1033 ARRAY_SIZE(da7219_st_out_filtr_mix_controls)),
1034
1035 /* DACs */
1036 SND_SOC_DAPM_DAC_E("DACL", NULL, DA7219_DAC_L_CTRL,
1037 DA7219_DAC_L_EN_SHIFT, DA7219_NO_INVERT,
1038 da7219_settling_event,
1039 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1040 SND_SOC_DAPM_DAC_E("DACR", NULL, DA7219_DAC_R_CTRL,
1041 DA7219_DAC_R_EN_SHIFT, DA7219_NO_INVERT,
1042 da7219_settling_event,
1043 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1044
1045 /* Output PGAs */
1046 SND_SOC_DAPM_PGA_E("Mixout Left PGA", DA7219_MIXOUT_L_CTRL,
1047 DA7219_MIXOUT_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1048 NULL, 0, da7219_mixout_event,
1049 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1050 SND_SOC_DAPM_PGA_E("Mixout Right PGA", DA7219_MIXOUT_R_CTRL,
1051 DA7219_MIXOUT_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1052 NULL, 0, da7219_mixout_event,
1053 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1054 SND_SOC_DAPM_SUPPLY_S("Headphone Left PGA", 1, DA7219_HP_L_CTRL,
1055 DA7219_HP_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1056 da7219_settling_event,
1057 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1058 SND_SOC_DAPM_SUPPLY_S("Headphone Right PGA", 1, DA7219_HP_R_CTRL,
1059 DA7219_HP_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1060 da7219_settling_event,
1061 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1062
1063 /* Output Supplies */
1064 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 0, DA7219_CP_CTRL,
1065 DA7219_CP_EN_SHIFT, DA7219_NO_INVERT,
1066 da7219_settling_event,
1067 SND_SOC_DAPM_POST_PMU),
1068
1069 /* Outputs */
1070 SND_SOC_DAPM_OUTPUT("HPL"),
1071 SND_SOC_DAPM_OUTPUT("HPR"),
1072
1073 /* Pre/Post Power */
1074 SND_SOC_DAPM_PRE("Pre Power Gain Ramp", da7219_gain_ramp_event),
1075 SND_SOC_DAPM_POST("Post Power Gain Ramp", da7219_gain_ramp_event),
1076 };
1077
1078
1079 /*
1080 * DAPM Mux Routes
1081 */
1082
1083 #define DA7219_OUT_DAI_MUX_ROUTES(name) \
1084 {name, "ADC", "Mixer In"}, \
1085 {name, "Tone Generator", "Tone Generator"}, \
1086 {name, "DAIL", "DAIOUT"}, \
1087 {name, "DAIR", "DAIOUT"}
1088
1089 #define DA7219_OUT_DAC_MUX_ROUTES(name) \
1090 {name, "ADC", "Mixer In"}, \
1091 {name, "Tone Generator", "Tone Generator"}, \
1092 {name, "DAIL", "DAIIN"}, \
1093 {name, "DAIR", "DAIIN"}
1094
1095 /*
1096 * DAPM Mixer Routes
1097 */
1098
1099 #define DA7219_DMIX_ST_ROUTES(name) \
1100 {name, "Out FilterL Switch", "Mixer Out FilterL"}, \
1101 {name, "Out FilterR Switch", "Mixer Out FilterR"}, \
1102 {name, "Sidetone Switch", "Sidetone Filter"}
1103
1104
1105 /*
1106 * DAPM audio route definition
1107 */
1108
1109 static const struct snd_soc_dapm_route da7219_audio_map[] = {
1110 /* Input paths */
1111 {"MIC", NULL, "Mic Bias"},
1112 {"Mic PGA", NULL, "MIC"},
1113 {"Mixin PGA", NULL, "Mic PGA"},
1114 {"ADC", NULL, "Mixin PGA"},
1115
1116 {"Mixer In", NULL, "Mixer In Supply"},
1117 {"Mixer In", "Mic Switch", "ADC"},
1118
1119 {"Sidetone Filter", NULL, "Mixer In"},
1120
1121 {"Tone Generator", NULL, "TONE"},
1122
1123 DA7219_OUT_DAI_MUX_ROUTES("Out DAIL Mux"),
1124 DA7219_OUT_DAI_MUX_ROUTES("Out DAIR Mux"),
1125
1126 {"DAIOUT", NULL, "Out DAIL Mux"},
1127 {"DAIOUT", NULL, "Out DAIR Mux"},
1128 {"DAIOUT", NULL, "DAI"},
1129
1130 /* Output paths */
1131 {"DAIIN", NULL, "DAI"},
1132
1133 DA7219_OUT_DAC_MUX_ROUTES("Out DACL Mux"),
1134 DA7219_OUT_DAC_MUX_ROUTES("Out DACR Mux"),
1135
1136 {"Mixer Out FilterL", "DACL Switch", "Out DACL Mux"},
1137 {"Mixer Out FilterR", "DACR Switch", "Out DACR Mux"},
1138
1139 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterL"),
1140 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterR"),
1141
1142 {"DACL", NULL, "ST Mixer Out FilterL"},
1143 {"DACR", NULL, "ST Mixer Out FilterR"},
1144
1145 {"Mixout Left PGA", NULL, "DACL"},
1146 {"Mixout Right PGA", NULL, "DACR"},
1147
1148 {"HPL", NULL, "Mixout Left PGA"},
1149 {"HPR", NULL, "Mixout Right PGA"},
1150
1151 {"HPL", NULL, "Headphone Left PGA"},
1152 {"HPR", NULL, "Headphone Right PGA"},
1153
1154 {"HPL", NULL, "Charge Pump"},
1155 {"HPR", NULL, "Charge Pump"},
1156 };
1157
1158
1159 /*
1160 * DAI operations
1161 */
1162
1163 static int da7219_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1164 int clk_id, unsigned int freq, int dir)
1165 {
1166 struct snd_soc_component *component = codec_dai->component;
1167 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1168 int ret = 0;
1169
1170 mutex_lock(&da7219->pll_lock);
1171
1172 if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq)) {
1173 mutex_unlock(&da7219->pll_lock);
1174 return 0;
1175 }
1176
1177 if ((freq < 2000000) || (freq > 54000000)) {
1178 mutex_unlock(&da7219->pll_lock);
1179 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1180 freq);
1181 return -EINVAL;
1182 }
1183
1184 switch (clk_id) {
1185 case DA7219_CLKSRC_MCLK_SQR:
1186 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1187 DA7219_PLL_MCLK_SQR_EN_MASK,
1188 DA7219_PLL_MCLK_SQR_EN_MASK);
1189 break;
1190 case DA7219_CLKSRC_MCLK:
1191 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1192 DA7219_PLL_MCLK_SQR_EN_MASK, 0);
1193 break;
1194 default:
1195 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1196 mutex_unlock(&da7219->pll_lock);
1197 return -EINVAL;
1198 }
1199
1200 da7219->clk_src = clk_id;
1201
1202 if (da7219->mclk) {
1203 freq = clk_round_rate(da7219->mclk, freq);
1204 ret = clk_set_rate(da7219->mclk, freq);
1205 if (ret) {
1206 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1207 freq);
1208 mutex_unlock(&da7219->pll_lock);
1209 return ret;
1210 }
1211 }
1212
1213 da7219->mclk_rate = freq;
1214
1215 mutex_unlock(&da7219->pll_lock);
1216
1217 return 0;
1218 }
1219
1220 int da7219_set_pll(struct snd_soc_component *component, int source, unsigned int fout)
1221 {
1222 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1223
1224 u8 pll_ctrl, indiv_bits, indiv;
1225 u8 pll_frac_top, pll_frac_bot, pll_integer;
1226 u32 freq_ref;
1227 u64 frac_div;
1228
1229 /* Verify 2MHz - 54MHz MCLK provided, and set input divider */
1230 if (da7219->mclk_rate < 2000000) {
1231 dev_err(component->dev, "PLL input clock %d below valid range\n",
1232 da7219->mclk_rate);
1233 return -EINVAL;
1234 } else if (da7219->mclk_rate <= 4500000) {
1235 indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ;
1236 indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1237 } else if (da7219->mclk_rate <= 9000000) {
1238 indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ;
1239 indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL;
1240 } else if (da7219->mclk_rate <= 18000000) {
1241 indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ;
1242 indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL;
1243 } else if (da7219->mclk_rate <= 36000000) {
1244 indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ;
1245 indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL;
1246 } else if (da7219->mclk_rate <= 54000000) {
1247 indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ;
1248 indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL;
1249 } else {
1250 dev_err(component->dev, "PLL input clock %d above valid range\n",
1251 da7219->mclk_rate);
1252 return -EINVAL;
1253 }
1254 freq_ref = (da7219->mclk_rate / indiv);
1255 pll_ctrl = indiv_bits;
1256
1257 /* Configure PLL */
1258 switch (source) {
1259 case DA7219_SYSCLK_MCLK:
1260 pll_ctrl |= DA7219_PLL_MODE_BYPASS;
1261 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1262 DA7219_PLL_INDIV_MASK |
1263 DA7219_PLL_MODE_MASK, pll_ctrl);
1264 return 0;
1265 case DA7219_SYSCLK_PLL:
1266 pll_ctrl |= DA7219_PLL_MODE_NORMAL;
1267 break;
1268 case DA7219_SYSCLK_PLL_SRM:
1269 pll_ctrl |= DA7219_PLL_MODE_SRM;
1270 break;
1271 default:
1272 dev_err(component->dev, "Invalid PLL config\n");
1273 return -EINVAL;
1274 }
1275
1276 /* Calculate dividers for PLL */
1277 pll_integer = fout / freq_ref;
1278 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1279 do_div(frac_div, freq_ref);
1280 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK;
1281 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK;
1282
1283 /* Write PLL config & dividers */
1284 snd_soc_component_write(component, DA7219_PLL_FRAC_TOP, pll_frac_top);
1285 snd_soc_component_write(component, DA7219_PLL_FRAC_BOT, pll_frac_bot);
1286 snd_soc_component_write(component, DA7219_PLL_INTEGER, pll_integer);
1287 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1288 DA7219_PLL_INDIV_MASK | DA7219_PLL_MODE_MASK,
1289 pll_ctrl);
1290
1291 return 0;
1292 }
1293
1294 static int da7219_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1295 int source, unsigned int fref, unsigned int fout)
1296 {
1297 struct snd_soc_component *component = codec_dai->component;
1298 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1299 int ret;
1300
1301 mutex_lock(&da7219->pll_lock);
1302 ret = da7219_set_pll(component, source, fout);
1303 mutex_unlock(&da7219->pll_lock);
1304
1305 return ret;
1306 }
1307
1308 static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1309 {
1310 struct snd_soc_component *component = codec_dai->component;
1311 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1312 u8 dai_clk_mode = 0, dai_ctrl = 0;
1313
1314 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1315 case SND_SOC_DAIFMT_CBM_CFM:
1316 da7219->master = true;
1317 break;
1318 case SND_SOC_DAIFMT_CBS_CFS:
1319 da7219->master = false;
1320 break;
1321 default:
1322 return -EINVAL;
1323 }
1324
1325 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1326 case SND_SOC_DAIFMT_I2S:
1327 case SND_SOC_DAIFMT_LEFT_J:
1328 case SND_SOC_DAIFMT_RIGHT_J:
1329 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1330 case SND_SOC_DAIFMT_NB_NF:
1331 break;
1332 case SND_SOC_DAIFMT_NB_IF:
1333 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1334 break;
1335 case SND_SOC_DAIFMT_IB_NF:
1336 dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1337 break;
1338 case SND_SOC_DAIFMT_IB_IF:
1339 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1340 DA7219_DAI_CLK_POL_INV;
1341 break;
1342 default:
1343 return -EINVAL;
1344 }
1345 break;
1346 case SND_SOC_DAIFMT_DSP_B:
1347 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1348 case SND_SOC_DAIFMT_NB_NF:
1349 dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1350 break;
1351 case SND_SOC_DAIFMT_NB_IF:
1352 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1353 DA7219_DAI_CLK_POL_INV;
1354 break;
1355 case SND_SOC_DAIFMT_IB_NF:
1356 break;
1357 case SND_SOC_DAIFMT_IB_IF:
1358 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1359 break;
1360 default:
1361 return -EINVAL;
1362 }
1363 break;
1364 default:
1365 return -EINVAL;
1366 }
1367
1368 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1369 case SND_SOC_DAIFMT_I2S:
1370 dai_ctrl |= DA7219_DAI_FORMAT_I2S;
1371 break;
1372 case SND_SOC_DAIFMT_LEFT_J:
1373 dai_ctrl |= DA7219_DAI_FORMAT_LEFT_J;
1374 break;
1375 case SND_SOC_DAIFMT_RIGHT_J:
1376 dai_ctrl |= DA7219_DAI_FORMAT_RIGHT_J;
1377 break;
1378 case SND_SOC_DAIFMT_DSP_B:
1379 dai_ctrl |= DA7219_DAI_FORMAT_DSP;
1380 break;
1381 default:
1382 return -EINVAL;
1383 }
1384
1385 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1386 DA7219_DAI_CLK_POL_MASK | DA7219_DAI_WCLK_POL_MASK,
1387 dai_clk_mode);
1388 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, DA7219_DAI_FORMAT_MASK,
1389 dai_ctrl);
1390
1391 return 0;
1392 }
1393
1394 static int da7219_set_bclks_per_wclk(struct snd_soc_component *component,
1395 unsigned long factor)
1396 {
1397 u8 bclks_per_wclk;
1398
1399 switch (factor) {
1400 case 32:
1401 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_32;
1402 break;
1403 case 64:
1404 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_64;
1405 break;
1406 case 128:
1407 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_128;
1408 break;
1409 case 256:
1410 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_256;
1411 break;
1412 default:
1413 return -EINVAL;
1414 }
1415
1416 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1417 DA7219_DAI_BCLKS_PER_WCLK_MASK,
1418 bclks_per_wclk);
1419
1420 return 0;
1421 }
1422
1423 static int da7219_set_dai_tdm_slot(struct snd_soc_dai *dai,
1424 unsigned int tx_mask, unsigned int rx_mask,
1425 int slots, int slot_width)
1426 {
1427 struct snd_soc_component *component = dai->component;
1428 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1429 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1430 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
1431 unsigned int ch_mask;
1432 unsigned long sr, bclk_rate;
1433 u8 slot_offset;
1434 u16 offset;
1435 __le16 dai_offset;
1436 u32 frame_size;
1437 int ret;
1438
1439 /* No channels enabled so disable TDM */
1440 if (!tx_mask) {
1441 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
1442 DA7219_DAI_TDM_CH_EN_MASK |
1443 DA7219_DAI_TDM_MODE_EN_MASK, 0);
1444 da7219->tdm_en = false;
1445 return 0;
1446 }
1447
1448 /* Check we have valid slots */
1449 slot_offset = ffs(tx_mask) - 1;
1450 ch_mask = (tx_mask >> slot_offset);
1451 if (fls(ch_mask) > DA7219_DAI_TDM_MAX_SLOTS) {
1452 dev_err(component->dev,
1453 "Invalid number of slots, max = %d\n",
1454 DA7219_DAI_TDM_MAX_SLOTS);
1455 return -EINVAL;
1456 }
1457
1458 /*
1459 * Ensure we have a valid offset into the frame, based on slot width
1460 * and slot offset of first slot we're interested in.
1461 */
1462 offset = slot_offset * slot_width;
1463 if (offset > DA7219_DAI_OFFSET_MAX) {
1464 dev_err(component->dev, "Invalid frame offset %d\n", offset);
1465 return -EINVAL;
1466 }
1467
1468 /*
1469 * If we're master, calculate & validate frame size based on slot info
1470 * provided as we have a limited set of rates available.
1471 */
1472 if (da7219->master) {
1473 frame_size = slots * slot_width;
1474
1475 if (bclk) {
1476 sr = clk_get_rate(wclk);
1477 bclk_rate = sr * frame_size;
1478 ret = clk_set_rate(bclk, bclk_rate);
1479 if (ret) {
1480 dev_err(component->dev,
1481 "Failed to set TDM BCLK rate %lu: %d\n",
1482 bclk_rate, ret);
1483 return ret;
1484 }
1485 } else {
1486 ret = da7219_set_bclks_per_wclk(component, frame_size);
1487 if (ret) {
1488 dev_err(component->dev,
1489 "Failed to set TDM BCLKs per WCLK %d: %d\n",
1490 frame_size, ret);
1491 return ret;
1492 }
1493 }
1494 }
1495
1496 dai_offset = cpu_to_le16(offset);
1497 regmap_bulk_write(da7219->regmap, DA7219_DAI_OFFSET_LOWER,
1498 &dai_offset, sizeof(dai_offset));
1499
1500 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
1501 DA7219_DAI_TDM_CH_EN_MASK |
1502 DA7219_DAI_TDM_MODE_EN_MASK,
1503 (ch_mask << DA7219_DAI_TDM_CH_EN_SHIFT) |
1504 DA7219_DAI_TDM_MODE_EN_MASK);
1505
1506 da7219->tdm_en = true;
1507
1508 return 0;
1509 }
1510
1511 static int da7219_set_sr(struct snd_soc_component *component,
1512 unsigned long rate)
1513 {
1514 u8 fs;
1515
1516 switch (rate) {
1517 case 8000:
1518 fs = DA7219_SR_8000;
1519 break;
1520 case 11025:
1521 fs = DA7219_SR_11025;
1522 break;
1523 case 12000:
1524 fs = DA7219_SR_12000;
1525 break;
1526 case 16000:
1527 fs = DA7219_SR_16000;
1528 break;
1529 case 22050:
1530 fs = DA7219_SR_22050;
1531 break;
1532 case 24000:
1533 fs = DA7219_SR_24000;
1534 break;
1535 case 32000:
1536 fs = DA7219_SR_32000;
1537 break;
1538 case 44100:
1539 fs = DA7219_SR_44100;
1540 break;
1541 case 48000:
1542 fs = DA7219_SR_48000;
1543 break;
1544 case 88200:
1545 fs = DA7219_SR_88200;
1546 break;
1547 case 96000:
1548 fs = DA7219_SR_96000;
1549 break;
1550 default:
1551 return -EINVAL;
1552 }
1553
1554 snd_soc_component_write(component, DA7219_SR, fs);
1555
1556 return 0;
1557 }
1558
1559 static int da7219_hw_params(struct snd_pcm_substream *substream,
1560 struct snd_pcm_hw_params *params,
1561 struct snd_soc_dai *dai)
1562 {
1563 struct snd_soc_component *component = dai->component;
1564 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1565 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1566 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
1567 u8 dai_ctrl = 0;
1568 unsigned int channels;
1569 unsigned long sr, bclk_rate;
1570 int word_len = params_width(params);
1571 int frame_size, ret;
1572
1573 switch (word_len) {
1574 case 16:
1575 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S16_LE;
1576 break;
1577 case 20:
1578 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S20_LE;
1579 break;
1580 case 24:
1581 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S24_LE;
1582 break;
1583 case 32:
1584 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S32_LE;
1585 break;
1586 default:
1587 return -EINVAL;
1588 }
1589
1590 channels = params_channels(params);
1591 if ((channels < 1) || (channels > DA7219_DAI_CH_NUM_MAX)) {
1592 dev_err(component->dev,
1593 "Invalid number of channels, only 1 to %d supported\n",
1594 DA7219_DAI_CH_NUM_MAX);
1595 return -EINVAL;
1596 }
1597 dai_ctrl |= channels << DA7219_DAI_CH_NUM_SHIFT;
1598
1599 sr = params_rate(params);
1600 if (da7219->master && wclk) {
1601 ret = clk_set_rate(wclk, sr);
1602 if (ret) {
1603 dev_err(component->dev,
1604 "Failed to set WCLK SR %lu: %d\n", sr, ret);
1605 return ret;
1606 }
1607 } else {
1608 ret = da7219_set_sr(component, sr);
1609 if (ret) {
1610 dev_err(component->dev,
1611 "Failed to set SR %lu: %d\n", sr, ret);
1612 return ret;
1613 }
1614 }
1615
1616 /*
1617 * If we're master, then we have a limited set of BCLK rates we
1618 * support. For slave mode this isn't the case and the codec can detect
1619 * the BCLK rate automatically.
1620 */
1621 if (da7219->master && !da7219->tdm_en) {
1622 if ((word_len * DA7219_DAI_CH_NUM_MAX) <= 32)
1623 frame_size = 32;
1624 else
1625 frame_size = 64;
1626
1627 if (bclk) {
1628 bclk_rate = frame_size * sr;
1629 /*
1630 * Rounding the rate here avoids failure trying to set a
1631 * new rate on an already enabled bclk. In that
1632 * instance this will just set the same rate as is
1633 * currently in use, and so should continue without
1634 * problem, as long as the BCLK rate is suitable for the
1635 * desired frame size.
1636 */
1637 bclk_rate = clk_round_rate(bclk, bclk_rate);
1638 if ((bclk_rate / sr) < frame_size) {
1639 dev_err(component->dev,
1640 "BCLK rate mismatch against frame size");
1641 return -EINVAL;
1642 }
1643
1644 ret = clk_set_rate(bclk, bclk_rate);
1645 if (ret) {
1646 dev_err(component->dev,
1647 "Failed to set BCLK rate %lu: %d\n",
1648 bclk_rate, ret);
1649 return ret;
1650 }
1651 } else {
1652 ret = da7219_set_bclks_per_wclk(component, frame_size);
1653 if (ret) {
1654 dev_err(component->dev,
1655 "Failed to set BCLKs per WCLK %d: %d\n",
1656 frame_size, ret);
1657 return ret;
1658 }
1659 }
1660 }
1661
1662 snd_soc_component_update_bits(component, DA7219_DAI_CTRL,
1663 DA7219_DAI_WORD_LENGTH_MASK |
1664 DA7219_DAI_CH_NUM_MASK,
1665 dai_ctrl);
1666
1667 return 0;
1668 }
1669
1670 static const struct snd_soc_dai_ops da7219_dai_ops = {
1671 .hw_params = da7219_hw_params,
1672 .set_sysclk = da7219_set_dai_sysclk,
1673 .set_pll = da7219_set_dai_pll,
1674 .set_fmt = da7219_set_dai_fmt,
1675 .set_tdm_slot = da7219_set_dai_tdm_slot,
1676 };
1677
1678 #define DA7219_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1679 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1680
1681 #define DA7219_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1682 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1683 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
1684 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
1685 SNDRV_PCM_RATE_96000)
1686
1687 static struct snd_soc_dai_driver da7219_dai = {
1688 .name = "da7219-hifi",
1689 .playback = {
1690 .stream_name = "Playback",
1691 .channels_min = 1,
1692 .channels_max = DA7219_DAI_CH_NUM_MAX,
1693 .rates = DA7219_RATES,
1694 .formats = DA7219_FORMATS,
1695 },
1696 .capture = {
1697 .stream_name = "Capture",
1698 .channels_min = 1,
1699 .channels_max = DA7219_DAI_CH_NUM_MAX,
1700 .rates = DA7219_RATES,
1701 .formats = DA7219_FORMATS,
1702 },
1703 .ops = &da7219_dai_ops,
1704 .symmetric_rate = 1,
1705 .symmetric_channels = 1,
1706 .symmetric_sample_bits = 1,
1707 };
1708
1709
1710 /*
1711 * DT/ACPI
1712 */
1713
1714 #ifdef CONFIG_OF
1715 static const struct of_device_id da7219_of_match[] = {
1716 { .compatible = "dlg,da7219", },
1717 { }
1718 };
1719 MODULE_DEVICE_TABLE(of, da7219_of_match);
1720 #endif
1721
1722 #ifdef CONFIG_ACPI
1723 static const struct acpi_device_id da7219_acpi_match[] = {
1724 { .id = "DLGS7219", },
1725 { }
1726 };
1727 MODULE_DEVICE_TABLE(acpi, da7219_acpi_match);
1728 #endif
1729
1730 static enum da7219_micbias_voltage
1731 da7219_fw_micbias_lvl(struct device *dev, u32 val)
1732 {
1733 switch (val) {
1734 case 1600:
1735 return DA7219_MICBIAS_1_6V;
1736 case 1800:
1737 return DA7219_MICBIAS_1_8V;
1738 case 2000:
1739 return DA7219_MICBIAS_2_0V;
1740 case 2200:
1741 return DA7219_MICBIAS_2_2V;
1742 case 2400:
1743 return DA7219_MICBIAS_2_4V;
1744 case 2600:
1745 return DA7219_MICBIAS_2_6V;
1746 default:
1747 dev_warn(dev, "Invalid micbias level");
1748 return DA7219_MICBIAS_2_2V;
1749 }
1750 }
1751
1752 static enum da7219_mic_amp_in_sel
1753 da7219_fw_mic_amp_in_sel(struct device *dev, const char *str)
1754 {
1755 if (!strcmp(str, "diff")) {
1756 return DA7219_MIC_AMP_IN_SEL_DIFF;
1757 } else if (!strcmp(str, "se_p")) {
1758 return DA7219_MIC_AMP_IN_SEL_SE_P;
1759 } else if (!strcmp(str, "se_n")) {
1760 return DA7219_MIC_AMP_IN_SEL_SE_N;
1761 } else {
1762 dev_warn(dev, "Invalid mic input type selection");
1763 return DA7219_MIC_AMP_IN_SEL_DIFF;
1764 }
1765 }
1766
1767 static struct da7219_pdata *da7219_fw_to_pdata(struct device *dev)
1768 {
1769 struct da7219_pdata *pdata;
1770 const char *of_str;
1771 u32 of_val32;
1772
1773 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1774 if (!pdata)
1775 return NULL;
1776
1777 pdata->wakeup_source = device_property_read_bool(dev, "wakeup-source");
1778
1779 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk";
1780 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk";
1781 if (device_property_read_string_array(dev, "clock-output-names",
1782 pdata->dai_clk_names,
1783 DA7219_DAI_NUM_CLKS) < 0)
1784 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
1785 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX],
1786 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX]);
1787
1788 if (device_property_read_u32(dev, "dlg,micbias-lvl", &of_val32) >= 0)
1789 pdata->micbias_lvl = da7219_fw_micbias_lvl(dev, of_val32);
1790 else
1791 pdata->micbias_lvl = DA7219_MICBIAS_2_2V;
1792
1793 if (!device_property_read_string(dev, "dlg,mic-amp-in-sel", &of_str))
1794 pdata->mic_amp_in_sel = da7219_fw_mic_amp_in_sel(dev, of_str);
1795 else
1796 pdata->mic_amp_in_sel = DA7219_MIC_AMP_IN_SEL_DIFF;
1797
1798 return pdata;
1799 }
1800
1801
1802 /*
1803 * Codec driver functions
1804 */
1805
1806 static int da7219_set_bias_level(struct snd_soc_component *component,
1807 enum snd_soc_bias_level level)
1808 {
1809 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1810 int ret;
1811
1812 switch (level) {
1813 case SND_SOC_BIAS_ON:
1814 break;
1815 case SND_SOC_BIAS_PREPARE:
1816 /* Enable MCLK for transition to ON state */
1817 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
1818 if (da7219->mclk) {
1819 ret = clk_prepare_enable(da7219->mclk);
1820 if (ret) {
1821 dev_err(component->dev,
1822 "Failed to enable mclk\n");
1823 return ret;
1824 }
1825 }
1826 }
1827
1828 break;
1829 case SND_SOC_BIAS_STANDBY:
1830 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
1831 /* Master bias */
1832 snd_soc_component_update_bits(component, DA7219_REFERENCES,
1833 DA7219_BIAS_EN_MASK,
1834 DA7219_BIAS_EN_MASK);
1835
1836 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
1837 /* Remove MCLK */
1838 if (da7219->mclk)
1839 clk_disable_unprepare(da7219->mclk);
1840 }
1841 break;
1842 case SND_SOC_BIAS_OFF:
1843 /* Only disable master bias if we're not a wake-up source */
1844 if (!da7219->wakeup_source)
1845 snd_soc_component_update_bits(component, DA7219_REFERENCES,
1846 DA7219_BIAS_EN_MASK, 0);
1847
1848 break;
1849 }
1850
1851 return 0;
1852 }
1853
1854 static const char *da7219_supply_names[DA7219_NUM_SUPPLIES] = {
1855 [DA7219_SUPPLY_VDD] = "VDD",
1856 [DA7219_SUPPLY_VDDMIC] = "VDDMIC",
1857 [DA7219_SUPPLY_VDDIO] = "VDDIO",
1858 };
1859
1860 static int da7219_handle_supplies(struct snd_soc_component *component,
1861 u8 *io_voltage_lvl)
1862 {
1863 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1864 struct regulator *vddio;
1865 int i, ret;
1866
1867 /* Get required supplies */
1868 for (i = 0; i < DA7219_NUM_SUPPLIES; ++i)
1869 da7219->supplies[i].supply = da7219_supply_names[i];
1870
1871 ret = regulator_bulk_get(component->dev, DA7219_NUM_SUPPLIES,
1872 da7219->supplies);
1873 if (ret) {
1874 dev_err(component->dev, "Failed to get supplies");
1875 return ret;
1876 }
1877
1878 /* Default to upper range */
1879 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_2_5V_3_6V;
1880
1881 /* Determine VDDIO voltage provided */
1882 vddio = da7219->supplies[DA7219_SUPPLY_VDDIO].consumer;
1883 ret = regulator_get_voltage(vddio);
1884 if (ret < 1200000)
1885 dev_warn(component->dev, "Invalid VDDIO voltage\n");
1886 else if (ret < 2800000)
1887 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_1_2V_2_8V;
1888
1889 /* Enable main supplies */
1890 ret = regulator_bulk_enable(DA7219_NUM_SUPPLIES, da7219->supplies);
1891 if (ret) {
1892 dev_err(component->dev, "Failed to enable supplies");
1893 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
1894 return ret;
1895 }
1896
1897 return 0;
1898 }
1899
1900 #ifdef CONFIG_COMMON_CLK
1901 static int da7219_wclk_prepare(struct clk_hw *hw)
1902 {
1903 struct da7219_priv *da7219 =
1904 container_of(hw, struct da7219_priv,
1905 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1906 struct snd_soc_component *component = da7219->component;
1907
1908 if (!da7219->master)
1909 return -EINVAL;
1910
1911 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1912 DA7219_DAI_CLK_EN_MASK,
1913 DA7219_DAI_CLK_EN_MASK);
1914
1915 return 0;
1916 }
1917
1918 static void da7219_wclk_unprepare(struct clk_hw *hw)
1919 {
1920 struct da7219_priv *da7219 =
1921 container_of(hw, struct da7219_priv,
1922 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1923 struct snd_soc_component *component = da7219->component;
1924
1925 if (!da7219->master)
1926 return;
1927
1928 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1929 DA7219_DAI_CLK_EN_MASK, 0);
1930 }
1931
1932 static int da7219_wclk_is_prepared(struct clk_hw *hw)
1933 {
1934 struct da7219_priv *da7219 =
1935 container_of(hw, struct da7219_priv,
1936 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1937 struct snd_soc_component *component = da7219->component;
1938 u8 clk_reg;
1939
1940 if (!da7219->master)
1941 return -EINVAL;
1942
1943 clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE);
1944
1945 return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);
1946 }
1947
1948 static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw,
1949 unsigned long parent_rate)
1950 {
1951 struct da7219_priv *da7219 =
1952 container_of(hw, struct da7219_priv,
1953 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1954 struct snd_soc_component *component = da7219->component;
1955 u8 fs = snd_soc_component_read(component, DA7219_SR);
1956
1957 switch (fs & DA7219_SR_MASK) {
1958 case DA7219_SR_8000:
1959 return 8000;
1960 case DA7219_SR_11025:
1961 return 11025;
1962 case DA7219_SR_12000:
1963 return 12000;
1964 case DA7219_SR_16000:
1965 return 16000;
1966 case DA7219_SR_22050:
1967 return 22050;
1968 case DA7219_SR_24000:
1969 return 24000;
1970 case DA7219_SR_32000:
1971 return 32000;
1972 case DA7219_SR_44100:
1973 return 44100;
1974 case DA7219_SR_48000:
1975 return 48000;
1976 case DA7219_SR_88200:
1977 return 88200;
1978 case DA7219_SR_96000:
1979 return 96000;
1980 default:
1981 return 0;
1982 }
1983 }
1984
1985 static long da7219_wclk_round_rate(struct clk_hw *hw, unsigned long rate,
1986 unsigned long *parent_rate)
1987 {
1988 struct da7219_priv *da7219 =
1989 container_of(hw, struct da7219_priv,
1990 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1991
1992 if (!da7219->master)
1993 return -EINVAL;
1994
1995 if (rate < 11025)
1996 return 8000;
1997 else if (rate < 12000)
1998 return 11025;
1999 else if (rate < 16000)
2000 return 12000;
2001 else if (rate < 22050)
2002 return 16000;
2003 else if (rate < 24000)
2004 return 22050;
2005 else if (rate < 32000)
2006 return 24000;
2007 else if (rate < 44100)
2008 return 32000;
2009 else if (rate < 48000)
2010 return 44100;
2011 else if (rate < 88200)
2012 return 48000;
2013 else if (rate < 96000)
2014 return 88200;
2015 else
2016 return 96000;
2017 }
2018
2019 static int da7219_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
2020 unsigned long parent_rate)
2021 {
2022 struct da7219_priv *da7219 =
2023 container_of(hw, struct da7219_priv,
2024 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
2025 struct snd_soc_component *component = da7219->component;
2026
2027 if (!da7219->master)
2028 return -EINVAL;
2029
2030 return da7219_set_sr(component, rate);
2031 }
2032
2033 static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw,
2034 unsigned long parent_rate)
2035 {
2036 struct da7219_priv *da7219 =
2037 container_of(hw, struct da7219_priv,
2038 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2039 struct snd_soc_component *component = da7219->component;
2040 u8 bclks_per_wclk = snd_soc_component_read(component,
2041 DA7219_DAI_CLK_MODE);
2042
2043 switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) {
2044 case DA7219_DAI_BCLKS_PER_WCLK_32:
2045 return parent_rate * 32;
2046 case DA7219_DAI_BCLKS_PER_WCLK_64:
2047 return parent_rate * 64;
2048 case DA7219_DAI_BCLKS_PER_WCLK_128:
2049 return parent_rate * 128;
2050 case DA7219_DAI_BCLKS_PER_WCLK_256:
2051 return parent_rate * 256;
2052 default:
2053 return 0;
2054 }
2055 }
2056
2057 static unsigned long da7219_bclk_get_factor(unsigned long rate,
2058 unsigned long parent_rate)
2059 {
2060 unsigned long factor;
2061
2062 factor = rate / parent_rate;
2063 if (factor < 64)
2064 return 32;
2065 else if (factor < 128)
2066 return 64;
2067 else if (factor < 256)
2068 return 128;
2069 else
2070 return 256;
2071 }
2072
2073 static long da7219_bclk_round_rate(struct clk_hw *hw, unsigned long rate,
2074 unsigned long *parent_rate)
2075 {
2076 struct da7219_priv *da7219 =
2077 container_of(hw, struct da7219_priv,
2078 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2079 unsigned long factor;
2080
2081 if (!*parent_rate || !da7219->master)
2082 return -EINVAL;
2083
2084 /*
2085 * We don't allow changing the parent rate as some BCLK rates can be
2086 * derived from multiple parent WCLK rates (BCLK rates are set as a
2087 * multiplier of WCLK in HW). We just do some rounding down based on the
2088 * parent WCLK rate set and find the appropriate multiplier of BCLK to
2089 * get the rounded down BCLK value.
2090 */
2091 factor = da7219_bclk_get_factor(rate, *parent_rate);
2092
2093 return *parent_rate * factor;
2094 }
2095
2096 static int da7219_bclk_set_rate(struct clk_hw *hw, unsigned long rate,
2097 unsigned long parent_rate)
2098 {
2099 struct da7219_priv *da7219 =
2100 container_of(hw, struct da7219_priv,
2101 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2102 struct snd_soc_component *component = da7219->component;
2103 unsigned long factor;
2104
2105 if (!da7219->master)
2106 return -EINVAL;
2107
2108 factor = da7219_bclk_get_factor(rate, parent_rate);
2109
2110 return da7219_set_bclks_per_wclk(component, factor);
2111 }
2112
2113 static const struct clk_ops da7219_dai_clk_ops[DA7219_DAI_NUM_CLKS] = {
2114 [DA7219_DAI_WCLK_IDX] = {
2115 .prepare = da7219_wclk_prepare,
2116 .unprepare = da7219_wclk_unprepare,
2117 .is_prepared = da7219_wclk_is_prepared,
2118 .recalc_rate = da7219_wclk_recalc_rate,
2119 .round_rate = da7219_wclk_round_rate,
2120 .set_rate = da7219_wclk_set_rate,
2121 },
2122 [DA7219_DAI_BCLK_IDX] = {
2123 .recalc_rate = da7219_bclk_recalc_rate,
2124 .round_rate = da7219_bclk_round_rate,
2125 .set_rate = da7219_bclk_set_rate,
2126 },
2127 };
2128
2129 static int da7219_register_dai_clks(struct snd_soc_component *component)
2130 {
2131 struct device *dev = component->dev;
2132 struct device_node *np = dev->of_node;
2133 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2134 struct da7219_pdata *pdata = da7219->pdata;
2135 const char *parent_name;
2136 struct clk_hw_onecell_data *clk_data;
2137 int i, ret;
2138
2139 /* For DT platforms allocate onecell data for clock registration */
2140 if (np) {
2141 clk_data = kzalloc(struct_size(clk_data, hws, DA7219_DAI_NUM_CLKS),
2142 GFP_KERNEL);
2143 if (!clk_data)
2144 return -ENOMEM;
2145
2146 clk_data->num = DA7219_DAI_NUM_CLKS;
2147 da7219->clk_hw_data = clk_data;
2148 }
2149
2150 for (i = 0; i < DA7219_DAI_NUM_CLKS; ++i) {
2151 struct clk_init_data init = {};
2152 struct clk_lookup *dai_clk_lookup;
2153 struct clk_hw *dai_clk_hw = &da7219->dai_clks_hw[i];
2154
2155 switch (i) {
2156 case DA7219_DAI_WCLK_IDX:
2157 /*
2158 * If we can, make MCLK the parent of WCLK to ensure
2159 * it's enabled as required.
2160 */
2161 if (da7219->mclk) {
2162 parent_name = __clk_get_name(da7219->mclk);
2163 init.parent_names = &parent_name;
2164 init.num_parents = 1;
2165 } else {
2166 init.parent_names = NULL;
2167 init.num_parents = 0;
2168 }
2169 break;
2170 case DA7219_DAI_BCLK_IDX:
2171 /* Make WCLK the parent of BCLK */
2172 parent_name = __clk_get_name(da7219->dai_clks[DA7219_DAI_WCLK_IDX]);
2173 init.parent_names = &parent_name;
2174 init.num_parents = 1;
2175 break;
2176 default:
2177 dev_err(dev, "Invalid clock index\n");
2178 ret = -EINVAL;
2179 goto err;
2180 }
2181
2182 init.name = pdata->dai_clk_names[i];
2183 init.ops = &da7219_dai_clk_ops[i];
2184 init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE;
2185 dai_clk_hw->init = &init;
2186
2187 ret = clk_hw_register(dev, dai_clk_hw);
2188 if (ret) {
2189 dev_warn(dev, "Failed to register %s: %d\n", init.name,
2190 ret);
2191 goto err;
2192 }
2193 da7219->dai_clks[i] = dai_clk_hw->clk;
2194
2195 /* For DT setup onecell data, otherwise create lookup */
2196 if (np) {
2197 da7219->clk_hw_data->hws[i] = dai_clk_hw;
2198 } else {
2199 dai_clk_lookup = clkdev_hw_create(dai_clk_hw, init.name,
2200 "%s", dev_name(dev));
2201 if (!dai_clk_lookup) {
2202 clk_hw_unregister(dai_clk_hw);
2203 ret = -ENOMEM;
2204 goto err;
2205 } else {
2206 da7219->dai_clks_lookup[i] = dai_clk_lookup;
2207 }
2208 }
2209 }
2210
2211 /* If we're using DT, then register as provider accordingly */
2212 if (np) {
2213 ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
2214 da7219->clk_hw_data);
2215 if (ret) {
2216 dev_err(dev, "Failed to register clock provider\n");
2217 goto err;
2218 }
2219 }
2220
2221 return 0;
2222
2223 err:
2224 while (--i >= 0) {
2225 if (da7219->dai_clks_lookup[i])
2226 clkdev_drop(da7219->dai_clks_lookup[i]);
2227
2228 clk_hw_unregister(&da7219->dai_clks_hw[i]);
2229 }
2230
2231 if (np)
2232 kfree(da7219->clk_hw_data);
2233
2234 return ret;
2235 }
2236
2237 static void da7219_free_dai_clks(struct snd_soc_component *component)
2238 {
2239 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2240 struct device_node *np = component->dev->of_node;
2241 int i;
2242
2243 if (np)
2244 of_clk_del_provider(np);
2245
2246 for (i = DA7219_DAI_NUM_CLKS - 1; i >= 0; --i) {
2247 if (da7219->dai_clks_lookup[i])
2248 clkdev_drop(da7219->dai_clks_lookup[i]);
2249
2250 clk_hw_unregister(&da7219->dai_clks_hw[i]);
2251 }
2252
2253 if (np)
2254 kfree(da7219->clk_hw_data);
2255 }
2256 #else
2257 static inline int da7219_register_dai_clks(struct snd_soc_component *component)
2258 {
2259 return 0;
2260 }
2261
2262 static void da7219_free_dai_clks(struct snd_soc_component *component) {}
2263 #endif /* CONFIG_COMMON_CLK */
2264
2265 static void da7219_handle_pdata(struct snd_soc_component *component)
2266 {
2267 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2268 struct da7219_pdata *pdata = da7219->pdata;
2269
2270 if (pdata) {
2271 u8 micbias_lvl = 0;
2272
2273 da7219->wakeup_source = pdata->wakeup_source;
2274
2275 /* Mic Bias voltages */
2276 switch (pdata->micbias_lvl) {
2277 case DA7219_MICBIAS_1_6V:
2278 case DA7219_MICBIAS_1_8V:
2279 case DA7219_MICBIAS_2_0V:
2280 case DA7219_MICBIAS_2_2V:
2281 case DA7219_MICBIAS_2_4V:
2282 case DA7219_MICBIAS_2_6V:
2283 micbias_lvl |= (pdata->micbias_lvl <<
2284 DA7219_MICBIAS1_LEVEL_SHIFT);
2285 break;
2286 }
2287
2288 snd_soc_component_write(component, DA7219_MICBIAS_CTRL, micbias_lvl);
2289
2290 /*
2291 * Calculate delay required to compensate for DC offset in
2292 * Mic PGA, based on Mic Bias voltage.
2293 */
2294 da7219->mic_pga_delay = DA7219_MIC_PGA_BASE_DELAY +
2295 (pdata->micbias_lvl *
2296 DA7219_MIC_PGA_OFFSET_DELAY);
2297
2298 /* Mic */
2299 switch (pdata->mic_amp_in_sel) {
2300 case DA7219_MIC_AMP_IN_SEL_DIFF:
2301 case DA7219_MIC_AMP_IN_SEL_SE_P:
2302 case DA7219_MIC_AMP_IN_SEL_SE_N:
2303 snd_soc_component_write(component, DA7219_MIC_1_SELECT,
2304 pdata->mic_amp_in_sel);
2305 break;
2306 }
2307 }
2308 }
2309
2310
2311 /*
2312 * Regmap configs
2313 */
2314
2315 static struct reg_default da7219_reg_defaults[] = {
2316 { DA7219_MIC_1_SELECT, 0x00 },
2317 { DA7219_CIF_TIMEOUT_CTRL, 0x01 },
2318 { DA7219_SR_24_48, 0x00 },
2319 { DA7219_SR, 0x0A },
2320 { DA7219_CIF_I2C_ADDR_CFG, 0x02 },
2321 { DA7219_PLL_CTRL, 0x10 },
2322 { DA7219_PLL_FRAC_TOP, 0x00 },
2323 { DA7219_PLL_FRAC_BOT, 0x00 },
2324 { DA7219_PLL_INTEGER, 0x20 },
2325 { DA7219_DIG_ROUTING_DAI, 0x10 },
2326 { DA7219_DAI_CLK_MODE, 0x01 },
2327 { DA7219_DAI_CTRL, 0x28 },
2328 { DA7219_DAI_TDM_CTRL, 0x40 },
2329 { DA7219_DIG_ROUTING_DAC, 0x32 },
2330 { DA7219_DAI_OFFSET_LOWER, 0x00 },
2331 { DA7219_DAI_OFFSET_UPPER, 0x00 },
2332 { DA7219_REFERENCES, 0x08 },
2333 { DA7219_MIXIN_L_SELECT, 0x00 },
2334 { DA7219_MIXIN_L_GAIN, 0x03 },
2335 { DA7219_ADC_L_GAIN, 0x6F },
2336 { DA7219_ADC_FILTERS1, 0x80 },
2337 { DA7219_MIC_1_GAIN, 0x01 },
2338 { DA7219_SIDETONE_CTRL, 0x40 },
2339 { DA7219_SIDETONE_GAIN, 0x0E },
2340 { DA7219_DROUTING_ST_OUTFILT_1L, 0x01 },
2341 { DA7219_DROUTING_ST_OUTFILT_1R, 0x02 },
2342 { DA7219_DAC_FILTERS5, 0x00 },
2343 { DA7219_DAC_FILTERS2, 0x88 },
2344 { DA7219_DAC_FILTERS3, 0x88 },
2345 { DA7219_DAC_FILTERS4, 0x08 },
2346 { DA7219_DAC_FILTERS1, 0x80 },
2347 { DA7219_DAC_L_GAIN, 0x6F },
2348 { DA7219_DAC_R_GAIN, 0x6F },
2349 { DA7219_CP_CTRL, 0x20 },
2350 { DA7219_HP_L_GAIN, 0x39 },
2351 { DA7219_HP_R_GAIN, 0x39 },
2352 { DA7219_MIXOUT_L_SELECT, 0x00 },
2353 { DA7219_MIXOUT_R_SELECT, 0x00 },
2354 { DA7219_MICBIAS_CTRL, 0x03 },
2355 { DA7219_MIC_1_CTRL, 0x40 },
2356 { DA7219_MIXIN_L_CTRL, 0x40 },
2357 { DA7219_ADC_L_CTRL, 0x40 },
2358 { DA7219_DAC_L_CTRL, 0x40 },
2359 { DA7219_DAC_R_CTRL, 0x40 },
2360 { DA7219_HP_L_CTRL, 0x40 },
2361 { DA7219_HP_R_CTRL, 0x40 },
2362 { DA7219_MIXOUT_L_CTRL, 0x10 },
2363 { DA7219_MIXOUT_R_CTRL, 0x10 },
2364 { DA7219_CHIP_ID1, 0x23 },
2365 { DA7219_CHIP_ID2, 0x93 },
2366 { DA7219_IO_CTRL, 0x00 },
2367 { DA7219_GAIN_RAMP_CTRL, 0x00 },
2368 { DA7219_PC_COUNT, 0x02 },
2369 { DA7219_CP_VOL_THRESHOLD1, 0x0E },
2370 { DA7219_DIG_CTRL, 0x00 },
2371 { DA7219_ALC_CTRL2, 0x00 },
2372 { DA7219_ALC_CTRL3, 0x00 },
2373 { DA7219_ALC_NOISE, 0x3F },
2374 { DA7219_ALC_TARGET_MIN, 0x3F },
2375 { DA7219_ALC_TARGET_MAX, 0x00 },
2376 { DA7219_ALC_GAIN_LIMITS, 0xFF },
2377 { DA7219_ALC_ANA_GAIN_LIMITS, 0x71 },
2378 { DA7219_ALC_ANTICLIP_CTRL, 0x00 },
2379 { DA7219_ALC_ANTICLIP_LEVEL, 0x00 },
2380 { DA7219_DAC_NG_SETUP_TIME, 0x00 },
2381 { DA7219_DAC_NG_OFF_THRESH, 0x00 },
2382 { DA7219_DAC_NG_ON_THRESH, 0x00 },
2383 { DA7219_DAC_NG_CTRL, 0x00 },
2384 { DA7219_TONE_GEN_CFG1, 0x00 },
2385 { DA7219_TONE_GEN_CFG2, 0x00 },
2386 { DA7219_TONE_GEN_CYCLES, 0x00 },
2387 { DA7219_TONE_GEN_FREQ1_L, 0x55 },
2388 { DA7219_TONE_GEN_FREQ1_U, 0x15 },
2389 { DA7219_TONE_GEN_FREQ2_L, 0x00 },
2390 { DA7219_TONE_GEN_FREQ2_U, 0x40 },
2391 { DA7219_TONE_GEN_ON_PER, 0x02 },
2392 { DA7219_TONE_GEN_OFF_PER, 0x01 },
2393 { DA7219_ACCDET_IRQ_MASK_A, 0x00 },
2394 { DA7219_ACCDET_IRQ_MASK_B, 0x00 },
2395 { DA7219_ACCDET_CONFIG_1, 0xD6 },
2396 { DA7219_ACCDET_CONFIG_2, 0x34 },
2397 { DA7219_ACCDET_CONFIG_3, 0x0A },
2398 { DA7219_ACCDET_CONFIG_4, 0x16 },
2399 { DA7219_ACCDET_CONFIG_5, 0x21 },
2400 { DA7219_ACCDET_CONFIG_6, 0x3E },
2401 { DA7219_ACCDET_CONFIG_7, 0x01 },
2402 { DA7219_SYSTEM_ACTIVE, 0x00 },
2403 };
2404
2405 static bool da7219_volatile_register(struct device *dev, unsigned int reg)
2406 {
2407 switch (reg) {
2408 case DA7219_MIC_1_GAIN_STATUS:
2409 case DA7219_MIXIN_L_GAIN_STATUS:
2410 case DA7219_ADC_L_GAIN_STATUS:
2411 case DA7219_DAC_L_GAIN_STATUS:
2412 case DA7219_DAC_R_GAIN_STATUS:
2413 case DA7219_HP_L_GAIN_STATUS:
2414 case DA7219_HP_R_GAIN_STATUS:
2415 case DA7219_CIF_CTRL:
2416 case DA7219_PLL_SRM_STS:
2417 case DA7219_ALC_CTRL1:
2418 case DA7219_SYSTEM_MODES_INPUT:
2419 case DA7219_SYSTEM_MODES_OUTPUT:
2420 case DA7219_ALC_OFFSET_AUTO_M_L:
2421 case DA7219_ALC_OFFSET_AUTO_U_L:
2422 case DA7219_TONE_GEN_CFG1:
2423 case DA7219_ACCDET_STATUS_A:
2424 case DA7219_ACCDET_STATUS_B:
2425 case DA7219_ACCDET_IRQ_EVENT_A:
2426 case DA7219_ACCDET_IRQ_EVENT_B:
2427 case DA7219_ACCDET_CONFIG_8:
2428 case DA7219_SYSTEM_STATUS:
2429 return true;
2430 default:
2431 return false;
2432 }
2433 }
2434
2435 static const struct regmap_config da7219_regmap_config = {
2436 .reg_bits = 8,
2437 .val_bits = 8,
2438
2439 .max_register = DA7219_SYSTEM_ACTIVE,
2440 .reg_defaults = da7219_reg_defaults,
2441 .num_reg_defaults = ARRAY_SIZE(da7219_reg_defaults),
2442 .volatile_reg = da7219_volatile_register,
2443 .cache_type = REGCACHE_RBTREE,
2444 };
2445
2446 static struct reg_sequence da7219_rev_aa_patch[] = {
2447 { DA7219_REFERENCES, 0x08 },
2448 };
2449
2450 static int da7219_probe(struct snd_soc_component *component)
2451 {
2452 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2453 unsigned int system_active, system_status, rev;
2454 u8 io_voltage_lvl;
2455 int i, ret;
2456
2457 da7219->component = component;
2458 mutex_init(&da7219->ctrl_lock);
2459 mutex_init(&da7219->pll_lock);
2460
2461 /* Regulator configuration */
2462 ret = da7219_handle_supplies(component, &io_voltage_lvl);
2463 if (ret)
2464 return ret;
2465
2466 regcache_cache_bypass(da7219->regmap, true);
2467
2468 /* Disable audio paths if still active from previous start */
2469 regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active);
2470 if (system_active) {
2471 regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL,
2472 DA7219_GAIN_RAMP_RATE_NOMINAL);
2473 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00);
2474 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01);
2475
2476 for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) {
2477 regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS,
2478 &system_status);
2479 if (!system_status)
2480 break;
2481
2482 msleep(DA7219_SYS_STAT_CHECK_DELAY);
2483 }
2484 }
2485
2486 /* Soft reset component */
2487 regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1,
2488 DA7219_ACCDET_EN_MASK, 0);
2489 regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL,
2490 DA7219_CIF_REG_SOFT_RESET_MASK,
2491 DA7219_CIF_REG_SOFT_RESET_MASK);
2492 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
2493 DA7219_SYSTEM_ACTIVE_MASK, 0);
2494 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
2495 DA7219_SYSTEM_ACTIVE_MASK, 1);
2496
2497 regcache_cache_bypass(da7219->regmap, false);
2498 regmap_reinit_cache(da7219->regmap, &da7219_regmap_config);
2499
2500 /* Update IO voltage level range based on supply level */
2501 snd_soc_component_write(component, DA7219_IO_CTRL, io_voltage_lvl);
2502
2503 ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev);
2504 if (ret) {
2505 dev_err(component->dev, "Failed to read chip revision: %d\n", ret);
2506 goto err_disable_reg;
2507 }
2508
2509 switch (rev & DA7219_CHIP_MINOR_MASK) {
2510 case 0:
2511 ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch,
2512 ARRAY_SIZE(da7219_rev_aa_patch));
2513 if (ret) {
2514 dev_err(component->dev, "Failed to register AA patch: %d\n",
2515 ret);
2516 goto err_disable_reg;
2517 }
2518 break;
2519 default:
2520 break;
2521 }
2522
2523 /* Handle DT/ACPI/Platform data */
2524 da7219_handle_pdata(component);
2525
2526 /* Check if MCLK provided */
2527 da7219->mclk = clk_get(component->dev, "mclk");
2528 if (IS_ERR(da7219->mclk)) {
2529 if (PTR_ERR(da7219->mclk) != -ENOENT) {
2530 ret = PTR_ERR(da7219->mclk);
2531 goto err_disable_reg;
2532 } else {
2533 da7219->mclk = NULL;
2534 }
2535 }
2536
2537 /* Register CCF DAI clock control */
2538 ret = da7219_register_dai_clks(component);
2539 if (ret)
2540 goto err_put_clk;
2541
2542 /* Default PC counter to free-running */
2543 snd_soc_component_update_bits(component, DA7219_PC_COUNT, DA7219_PC_FREERUN_MASK,
2544 DA7219_PC_FREERUN_MASK);
2545
2546 /* Default gain ramping */
2547 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
2548 DA7219_MIXIN_L_AMP_RAMP_EN_MASK,
2549 DA7219_MIXIN_L_AMP_RAMP_EN_MASK);
2550 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, DA7219_ADC_L_RAMP_EN_MASK,
2551 DA7219_ADC_L_RAMP_EN_MASK);
2552 snd_soc_component_update_bits(component, DA7219_DAC_L_CTRL, DA7219_DAC_L_RAMP_EN_MASK,
2553 DA7219_DAC_L_RAMP_EN_MASK);
2554 snd_soc_component_update_bits(component, DA7219_DAC_R_CTRL, DA7219_DAC_R_RAMP_EN_MASK,
2555 DA7219_DAC_R_RAMP_EN_MASK);
2556 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2557 DA7219_HP_L_AMP_RAMP_EN_MASK,
2558 DA7219_HP_L_AMP_RAMP_EN_MASK);
2559 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2560 DA7219_HP_R_AMP_RAMP_EN_MASK,
2561 DA7219_HP_R_AMP_RAMP_EN_MASK);
2562
2563 /* Default minimum gain on HP to avoid pops during DAPM sequencing */
2564 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2565 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK,
2566 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK);
2567 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2568 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK,
2569 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK);
2570
2571 /* Default infinite tone gen, start/stop by Kcontrol */
2572 snd_soc_component_write(component, DA7219_TONE_GEN_CYCLES, DA7219_BEEP_CYCLES_MASK);
2573
2574 /* Initialise AAD block */
2575 ret = da7219_aad_init(component);
2576 if (ret)
2577 goto err_free_dai_clks;
2578
2579 return 0;
2580
2581 err_free_dai_clks:
2582 da7219_free_dai_clks(component);
2583
2584 err_put_clk:
2585 clk_put(da7219->mclk);
2586
2587 err_disable_reg:
2588 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2589 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
2590
2591 return ret;
2592 }
2593
2594 static void da7219_remove(struct snd_soc_component *component)
2595 {
2596 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2597
2598 da7219_aad_exit(component);
2599
2600 da7219_free_dai_clks(component);
2601 clk_put(da7219->mclk);
2602
2603 /* Supplies */
2604 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2605 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
2606 }
2607
2608 #ifdef CONFIG_PM
2609 static int da7219_suspend(struct snd_soc_component *component)
2610 {
2611 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2612
2613 /* Suspend AAD if we're not a wake-up source */
2614 if (!da7219->wakeup_source)
2615 da7219_aad_suspend(component);
2616
2617 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2618
2619 return 0;
2620 }
2621
2622 static int da7219_resume(struct snd_soc_component *component)
2623 {
2624 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2625
2626 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
2627
2628 /* Resume AAD if previously suspended */
2629 if (!da7219->wakeup_source)
2630 da7219_aad_resume(component);
2631
2632 return 0;
2633 }
2634 #else
2635 #define da7219_suspend NULL
2636 #define da7219_resume NULL
2637 #endif
2638
2639 static int da7219_set_jack(struct snd_soc_component *component, struct snd_soc_jack *jack,
2640 void *data)
2641 {
2642 da7219_aad_jack_det(component, jack);
2643
2644 return 0;
2645 }
2646
2647 static const struct snd_soc_component_driver soc_component_dev_da7219 = {
2648 .probe = da7219_probe,
2649 .remove = da7219_remove,
2650 .suspend = da7219_suspend,
2651 .resume = da7219_resume,
2652 .set_jack = da7219_set_jack,
2653 .set_bias_level = da7219_set_bias_level,
2654 .controls = da7219_snd_controls,
2655 .num_controls = ARRAY_SIZE(da7219_snd_controls),
2656 .dapm_widgets = da7219_dapm_widgets,
2657 .num_dapm_widgets = ARRAY_SIZE(da7219_dapm_widgets),
2658 .dapm_routes = da7219_audio_map,
2659 .num_dapm_routes = ARRAY_SIZE(da7219_audio_map),
2660 .idle_bias_on = 1,
2661 .use_pmdown_time = 1,
2662 .endianness = 1,
2663 };
2664
2665
2666 /*
2667 * I2C layer
2668 */
2669
2670 static int da7219_i2c_probe(struct i2c_client *i2c)
2671 {
2672 struct device *dev = &i2c->dev;
2673 struct da7219_priv *da7219;
2674 int ret;
2675
2676 da7219 = devm_kzalloc(dev, sizeof(struct da7219_priv),
2677 GFP_KERNEL);
2678 if (!da7219)
2679 return -ENOMEM;
2680
2681 i2c_set_clientdata(i2c, da7219);
2682
2683 da7219->regmap = devm_regmap_init_i2c(i2c, &da7219_regmap_config);
2684 if (IS_ERR(da7219->regmap)) {
2685 ret = PTR_ERR(da7219->regmap);
2686 dev_err(dev, "regmap_init() failed: %d\n", ret);
2687 return ret;
2688 }
2689
2690 /* Retrieve DT/ACPI/Platform data */
2691 da7219->pdata = dev_get_platdata(dev);
2692 if (!da7219->pdata)
2693 da7219->pdata = da7219_fw_to_pdata(dev);
2694
2695 /* AAD */
2696 ret = da7219_aad_probe(i2c);
2697 if (ret)
2698 return ret;
2699
2700 ret = devm_snd_soc_register_component(dev, &soc_component_dev_da7219,
2701 &da7219_dai, 1);
2702 if (ret < 0) {
2703 dev_err(dev, "Failed to register da7219 component: %d\n", ret);
2704 }
2705 return ret;
2706 }
2707
2708 static const struct i2c_device_id da7219_i2c_id[] = {
2709 { "da7219", },
2710 { }
2711 };
2712 MODULE_DEVICE_TABLE(i2c, da7219_i2c_id);
2713
2714 static struct i2c_driver da7219_i2c_driver = {
2715 .driver = {
2716 .name = "da7219",
2717 .of_match_table = of_match_ptr(da7219_of_match),
2718 .acpi_match_table = ACPI_PTR(da7219_acpi_match),
2719 },
2720 .probe = da7219_i2c_probe,
2721 .id_table = da7219_i2c_id,
2722 };
2723
2724 module_i2c_driver(da7219_i2c_driver);
2725
2726 MODULE_DESCRIPTION("ASoC DA7219 Codec Driver");
2727 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
2728 MODULE_LICENSE("GPL");
Kernel DRM miscellaneous fixes and cross-tree changes