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Merge tag 'net-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
[drm/drm-misc.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
blobf1f6bb328a55ba5a0d2f936e492816b4cabe43be
1 /* Broadcom NetXtreme-C/E network driver.
2 *
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
9 */
10
11 #include <linux/bitops.h>
12 #include <linux/ctype.h>
13 #include <linux/stringify.h>
14 #include <linux/ethtool.h>
15 #include <linux/ethtool_netlink.h>
16 #include <linux/linkmode.h>
17 #include <linux/interrupt.h>
18 #include <linux/pci.h>
19 #include <linux/etherdevice.h>
20 #include <linux/crc32.h>
21 #include <linux/firmware.h>
22 #include <linux/utsname.h>
23 #include <linux/time.h>
24 #include <linux/ptp_clock_kernel.h>
25 #include <linux/net_tstamp.h>
26 #include <linux/timecounter.h>
27 #include <net/netlink.h>
28 #include "bnxt_hsi.h"
29 #include "bnxt.h"
30 #include "bnxt_hwrm.h"
31 #include "bnxt_ulp.h"
32 #include "bnxt_xdp.h"
33 #include "bnxt_ptp.h"
34 #include "bnxt_ethtool.h"
35 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
36 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
37 #include "bnxt_coredump.h"
38
39 #define BNXT_NVM_ERR_MSG(dev, extack, msg) \
40 do { \
41 if (extack) \
42 NL_SET_ERR_MSG_MOD(extack, msg); \
43 netdev_err(dev, "%s\n", msg); \
44 } while (0)
45
46 static u32 bnxt_get_msglevel(struct net_device *dev)
47 {
48 struct bnxt *bp = netdev_priv(dev);
49
50 return bp->msg_enable;
51 }
52
53 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
54 {
55 struct bnxt *bp = netdev_priv(dev);
56
57 bp->msg_enable = value;
58 }
59
60 static int bnxt_get_coalesce(struct net_device *dev,
61 struct ethtool_coalesce *coal,
62 struct kernel_ethtool_coalesce *kernel_coal,
63 struct netlink_ext_ack *extack)
64 {
65 struct bnxt *bp = netdev_priv(dev);
66 struct bnxt_coal *hw_coal;
67 u16 mult;
68
69 memset(coal, 0, sizeof(*coal));
70
71 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
72
73 hw_coal = &bp->rx_coal;
74 mult = hw_coal->bufs_per_record;
75 coal->rx_coalesce_usecs = hw_coal->coal_ticks;
76 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
77 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
78 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
79 if (hw_coal->flags &
80 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET)
81 kernel_coal->use_cqe_mode_rx = true;
82
83 hw_coal = &bp->tx_coal;
84 mult = hw_coal->bufs_per_record;
85 coal->tx_coalesce_usecs = hw_coal->coal_ticks;
86 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
87 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
88 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
89 if (hw_coal->flags &
90 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET)
91 kernel_coal->use_cqe_mode_tx = true;
92
93 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
94
95 return 0;
96 }
97
98 static int bnxt_set_coalesce(struct net_device *dev,
99 struct ethtool_coalesce *coal,
100 struct kernel_ethtool_coalesce *kernel_coal,
101 struct netlink_ext_ack *extack)
102 {
103 struct bnxt *bp = netdev_priv(dev);
104 bool update_stats = false;
105 struct bnxt_coal *hw_coal;
106 int rc = 0;
107 u16 mult;
108
109 if (coal->use_adaptive_rx_coalesce) {
110 bp->flags |= BNXT_FLAG_DIM;
111 } else {
112 if (bp->flags & BNXT_FLAG_DIM) {
113 bp->flags &= ~(BNXT_FLAG_DIM);
114 goto reset_coalesce;
115 }
116 }
117
118 if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) &&
119 !(bp->coal_cap.cmpl_params &
120 RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET))
121 return -EOPNOTSUPP;
122
123 hw_coal = &bp->rx_coal;
124 mult = hw_coal->bufs_per_record;
125 hw_coal->coal_ticks = coal->rx_coalesce_usecs;
126 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
127 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
128 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
129 hw_coal->flags &=
130 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
131 if (kernel_coal->use_cqe_mode_rx)
132 hw_coal->flags |=
133 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
134
135 hw_coal = &bp->tx_coal;
136 mult = hw_coal->bufs_per_record;
137 hw_coal->coal_ticks = coal->tx_coalesce_usecs;
138 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
139 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
140 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
141 hw_coal->flags &=
142 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
143 if (kernel_coal->use_cqe_mode_tx)
144 hw_coal->flags |=
145 RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
146
147 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
148 u32 stats_ticks = coal->stats_block_coalesce_usecs;
149
150 /* Allow 0, which means disable. */
151 if (stats_ticks)
152 stats_ticks = clamp_t(u32, stats_ticks,
153 BNXT_MIN_STATS_COAL_TICKS,
154 BNXT_MAX_STATS_COAL_TICKS);
155 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
156 bp->stats_coal_ticks = stats_ticks;
157 if (bp->stats_coal_ticks)
158 bp->current_interval =
159 bp->stats_coal_ticks * HZ / 1000000;
160 else
161 bp->current_interval = BNXT_TIMER_INTERVAL;
162 update_stats = true;
163 }
164
165 reset_coalesce:
166 if (test_bit(BNXT_STATE_OPEN, &bp->state)) {
167 if (update_stats) {
168 bnxt_close_nic(bp, true, false);
169 rc = bnxt_open_nic(bp, true, false);
170 } else {
171 rc = bnxt_hwrm_set_coal(bp);
172 }
173 }
174
175 return rc;
176 }
177
178 static const char * const bnxt_ring_rx_stats_str[] = {
179 "rx_ucast_packets",
180 "rx_mcast_packets",
181 "rx_bcast_packets",
182 "rx_discards",
183 "rx_errors",
184 "rx_ucast_bytes",
185 "rx_mcast_bytes",
186 "rx_bcast_bytes",
187 };
188
189 static const char * const bnxt_ring_tx_stats_str[] = {
190 "tx_ucast_packets",
191 "tx_mcast_packets",
192 "tx_bcast_packets",
193 "tx_errors",
194 "tx_discards",
195 "tx_ucast_bytes",
196 "tx_mcast_bytes",
197 "tx_bcast_bytes",
198 };
199
200 static const char * const bnxt_ring_tpa_stats_str[] = {
201 "tpa_packets",
202 "tpa_bytes",
203 "tpa_events",
204 "tpa_aborts",
205 };
206
207 static const char * const bnxt_ring_tpa2_stats_str[] = {
208 "rx_tpa_eligible_pkt",
209 "rx_tpa_eligible_bytes",
210 "rx_tpa_pkt",
211 "rx_tpa_bytes",
212 "rx_tpa_errors",
213 "rx_tpa_events",
214 };
215
216 static const char * const bnxt_rx_sw_stats_str[] = {
217 "rx_l4_csum_errors",
218 "rx_resets",
219 "rx_buf_errors",
220 };
221
222 static const char * const bnxt_cmn_sw_stats_str[] = {
223 "missed_irqs",
224 };
225
226 #define BNXT_RX_STATS_ENTRY(counter) \
227 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
228
229 #define BNXT_TX_STATS_ENTRY(counter) \
230 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
231
232 #define BNXT_RX_STATS_EXT_ENTRY(counter) \
233 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
234
235 #define BNXT_TX_STATS_EXT_ENTRY(counter) \
236 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
237
238 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \
239 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \
240 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
241
242 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \
243 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \
244 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
245
246 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \
247 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \
248 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \
249 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \
250 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \
251 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \
252 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \
253 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \
254 BNXT_RX_STATS_EXT_PFC_ENTRY(7)
255
256 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \
257 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \
258 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \
259 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \
260 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \
261 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \
262 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \
263 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \
264 BNXT_TX_STATS_EXT_PFC_ENTRY(7)
265
266 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \
267 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \
268 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
269
270 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \
271 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \
272 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
273
274 #define BNXT_RX_STATS_EXT_COS_ENTRIES \
275 BNXT_RX_STATS_EXT_COS_ENTRY(0), \
276 BNXT_RX_STATS_EXT_COS_ENTRY(1), \
277 BNXT_RX_STATS_EXT_COS_ENTRY(2), \
278 BNXT_RX_STATS_EXT_COS_ENTRY(3), \
279 BNXT_RX_STATS_EXT_COS_ENTRY(4), \
280 BNXT_RX_STATS_EXT_COS_ENTRY(5), \
281 BNXT_RX_STATS_EXT_COS_ENTRY(6), \
282 BNXT_RX_STATS_EXT_COS_ENTRY(7) \
283
284 #define BNXT_TX_STATS_EXT_COS_ENTRIES \
285 BNXT_TX_STATS_EXT_COS_ENTRY(0), \
286 BNXT_TX_STATS_EXT_COS_ENTRY(1), \
287 BNXT_TX_STATS_EXT_COS_ENTRY(2), \
288 BNXT_TX_STATS_EXT_COS_ENTRY(3), \
289 BNXT_TX_STATS_EXT_COS_ENTRY(4), \
290 BNXT_TX_STATS_EXT_COS_ENTRY(5), \
291 BNXT_TX_STATS_EXT_COS_ENTRY(6), \
292 BNXT_TX_STATS_EXT_COS_ENTRY(7) \
293
294 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \
295 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \
296 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
297
298 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \
299 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \
300 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \
301 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \
302 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \
303 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \
304 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \
305 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \
306 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
307
308 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \
309 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \
310 __stringify(counter##_pri##n) }
311
312 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \
313 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \
314 __stringify(counter##_pri##n) }
315
316 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \
317 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \
318 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \
319 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \
320 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \
321 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \
322 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \
323 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \
324 BNXT_RX_STATS_PRI_ENTRY(counter, 7)
325
326 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \
327 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \
328 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \
329 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \
330 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \
331 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \
332 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \
333 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \
334 BNXT_TX_STATS_PRI_ENTRY(counter, 7)
335
336 enum {
337 RX_TOTAL_DISCARDS,
338 TX_TOTAL_DISCARDS,
339 RX_NETPOLL_DISCARDS,
340 };
341
342 static const char *const bnxt_ring_err_stats_arr[] = {
343 "rx_total_l4_csum_errors",
344 "rx_total_resets",
345 "rx_total_buf_errors",
346 "rx_total_oom_discards",
347 "rx_total_netpoll_discards",
348 "rx_total_ring_discards",
349 "tx_total_resets",
350 "tx_total_ring_discards",
351 "total_missed_irqs",
352 };
353
354 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str)
355 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str)
356 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str)
357 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str)
358
359 static const struct {
360 long offset;
361 char string[ETH_GSTRING_LEN];
362 } bnxt_port_stats_arr[] = {
363 BNXT_RX_STATS_ENTRY(rx_64b_frames),
364 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
365 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
366 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
367 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
368 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
369 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
370 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
371 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
372 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
373 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
374 BNXT_RX_STATS_ENTRY(rx_total_frames),
375 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
376 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
377 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
378 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
379 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
380 BNXT_RX_STATS_ENTRY(rx_pause_frames),
381 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
382 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
383 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
384 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
385 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
386 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
387 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
388 BNXT_RX_STATS_ENTRY(rx_good_frames),
389 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
390 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
391 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
392 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
393 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
394 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
395 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
396 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
397 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
398 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
399 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
400 BNXT_RX_STATS_ENTRY(rx_bytes),
401 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
402 BNXT_RX_STATS_ENTRY(rx_runt_frames),
403 BNXT_RX_STATS_ENTRY(rx_stat_discard),
404 BNXT_RX_STATS_ENTRY(rx_stat_err),
405
406 BNXT_TX_STATS_ENTRY(tx_64b_frames),
407 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
408 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
409 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
410 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
411 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
412 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
413 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
414 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
415 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
416 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
417 BNXT_TX_STATS_ENTRY(tx_good_frames),
418 BNXT_TX_STATS_ENTRY(tx_total_frames),
419 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
420 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
421 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
422 BNXT_TX_STATS_ENTRY(tx_pause_frames),
423 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
424 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
425 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
426 BNXT_TX_STATS_ENTRY(tx_err),
427 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
428 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
429 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
430 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
431 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
432 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
433 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
434 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
435 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
436 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
437 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
438 BNXT_TX_STATS_ENTRY(tx_total_collisions),
439 BNXT_TX_STATS_ENTRY(tx_bytes),
440 BNXT_TX_STATS_ENTRY(tx_xthol_frames),
441 BNXT_TX_STATS_ENTRY(tx_stat_discard),
442 BNXT_TX_STATS_ENTRY(tx_stat_error),
443 };
444
445 static const struct {
446 long offset;
447 char string[ETH_GSTRING_LEN];
448 } bnxt_port_stats_ext_arr[] = {
449 BNXT_RX_STATS_EXT_ENTRY(link_down_events),
450 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
451 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
452 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
453 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
454 BNXT_RX_STATS_EXT_COS_ENTRIES,
455 BNXT_RX_STATS_EXT_PFC_ENTRIES,
456 BNXT_RX_STATS_EXT_ENTRY(rx_bits),
457 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
458 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
459 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
460 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
461 BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks),
462 BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks),
463 BNXT_RX_STATS_EXT_ENTRY(rx_filter_miss),
464 };
465
466 static const struct {
467 long offset;
468 char string[ETH_GSTRING_LEN];
469 } bnxt_tx_port_stats_ext_arr[] = {
470 BNXT_TX_STATS_EXT_COS_ENTRIES,
471 BNXT_TX_STATS_EXT_PFC_ENTRIES,
472 };
473
474 static const struct {
475 long base_off;
476 char string[ETH_GSTRING_LEN];
477 } bnxt_rx_bytes_pri_arr[] = {
478 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
479 };
480
481 static const struct {
482 long base_off;
483 char string[ETH_GSTRING_LEN];
484 } bnxt_rx_pkts_pri_arr[] = {
485 BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
486 };
487
488 static const struct {
489 long base_off;
490 char string[ETH_GSTRING_LEN];
491 } bnxt_tx_bytes_pri_arr[] = {
492 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
493 };
494
495 static const struct {
496 long base_off;
497 char string[ETH_GSTRING_LEN];
498 } bnxt_tx_pkts_pri_arr[] = {
499 BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
500 };
501
502 #define BNXT_NUM_RING_ERR_STATS ARRAY_SIZE(bnxt_ring_err_stats_arr)
503 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
504 #define BNXT_NUM_STATS_PRI \
505 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \
506 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \
507 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \
508 ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
509
510 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
511 {
512 if (BNXT_SUPPORTS_TPA(bp)) {
513 if (bp->max_tpa_v2) {
514 if (BNXT_CHIP_P5(bp))
515 return BNXT_NUM_TPA_RING_STATS_P5;
516 return BNXT_NUM_TPA_RING_STATS_P7;
517 }
518 return BNXT_NUM_TPA_RING_STATS;
519 }
520 return 0;
521 }
522
523 static int bnxt_get_num_ring_stats(struct bnxt *bp)
524 {
525 int rx, tx, cmn;
526
527 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
528 bnxt_get_num_tpa_ring_stats(bp);
529 tx = NUM_RING_TX_HW_STATS;
530 cmn = NUM_RING_CMN_SW_STATS;
531 return rx * bp->rx_nr_rings +
532 tx * (bp->tx_nr_rings_xdp + bp->tx_nr_rings_per_tc) +
533 cmn * bp->cp_nr_rings;
534 }
535
536 static int bnxt_get_num_stats(struct bnxt *bp)
537 {
538 int num_stats = bnxt_get_num_ring_stats(bp);
539 int len;
540
541 num_stats += BNXT_NUM_RING_ERR_STATS;
542
543 if (bp->flags & BNXT_FLAG_PORT_STATS)
544 num_stats += BNXT_NUM_PORT_STATS;
545
546 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
547 len = min_t(int, bp->fw_rx_stats_ext_size,
548 ARRAY_SIZE(bnxt_port_stats_ext_arr));
549 num_stats += len;
550 len = min_t(int, bp->fw_tx_stats_ext_size,
551 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
552 num_stats += len;
553 if (bp->pri2cos_valid)
554 num_stats += BNXT_NUM_STATS_PRI;
555 }
556
557 return num_stats;
558 }
559
560 static int bnxt_get_sset_count(struct net_device *dev, int sset)
561 {
562 struct bnxt *bp = netdev_priv(dev);
563
564 switch (sset) {
565 case ETH_SS_STATS:
566 return bnxt_get_num_stats(bp);
567 case ETH_SS_TEST:
568 if (!bp->num_tests)
569 return -EOPNOTSUPP;
570 return bp->num_tests;
571 default:
572 return -EOPNOTSUPP;
573 }
574 }
575
576 static bool is_rx_ring(struct bnxt *bp, int ring_num)
577 {
578 return ring_num < bp->rx_nr_rings;
579 }
580
581 static bool is_tx_ring(struct bnxt *bp, int ring_num)
582 {
583 int tx_base = 0;
584
585 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
586 tx_base = bp->rx_nr_rings;
587
588 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
589 return true;
590 return false;
591 }
592
593 static void bnxt_get_ethtool_stats(struct net_device *dev,
594 struct ethtool_stats *stats, u64 *buf)
595 {
596 struct bnxt_total_ring_err_stats ring_err_stats = {0};
597 struct bnxt *bp = netdev_priv(dev);
598 u64 *curr, *prev;
599 u32 tpa_stats;
600 u32 i, j = 0;
601
602 if (!bp->bnapi) {
603 j += bnxt_get_num_ring_stats(bp);
604 goto skip_ring_stats;
605 }
606
607 tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
608 for (i = 0; i < bp->cp_nr_rings; i++) {
609 struct bnxt_napi *bnapi = bp->bnapi[i];
610 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
611 u64 *sw_stats = cpr->stats.sw_stats;
612 u64 *sw;
613 int k;
614
615 if (is_rx_ring(bp, i)) {
616 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
617 buf[j] = sw_stats[k];
618 }
619 if (is_tx_ring(bp, i)) {
620 k = NUM_RING_RX_HW_STATS;
621 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
622 j++, k++)
623 buf[j] = sw_stats[k];
624 }
625 if (!tpa_stats || !is_rx_ring(bp, i))
626 goto skip_tpa_ring_stats;
627
628 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
629 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
630 tpa_stats; j++, k++)
631 buf[j] = sw_stats[k];
632
633 skip_tpa_ring_stats:
634 sw = (u64 *)&cpr->sw_stats->rx;
635 if (is_rx_ring(bp, i)) {
636 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
637 buf[j] = sw[k];
638 }
639
640 sw = (u64 *)&cpr->sw_stats->cmn;
641 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
642 buf[j] = sw[k];
643 }
644
645 bnxt_get_ring_err_stats(bp, &ring_err_stats);
646
647 skip_ring_stats:
648 curr = &ring_err_stats.rx_total_l4_csum_errors;
649 prev = &bp->ring_err_stats_prev.rx_total_l4_csum_errors;
650 for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++, j++, curr++, prev++)
651 buf[j] = *curr + *prev;
652
653 if (bp->flags & BNXT_FLAG_PORT_STATS) {
654 u64 *port_stats = bp->port_stats.sw_stats;
655
656 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
657 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
658 }
659 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
660 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
661 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
662 u32 len;
663
664 len = min_t(u32, bp->fw_rx_stats_ext_size,
665 ARRAY_SIZE(bnxt_port_stats_ext_arr));
666 for (i = 0; i < len; i++, j++) {
667 buf[j] = *(rx_port_stats_ext +
668 bnxt_port_stats_ext_arr[i].offset);
669 }
670 len = min_t(u32, bp->fw_tx_stats_ext_size,
671 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
672 for (i = 0; i < len; i++, j++) {
673 buf[j] = *(tx_port_stats_ext +
674 bnxt_tx_port_stats_ext_arr[i].offset);
675 }
676 if (bp->pri2cos_valid) {
677 for (i = 0; i < 8; i++, j++) {
678 long n = bnxt_rx_bytes_pri_arr[i].base_off +
679 bp->pri2cos_idx[i];
680
681 buf[j] = *(rx_port_stats_ext + n);
682 }
683 for (i = 0; i < 8; i++, j++) {
684 long n = bnxt_rx_pkts_pri_arr[i].base_off +
685 bp->pri2cos_idx[i];
686
687 buf[j] = *(rx_port_stats_ext + n);
688 }
689 for (i = 0; i < 8; i++, j++) {
690 long n = bnxt_tx_bytes_pri_arr[i].base_off +
691 bp->pri2cos_idx[i];
692
693 buf[j] = *(tx_port_stats_ext + n);
694 }
695 for (i = 0; i < 8; i++, j++) {
696 long n = bnxt_tx_pkts_pri_arr[i].base_off +
697 bp->pri2cos_idx[i];
698
699 buf[j] = *(tx_port_stats_ext + n);
700 }
701 }
702 }
703 }
704
705 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
706 {
707 struct bnxt *bp = netdev_priv(dev);
708 u32 i, j, num_str;
709 const char *str;
710
711 switch (stringset) {
712 case ETH_SS_STATS:
713 for (i = 0; i < bp->cp_nr_rings; i++) {
714 if (is_rx_ring(bp, i))
715 for (j = 0; j < NUM_RING_RX_HW_STATS; j++) {
716 str = bnxt_ring_rx_stats_str[j];
717 ethtool_sprintf(&buf, "[%d]: %s", i,
718 str);
719 }
720 if (is_tx_ring(bp, i))
721 for (j = 0; j < NUM_RING_TX_HW_STATS; j++) {
722 str = bnxt_ring_tx_stats_str[j];
723 ethtool_sprintf(&buf, "[%d]: %s", i,
724 str);
725 }
726 num_str = bnxt_get_num_tpa_ring_stats(bp);
727 if (!num_str || !is_rx_ring(bp, i))
728 goto skip_tpa_stats;
729
730 if (bp->max_tpa_v2)
731 for (j = 0; j < num_str; j++) {
732 str = bnxt_ring_tpa2_stats_str[j];
733 ethtool_sprintf(&buf, "[%d]: %s", i,
734 str);
735 }
736 else
737 for (j = 0; j < num_str; j++) {
738 str = bnxt_ring_tpa_stats_str[j];
739 ethtool_sprintf(&buf, "[%d]: %s", i,
740 str);
741 }
742 skip_tpa_stats:
743 if (is_rx_ring(bp, i))
744 for (j = 0; j < NUM_RING_RX_SW_STATS; j++) {
745 str = bnxt_rx_sw_stats_str[j];
746 ethtool_sprintf(&buf, "[%d]: %s", i,
747 str);
748 }
749 for (j = 0; j < NUM_RING_CMN_SW_STATS; j++) {
750 str = bnxt_cmn_sw_stats_str[j];
751 ethtool_sprintf(&buf, "[%d]: %s", i, str);
752 }
753 }
754 for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++)
755 ethtool_puts(&buf, bnxt_ring_err_stats_arr[i]);
756
757 if (bp->flags & BNXT_FLAG_PORT_STATS)
758 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
759 str = bnxt_port_stats_arr[i].string;
760 ethtool_puts(&buf, str);
761 }
762
763 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
764 u32 len;
765
766 len = min_t(u32, bp->fw_rx_stats_ext_size,
767 ARRAY_SIZE(bnxt_port_stats_ext_arr));
768 for (i = 0; i < len; i++) {
769 str = bnxt_port_stats_ext_arr[i].string;
770 ethtool_puts(&buf, str);
771 }
772
773 len = min_t(u32, bp->fw_tx_stats_ext_size,
774 ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
775 for (i = 0; i < len; i++) {
776 str = bnxt_tx_port_stats_ext_arr[i].string;
777 ethtool_puts(&buf, str);
778 }
779
780 if (bp->pri2cos_valid) {
781 for (i = 0; i < 8; i++) {
782 str = bnxt_rx_bytes_pri_arr[i].string;
783 ethtool_puts(&buf, str);
784 }
785
786 for (i = 0; i < 8; i++) {
787 str = bnxt_rx_pkts_pri_arr[i].string;
788 ethtool_puts(&buf, str);
789 }
790
791 for (i = 0; i < 8; i++) {
792 str = bnxt_tx_bytes_pri_arr[i].string;
793 ethtool_puts(&buf, str);
794 }
795
796 for (i = 0; i < 8; i++) {
797 str = bnxt_tx_pkts_pri_arr[i].string;
798 ethtool_puts(&buf, str);
799 }
800 }
801 }
802 break;
803 case ETH_SS_TEST:
804 if (bp->num_tests)
805 for (i = 0; i < bp->num_tests; i++)
806 ethtool_puts(&buf, bp->test_info->string[i]);
807 break;
808 default:
809 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
810 stringset);
811 break;
812 }
813 }
814
815 static void bnxt_get_ringparam(struct net_device *dev,
816 struct ethtool_ringparam *ering,
817 struct kernel_ethtool_ringparam *kernel_ering,
818 struct netlink_ext_ack *extack)
819 {
820 struct bnxt *bp = netdev_priv(dev);
821
822 if (bp->flags & BNXT_FLAG_AGG_RINGS) {
823 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA;
824 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
825 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED;
826 } else {
827 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
828 ering->rx_jumbo_max_pending = 0;
829 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED;
830 }
831 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
832
833 ering->rx_pending = bp->rx_ring_size;
834 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
835 ering->tx_pending = bp->tx_ring_size;
836 }
837
838 static int bnxt_set_ringparam(struct net_device *dev,
839 struct ethtool_ringparam *ering,
840 struct kernel_ethtool_ringparam *kernel_ering,
841 struct netlink_ext_ack *extack)
842 {
843 struct bnxt *bp = netdev_priv(dev);
844
845 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
846 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
847 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT))
848 return -EINVAL;
849
850 if (netif_running(dev))
851 bnxt_close_nic(bp, false, false);
852
853 bp->rx_ring_size = ering->rx_pending;
854 bp->tx_ring_size = ering->tx_pending;
855 bnxt_set_ring_params(bp);
856
857 if (netif_running(dev))
858 return bnxt_open_nic(bp, false, false);
859
860 return 0;
861 }
862
863 static void bnxt_get_channels(struct net_device *dev,
864 struct ethtool_channels *channel)
865 {
866 struct bnxt *bp = netdev_priv(dev);
867 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
868 int max_rx_rings, max_tx_rings, tcs;
869 int max_tx_sch_inputs, tx_grps;
870
871 /* Get the most up-to-date max_tx_sch_inputs. */
872 if (netif_running(dev) && BNXT_NEW_RM(bp))
873 bnxt_hwrm_func_resc_qcaps(bp, false);
874 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
875
876 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
877 if (max_tx_sch_inputs)
878 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
879
880 tcs = bp->num_tc;
881 tx_grps = max(tcs, 1);
882 if (bp->tx_nr_rings_xdp)
883 tx_grps++;
884 max_tx_rings /= tx_grps;
885 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
886
887 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
888 max_rx_rings = 0;
889 max_tx_rings = 0;
890 }
891 if (max_tx_sch_inputs)
892 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
893
894 if (tcs > 1)
895 max_tx_rings /= tcs;
896
897 channel->max_rx = max_rx_rings;
898 channel->max_tx = max_tx_rings;
899 channel->max_other = 0;
900 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
901 channel->combined_count = bp->rx_nr_rings;
902 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
903 channel->combined_count--;
904 } else {
905 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
906 channel->rx_count = bp->rx_nr_rings;
907 channel->tx_count = bp->tx_nr_rings_per_tc;
908 }
909 }
910 }
911
912 static int bnxt_set_channels(struct net_device *dev,
913 struct ethtool_channels *channel)
914 {
915 struct bnxt *bp = netdev_priv(dev);
916 int req_tx_rings, req_rx_rings, tcs;
917 bool sh = false;
918 int tx_xdp = 0;
919 int rc = 0;
920 int tx_cp;
921
922 if (channel->other_count)
923 return -EINVAL;
924
925 if (!channel->combined_count &&
926 (!channel->rx_count || !channel->tx_count))
927 return -EINVAL;
928
929 if (channel->combined_count &&
930 (channel->rx_count || channel->tx_count))
931 return -EINVAL;
932
933 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
934 channel->tx_count))
935 return -EINVAL;
936
937 if (channel->combined_count)
938 sh = true;
939
940 tcs = bp->num_tc;
941
942 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
943 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
944 if (bp->tx_nr_rings_xdp) {
945 if (!sh) {
946 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
947 return -EINVAL;
948 }
949 tx_xdp = req_rx_rings;
950 }
951
952 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
953 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
954 netif_is_rxfh_configured(dev)) {
955 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
956 return -EINVAL;
957 }
958
959 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
960 if (rc) {
961 netdev_warn(dev, "Unable to allocate the requested rings\n");
962 return rc;
963 }
964
965 if (netif_running(dev)) {
966 if (BNXT_PF(bp)) {
967 /* TODO CHIMP_FW: Send message to all VF's
968 * before PF unload
969 */
970 }
971 bnxt_close_nic(bp, true, false);
972 }
973
974 if (sh) {
975 bp->flags |= BNXT_FLAG_SHARED_RINGS;
976 bp->rx_nr_rings = channel->combined_count;
977 bp->tx_nr_rings_per_tc = channel->combined_count;
978 } else {
979 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
980 bp->rx_nr_rings = channel->rx_count;
981 bp->tx_nr_rings_per_tc = channel->tx_count;
982 }
983 bp->tx_nr_rings_xdp = tx_xdp;
984 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
985 if (tcs > 1)
986 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
987
988 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings);
989 bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) :
990 tx_cp + bp->rx_nr_rings;
991
992 /* After changing number of rx channels, update NTUPLE feature. */
993 netdev_update_features(dev);
994 if (netif_running(dev)) {
995 rc = bnxt_open_nic(bp, true, false);
996 if ((!rc) && BNXT_PF(bp)) {
997 /* TODO CHIMP_FW: Send message to all VF's
998 * to renable
999 */
1000 }
1001 } else {
1002 rc = bnxt_reserve_rings(bp, true);
1003 }
1004
1005 return rc;
1006 }
1007
1008 static u32 bnxt_get_all_fltr_ids_rcu(struct bnxt *bp, struct hlist_head tbl[],
1009 int tbl_size, u32 *ids, u32 start,
1010 u32 id_cnt)
1011 {
1012 int i, j = start;
1013
1014 if (j >= id_cnt)
1015 return j;
1016 for (i = 0; i < tbl_size; i++) {
1017 struct hlist_head *head;
1018 struct bnxt_filter_base *fltr;
1019
1020 head = &tbl[i];
1021 hlist_for_each_entry_rcu(fltr, head, hash) {
1022 if (!fltr->flags ||
1023 test_bit(BNXT_FLTR_FW_DELETED, &fltr->state))
1024 continue;
1025 ids[j++] = fltr->sw_id;
1026 if (j == id_cnt)
1027 return j;
1028 }
1029 }
1030 return j;
1031 }
1032
1033 static struct bnxt_filter_base *bnxt_get_one_fltr_rcu(struct bnxt *bp,
1034 struct hlist_head tbl[],
1035 int tbl_size, u32 id)
1036 {
1037 int i;
1038
1039 for (i = 0; i < tbl_size; i++) {
1040 struct hlist_head *head;
1041 struct bnxt_filter_base *fltr;
1042
1043 head = &tbl[i];
1044 hlist_for_each_entry_rcu(fltr, head, hash) {
1045 if (fltr->flags && fltr->sw_id == id)
1046 return fltr;
1047 }
1048 }
1049 return NULL;
1050 }
1051
1052 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
1053 u32 *rule_locs)
1054 {
1055 u32 count;
1056
1057 cmd->data = bp->ntp_fltr_count;
1058 rcu_read_lock();
1059 count = bnxt_get_all_fltr_ids_rcu(bp, bp->l2_fltr_hash_tbl,
1060 BNXT_L2_FLTR_HASH_SIZE, rule_locs, 0,
1061 cmd->rule_cnt);
1062 cmd->rule_cnt = bnxt_get_all_fltr_ids_rcu(bp, bp->ntp_fltr_hash_tbl,
1063 BNXT_NTP_FLTR_HASH_SIZE,
1064 rule_locs, count,
1065 cmd->rule_cnt);
1066 rcu_read_unlock();
1067
1068 return 0;
1069 }
1070
1071 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1072 {
1073 struct ethtool_rx_flow_spec *fs =
1074 (struct ethtool_rx_flow_spec *)&cmd->fs;
1075 struct bnxt_filter_base *fltr_base;
1076 struct bnxt_ntuple_filter *fltr;
1077 struct bnxt_flow_masks *fmasks;
1078 struct flow_keys *fkeys;
1079 int rc = -EINVAL;
1080
1081 if (fs->location >= bp->max_fltr)
1082 return rc;
1083
1084 rcu_read_lock();
1085 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->l2_fltr_hash_tbl,
1086 BNXT_L2_FLTR_HASH_SIZE,
1087 fs->location);
1088 if (fltr_base) {
1089 struct ethhdr *h_ether = &fs->h_u.ether_spec;
1090 struct ethhdr *m_ether = &fs->m_u.ether_spec;
1091 struct bnxt_l2_filter *l2_fltr;
1092 struct bnxt_l2_key *l2_key;
1093
1094 l2_fltr = container_of(fltr_base, struct bnxt_l2_filter, base);
1095 l2_key = &l2_fltr->l2_key;
1096 fs->flow_type = ETHER_FLOW;
1097 ether_addr_copy(h_ether->h_dest, l2_key->dst_mac_addr);
1098 eth_broadcast_addr(m_ether->h_dest);
1099 if (l2_key->vlan) {
1100 struct ethtool_flow_ext *m_ext = &fs->m_ext;
1101 struct ethtool_flow_ext *h_ext = &fs->h_ext;
1102
1103 fs->flow_type |= FLOW_EXT;
1104 m_ext->vlan_tci = htons(0xfff);
1105 h_ext->vlan_tci = htons(l2_key->vlan);
1106 }
1107 if (fltr_base->flags & BNXT_ACT_RING_DST)
1108 fs->ring_cookie = fltr_base->rxq;
1109 if (fltr_base->flags & BNXT_ACT_FUNC_DST)
1110 fs->ring_cookie = (u64)(fltr_base->vf_idx + 1) <<
1111 ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
1112 rcu_read_unlock();
1113 return 0;
1114 }
1115 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->ntp_fltr_hash_tbl,
1116 BNXT_NTP_FLTR_HASH_SIZE,
1117 fs->location);
1118 if (!fltr_base) {
1119 rcu_read_unlock();
1120 return rc;
1121 }
1122 fltr = container_of(fltr_base, struct bnxt_ntuple_filter, base);
1123
1124 fkeys = &fltr->fkeys;
1125 fmasks = &fltr->fmasks;
1126 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
1127 if (fkeys->basic.ip_proto == BNXT_IP_PROTO_WILDCARD) {
1128 fs->flow_type = IP_USER_FLOW;
1129 fs->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
1130 fs->h_u.usr_ip4_spec.proto = BNXT_IP_PROTO_WILDCARD;
1131 fs->m_u.usr_ip4_spec.proto = 0;
1132 } else if (fkeys->basic.ip_proto == IPPROTO_ICMP) {
1133 fs->flow_type = IP_USER_FLOW;
1134 fs->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
1135 fs->h_u.usr_ip4_spec.proto = IPPROTO_ICMP;
1136 fs->m_u.usr_ip4_spec.proto = BNXT_IP_PROTO_FULL_MASK;
1137 } else if (fkeys->basic.ip_proto == IPPROTO_TCP) {
1138 fs->flow_type = TCP_V4_FLOW;
1139 } else if (fkeys->basic.ip_proto == IPPROTO_UDP) {
1140 fs->flow_type = UDP_V4_FLOW;
1141 } else {
1142 goto fltr_err;
1143 }
1144
1145 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
1146 fs->m_u.tcp_ip4_spec.ip4src = fmasks->addrs.v4addrs.src;
1147 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
1148 fs->m_u.tcp_ip4_spec.ip4dst = fmasks->addrs.v4addrs.dst;
1149 if (fs->flow_type == TCP_V4_FLOW ||
1150 fs->flow_type == UDP_V4_FLOW) {
1151 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1152 fs->m_u.tcp_ip4_spec.psrc = fmasks->ports.src;
1153 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1154 fs->m_u.tcp_ip4_spec.pdst = fmasks->ports.dst;
1155 }
1156 } else {
1157 if (fkeys->basic.ip_proto == BNXT_IP_PROTO_WILDCARD) {
1158 fs->flow_type = IPV6_USER_FLOW;
1159 fs->h_u.usr_ip6_spec.l4_proto = BNXT_IP_PROTO_WILDCARD;
1160 fs->m_u.usr_ip6_spec.l4_proto = 0;
1161 } else if (fkeys->basic.ip_proto == IPPROTO_ICMPV6) {
1162 fs->flow_type = IPV6_USER_FLOW;
1163 fs->h_u.usr_ip6_spec.l4_proto = IPPROTO_ICMPV6;
1164 fs->m_u.usr_ip6_spec.l4_proto = BNXT_IP_PROTO_FULL_MASK;
1165 } else if (fkeys->basic.ip_proto == IPPROTO_TCP) {
1166 fs->flow_type = TCP_V6_FLOW;
1167 } else if (fkeys->basic.ip_proto == IPPROTO_UDP) {
1168 fs->flow_type = UDP_V6_FLOW;
1169 } else {
1170 goto fltr_err;
1171 }
1172
1173 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1174 fkeys->addrs.v6addrs.src;
1175 *(struct in6_addr *)&fs->m_u.tcp_ip6_spec.ip6src[0] =
1176 fmasks->addrs.v6addrs.src;
1177 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1178 fkeys->addrs.v6addrs.dst;
1179 *(struct in6_addr *)&fs->m_u.tcp_ip6_spec.ip6dst[0] =
1180 fmasks->addrs.v6addrs.dst;
1181 if (fs->flow_type == TCP_V6_FLOW ||
1182 fs->flow_type == UDP_V6_FLOW) {
1183 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1184 fs->m_u.tcp_ip6_spec.psrc = fmasks->ports.src;
1185 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1186 fs->m_u.tcp_ip6_spec.pdst = fmasks->ports.dst;
1187 }
1188 }
1189
1190 if (fltr->base.flags & BNXT_ACT_DROP)
1191 fs->ring_cookie = RX_CLS_FLOW_DISC;
1192 else
1193 fs->ring_cookie = fltr->base.rxq;
1194 rc = 0;
1195
1196 fltr_err:
1197 rcu_read_unlock();
1198
1199 return rc;
1200 }
1201
1202 static struct bnxt_rss_ctx *bnxt_get_rss_ctx_from_index(struct bnxt *bp,
1203 u32 index)
1204 {
1205 struct ethtool_rxfh_context *ctx;
1206
1207 ctx = xa_load(&bp->dev->ethtool->rss_ctx, index);
1208 if (!ctx)
1209 return NULL;
1210 return ethtool_rxfh_context_priv(ctx);
1211 }
1212
1213 static int bnxt_alloc_vnic_rss_table(struct bnxt *bp,
1214 struct bnxt_vnic_info *vnic)
1215 {
1216 int size = L1_CACHE_ALIGN(BNXT_MAX_RSS_TABLE_SIZE_P5);
1217
1218 vnic->rss_table_size = size + HW_HASH_KEY_SIZE;
1219 vnic->rss_table = dma_alloc_coherent(&bp->pdev->dev,
1220 vnic->rss_table_size,
1221 &vnic->rss_table_dma_addr,
1222 GFP_KERNEL);
1223 if (!vnic->rss_table)
1224 return -ENOMEM;
1225
1226 vnic->rss_hash_key = ((void *)vnic->rss_table) + size;
1227 vnic->rss_hash_key_dma_addr = vnic->rss_table_dma_addr + size;
1228 return 0;
1229 }
1230
1231 static int bnxt_add_l2_cls_rule(struct bnxt *bp,
1232 struct ethtool_rx_flow_spec *fs)
1233 {
1234 u32 ring = ethtool_get_flow_spec_ring(fs->ring_cookie);
1235 u8 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie);
1236 struct ethhdr *h_ether = &fs->h_u.ether_spec;
1237 struct ethhdr *m_ether = &fs->m_u.ether_spec;
1238 struct bnxt_l2_filter *fltr;
1239 struct bnxt_l2_key key;
1240 u16 vnic_id;
1241 u8 flags;
1242 int rc;
1243
1244 if (BNXT_CHIP_P5_PLUS(bp))
1245 return -EOPNOTSUPP;
1246
1247 if (!is_broadcast_ether_addr(m_ether->h_dest))
1248 return -EINVAL;
1249 ether_addr_copy(key.dst_mac_addr, h_ether->h_dest);
1250 key.vlan = 0;
1251 if (fs->flow_type & FLOW_EXT) {
1252 struct ethtool_flow_ext *m_ext = &fs->m_ext;
1253 struct ethtool_flow_ext *h_ext = &fs->h_ext;
1254
1255 if (m_ext->vlan_tci != htons(0xfff) || !h_ext->vlan_tci)
1256 return -EINVAL;
1257 key.vlan = ntohs(h_ext->vlan_tci);
1258 }
1259
1260 if (vf) {
1261 flags = BNXT_ACT_FUNC_DST;
1262 vnic_id = 0xffff;
1263 vf--;
1264 } else {
1265 flags = BNXT_ACT_RING_DST;
1266 vnic_id = bp->vnic_info[ring + 1].fw_vnic_id;
1267 }
1268 fltr = bnxt_alloc_new_l2_filter(bp, &key, flags);
1269 if (IS_ERR(fltr))
1270 return PTR_ERR(fltr);
1271
1272 fltr->base.fw_vnic_id = vnic_id;
1273 fltr->base.rxq = ring;
1274 fltr->base.vf_idx = vf;
1275 rc = bnxt_hwrm_l2_filter_alloc(bp, fltr);
1276 if (rc)
1277 bnxt_del_l2_filter(bp, fltr);
1278 else
1279 fs->location = fltr->base.sw_id;
1280 return rc;
1281 }
1282
1283 static bool bnxt_verify_ntuple_ip4_flow(struct ethtool_usrip4_spec *ip_spec,
1284 struct ethtool_usrip4_spec *ip_mask)
1285 {
1286 u8 mproto = ip_mask->proto;
1287 u8 sproto = ip_spec->proto;
1288
1289 if (ip_mask->l4_4_bytes || ip_mask->tos ||
1290 ip_spec->ip_ver != ETH_RX_NFC_IP4 ||
1291 (mproto && (mproto != BNXT_IP_PROTO_FULL_MASK || sproto != IPPROTO_ICMP)))
1292 return false;
1293 return true;
1294 }
1295
1296 static bool bnxt_verify_ntuple_ip6_flow(struct ethtool_usrip6_spec *ip_spec,
1297 struct ethtool_usrip6_spec *ip_mask)
1298 {
1299 u8 mproto = ip_mask->l4_proto;
1300 u8 sproto = ip_spec->l4_proto;
1301
1302 if (ip_mask->l4_4_bytes || ip_mask->tclass ||
1303 (mproto && (mproto != BNXT_IP_PROTO_FULL_MASK || sproto != IPPROTO_ICMPV6)))
1304 return false;
1305 return true;
1306 }
1307
1308 static int bnxt_add_ntuple_cls_rule(struct bnxt *bp,
1309 struct ethtool_rxnfc *cmd)
1310 {
1311 struct ethtool_rx_flow_spec *fs = &cmd->fs;
1312 struct bnxt_ntuple_filter *new_fltr, *fltr;
1313 u32 flow_type = fs->flow_type & 0xff;
1314 struct bnxt_l2_filter *l2_fltr;
1315 struct bnxt_flow_masks *fmasks;
1316 struct flow_keys *fkeys;
1317 u32 idx, ring;
1318 int rc;
1319 u8 vf;
1320
1321 if (!bp->vnic_info)
1322 return -EAGAIN;
1323
1324 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie);
1325 ring = ethtool_get_flow_spec_ring(fs->ring_cookie);
1326 if ((fs->flow_type & (FLOW_MAC_EXT | FLOW_EXT)) || vf)
1327 return -EOPNOTSUPP;
1328
1329 if (flow_type == IP_USER_FLOW) {
1330 if (!bnxt_verify_ntuple_ip4_flow(&fs->h_u.usr_ip4_spec,
1331 &fs->m_u.usr_ip4_spec))
1332 return -EOPNOTSUPP;
1333 }
1334
1335 if (flow_type == IPV6_USER_FLOW) {
1336 if (!bnxt_verify_ntuple_ip6_flow(&fs->h_u.usr_ip6_spec,
1337 &fs->m_u.usr_ip6_spec))
1338 return -EOPNOTSUPP;
1339 }
1340
1341 new_fltr = kzalloc(sizeof(*new_fltr), GFP_KERNEL);
1342 if (!new_fltr)
1343 return -ENOMEM;
1344
1345 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0];
1346 atomic_inc(&l2_fltr->refcnt);
1347 new_fltr->l2_fltr = l2_fltr;
1348 fmasks = &new_fltr->fmasks;
1349 fkeys = &new_fltr->fkeys;
1350
1351 rc = -EOPNOTSUPP;
1352 switch (flow_type) {
1353 case IP_USER_FLOW: {
1354 struct ethtool_usrip4_spec *ip_spec = &fs->h_u.usr_ip4_spec;
1355 struct ethtool_usrip4_spec *ip_mask = &fs->m_u.usr_ip4_spec;
1356
1357 fkeys->basic.ip_proto = ip_mask->proto ? ip_spec->proto
1358 : BNXT_IP_PROTO_WILDCARD;
1359 fkeys->basic.n_proto = htons(ETH_P_IP);
1360 fkeys->addrs.v4addrs.src = ip_spec->ip4src;
1361 fmasks->addrs.v4addrs.src = ip_mask->ip4src;
1362 fkeys->addrs.v4addrs.dst = ip_spec->ip4dst;
1363 fmasks->addrs.v4addrs.dst = ip_mask->ip4dst;
1364 break;
1365 }
1366 case TCP_V4_FLOW:
1367 case UDP_V4_FLOW: {
1368 struct ethtool_tcpip4_spec *ip_spec = &fs->h_u.tcp_ip4_spec;
1369 struct ethtool_tcpip4_spec *ip_mask = &fs->m_u.tcp_ip4_spec;
1370
1371 fkeys->basic.ip_proto = IPPROTO_TCP;
1372 if (flow_type == UDP_V4_FLOW)
1373 fkeys->basic.ip_proto = IPPROTO_UDP;
1374 fkeys->basic.n_proto = htons(ETH_P_IP);
1375 fkeys->addrs.v4addrs.src = ip_spec->ip4src;
1376 fmasks->addrs.v4addrs.src = ip_mask->ip4src;
1377 fkeys->addrs.v4addrs.dst = ip_spec->ip4dst;
1378 fmasks->addrs.v4addrs.dst = ip_mask->ip4dst;
1379 fkeys->ports.src = ip_spec->psrc;
1380 fmasks->ports.src = ip_mask->psrc;
1381 fkeys->ports.dst = ip_spec->pdst;
1382 fmasks->ports.dst = ip_mask->pdst;
1383 break;
1384 }
1385 case IPV6_USER_FLOW: {
1386 struct ethtool_usrip6_spec *ip_spec = &fs->h_u.usr_ip6_spec;
1387 struct ethtool_usrip6_spec *ip_mask = &fs->m_u.usr_ip6_spec;
1388
1389 fkeys->basic.ip_proto = ip_mask->l4_proto ? ip_spec->l4_proto
1390 : BNXT_IP_PROTO_WILDCARD;
1391 fkeys->basic.n_proto = htons(ETH_P_IPV6);
1392 fkeys->addrs.v6addrs.src = *(struct in6_addr *)&ip_spec->ip6src;
1393 fmasks->addrs.v6addrs.src = *(struct in6_addr *)&ip_mask->ip6src;
1394 fkeys->addrs.v6addrs.dst = *(struct in6_addr *)&ip_spec->ip6dst;
1395 fmasks->addrs.v6addrs.dst = *(struct in6_addr *)&ip_mask->ip6dst;
1396 break;
1397 }
1398 case TCP_V6_FLOW:
1399 case UDP_V6_FLOW: {
1400 struct ethtool_tcpip6_spec *ip_spec = &fs->h_u.tcp_ip6_spec;
1401 struct ethtool_tcpip6_spec *ip_mask = &fs->m_u.tcp_ip6_spec;
1402
1403 fkeys->basic.ip_proto = IPPROTO_TCP;
1404 if (flow_type == UDP_V6_FLOW)
1405 fkeys->basic.ip_proto = IPPROTO_UDP;
1406 fkeys->basic.n_proto = htons(ETH_P_IPV6);
1407
1408 fkeys->addrs.v6addrs.src = *(struct in6_addr *)&ip_spec->ip6src;
1409 fmasks->addrs.v6addrs.src = *(struct in6_addr *)&ip_mask->ip6src;
1410 fkeys->addrs.v6addrs.dst = *(struct in6_addr *)&ip_spec->ip6dst;
1411 fmasks->addrs.v6addrs.dst = *(struct in6_addr *)&ip_mask->ip6dst;
1412 fkeys->ports.src = ip_spec->psrc;
1413 fmasks->ports.src = ip_mask->psrc;
1414 fkeys->ports.dst = ip_spec->pdst;
1415 fmasks->ports.dst = ip_mask->pdst;
1416 break;
1417 }
1418 default:
1419 rc = -EOPNOTSUPP;
1420 goto ntuple_err;
1421 }
1422 if (!memcmp(&BNXT_FLOW_MASK_NONE, fmasks, sizeof(*fmasks)))
1423 goto ntuple_err;
1424
1425 idx = bnxt_get_ntp_filter_idx(bp, fkeys, NULL);
1426 rcu_read_lock();
1427 fltr = bnxt_lookup_ntp_filter_from_idx(bp, new_fltr, idx);
1428 if (fltr) {
1429 rcu_read_unlock();
1430 rc = -EEXIST;
1431 goto ntuple_err;
1432 }
1433 rcu_read_unlock();
1434
1435 new_fltr->base.flags = BNXT_ACT_NO_AGING;
1436 if (fs->flow_type & FLOW_RSS) {
1437 struct bnxt_rss_ctx *rss_ctx;
1438
1439 new_fltr->base.fw_vnic_id = 0;
1440 new_fltr->base.flags |= BNXT_ACT_RSS_CTX;
1441 rss_ctx = bnxt_get_rss_ctx_from_index(bp, cmd->rss_context);
1442 if (rss_ctx) {
1443 new_fltr->base.fw_vnic_id = rss_ctx->index;
1444 } else {
1445 rc = -EINVAL;
1446 goto ntuple_err;
1447 }
1448 }
1449 if (fs->ring_cookie == RX_CLS_FLOW_DISC)
1450 new_fltr->base.flags |= BNXT_ACT_DROP;
1451 else
1452 new_fltr->base.rxq = ring;
1453 __set_bit(BNXT_FLTR_VALID, &new_fltr->base.state);
1454 rc = bnxt_insert_ntp_filter(bp, new_fltr, idx);
1455 if (!rc) {
1456 rc = bnxt_hwrm_cfa_ntuple_filter_alloc(bp, new_fltr);
1457 if (rc) {
1458 bnxt_del_ntp_filter(bp, new_fltr);
1459 return rc;
1460 }
1461 fs->location = new_fltr->base.sw_id;
1462 return 0;
1463 }
1464
1465 ntuple_err:
1466 atomic_dec(&l2_fltr->refcnt);
1467 kfree(new_fltr);
1468 return rc;
1469 }
1470
1471 static int bnxt_srxclsrlins(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1472 {
1473 struct ethtool_rx_flow_spec *fs = &cmd->fs;
1474 u32 ring, flow_type;
1475 int rc;
1476 u8 vf;
1477
1478 if (!netif_running(bp->dev))
1479 return -EAGAIN;
1480 if (!(bp->flags & BNXT_FLAG_RFS))
1481 return -EPERM;
1482 if (fs->location != RX_CLS_LOC_ANY)
1483 return -EINVAL;
1484
1485 flow_type = fs->flow_type;
1486 if ((flow_type == IP_USER_FLOW ||
1487 flow_type == IPV6_USER_FLOW) &&
1488 !(bp->fw_cap & BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO))
1489 return -EOPNOTSUPP;
1490 if (flow_type & FLOW_MAC_EXT)
1491 return -EINVAL;
1492 flow_type &= ~FLOW_EXT;
1493
1494 if (fs->ring_cookie == RX_CLS_FLOW_DISC && flow_type != ETHER_FLOW)
1495 return bnxt_add_ntuple_cls_rule(bp, cmd);
1496
1497 ring = ethtool_get_flow_spec_ring(fs->ring_cookie);
1498 vf = ethtool_get_flow_spec_ring_vf(fs->ring_cookie);
1499 if (BNXT_VF(bp) && vf)
1500 return -EINVAL;
1501 if (BNXT_PF(bp) && vf > bp->pf.active_vfs)
1502 return -EINVAL;
1503 if (!vf && ring >= bp->rx_nr_rings)
1504 return -EINVAL;
1505
1506 if (flow_type == ETHER_FLOW)
1507 rc = bnxt_add_l2_cls_rule(bp, fs);
1508 else
1509 rc = bnxt_add_ntuple_cls_rule(bp, cmd);
1510 return rc;
1511 }
1512
1513 static int bnxt_srxclsrldel(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1514 {
1515 struct ethtool_rx_flow_spec *fs = &cmd->fs;
1516 struct bnxt_filter_base *fltr_base;
1517 struct bnxt_ntuple_filter *fltr;
1518 u32 id = fs->location;
1519
1520 rcu_read_lock();
1521 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->l2_fltr_hash_tbl,
1522 BNXT_L2_FLTR_HASH_SIZE, id);
1523 if (fltr_base) {
1524 struct bnxt_l2_filter *l2_fltr;
1525
1526 l2_fltr = container_of(fltr_base, struct bnxt_l2_filter, base);
1527 rcu_read_unlock();
1528 bnxt_hwrm_l2_filter_free(bp, l2_fltr);
1529 bnxt_del_l2_filter(bp, l2_fltr);
1530 return 0;
1531 }
1532 fltr_base = bnxt_get_one_fltr_rcu(bp, bp->ntp_fltr_hash_tbl,
1533 BNXT_NTP_FLTR_HASH_SIZE, id);
1534 if (!fltr_base) {
1535 rcu_read_unlock();
1536 return -ENOENT;
1537 }
1538
1539 fltr = container_of(fltr_base, struct bnxt_ntuple_filter, base);
1540 if (!(fltr->base.flags & BNXT_ACT_NO_AGING)) {
1541 rcu_read_unlock();
1542 return -EINVAL;
1543 }
1544 rcu_read_unlock();
1545 bnxt_hwrm_cfa_ntuple_filter_free(bp, fltr);
1546 bnxt_del_ntp_filter(bp, fltr);
1547 return 0;
1548 }
1549
1550 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1551 {
1552 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1553 return RXH_IP_SRC | RXH_IP_DST;
1554 return 0;
1555 }
1556
1557 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1558 {
1559 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1560 return RXH_IP_SRC | RXH_IP_DST;
1561 return 0;
1562 }
1563
1564 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1565 {
1566 cmd->data = 0;
1567 switch (cmd->flow_type) {
1568 case TCP_V4_FLOW:
1569 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1570 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1571 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1572 cmd->data |= get_ethtool_ipv4_rss(bp);
1573 break;
1574 case UDP_V4_FLOW:
1575 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1576 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1577 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1578 fallthrough;
1579 case AH_ESP_V4_FLOW:
1580 if (bp->rss_hash_cfg &
1581 (VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 |
1582 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4))
1583 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1584 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1585 fallthrough;
1586 case SCTP_V4_FLOW:
1587 case AH_V4_FLOW:
1588 case ESP_V4_FLOW:
1589 case IPV4_FLOW:
1590 cmd->data |= get_ethtool_ipv4_rss(bp);
1591 break;
1592
1593 case TCP_V6_FLOW:
1594 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1595 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1596 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1597 cmd->data |= get_ethtool_ipv6_rss(bp);
1598 break;
1599 case UDP_V6_FLOW:
1600 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1601 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1602 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1603 fallthrough;
1604 case AH_ESP_V6_FLOW:
1605 if (bp->rss_hash_cfg &
1606 (VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 |
1607 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6))
1608 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1609 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1610 fallthrough;
1611 case SCTP_V6_FLOW:
1612 case AH_V6_FLOW:
1613 case ESP_V6_FLOW:
1614 case IPV6_FLOW:
1615 cmd->data |= get_ethtool_ipv6_rss(bp);
1616 break;
1617 }
1618 return 0;
1619 }
1620
1621 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1622 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1623
1624 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1625 {
1626 u32 rss_hash_cfg = bp->rss_hash_cfg;
1627 int tuple, rc = 0;
1628
1629 if (cmd->data == RXH_4TUPLE)
1630 tuple = 4;
1631 else if (cmd->data == RXH_2TUPLE)
1632 tuple = 2;
1633 else if (!cmd->data)
1634 tuple = 0;
1635 else
1636 return -EINVAL;
1637
1638 if (cmd->flow_type == TCP_V4_FLOW) {
1639 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1640 if (tuple == 4)
1641 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1642 } else if (cmd->flow_type == UDP_V4_FLOW) {
1643 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP))
1644 return -EINVAL;
1645 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1646 if (tuple == 4)
1647 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1648 } else if (cmd->flow_type == TCP_V6_FLOW) {
1649 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1650 if (tuple == 4)
1651 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1652 } else if (cmd->flow_type == UDP_V6_FLOW) {
1653 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP))
1654 return -EINVAL;
1655 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1656 if (tuple == 4)
1657 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1658 } else if (cmd->flow_type == AH_ESP_V4_FLOW) {
1659 if (tuple == 4 && (!(bp->rss_cap & BNXT_RSS_CAP_AH_V4_RSS_CAP) ||
1660 !(bp->rss_cap & BNXT_RSS_CAP_ESP_V4_RSS_CAP)))
1661 return -EINVAL;
1662 rss_hash_cfg &= ~(VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 |
1663 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4);
1664 if (tuple == 4)
1665 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4 |
1666 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4;
1667 } else if (cmd->flow_type == AH_ESP_V6_FLOW) {
1668 if (tuple == 4 && (!(bp->rss_cap & BNXT_RSS_CAP_AH_V6_RSS_CAP) ||
1669 !(bp->rss_cap & BNXT_RSS_CAP_ESP_V6_RSS_CAP)))
1670 return -EINVAL;
1671 rss_hash_cfg &= ~(VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 |
1672 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6);
1673 if (tuple == 4)
1674 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6 |
1675 VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6;
1676 } else if (tuple == 4) {
1677 return -EINVAL;
1678 }
1679
1680 switch (cmd->flow_type) {
1681 case TCP_V4_FLOW:
1682 case UDP_V4_FLOW:
1683 case SCTP_V4_FLOW:
1684 case AH_ESP_V4_FLOW:
1685 case AH_V4_FLOW:
1686 case ESP_V4_FLOW:
1687 case IPV4_FLOW:
1688 if (tuple == 2)
1689 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1690 else if (!tuple)
1691 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1692 break;
1693
1694 case TCP_V6_FLOW:
1695 case UDP_V6_FLOW:
1696 case SCTP_V6_FLOW:
1697 case AH_ESP_V6_FLOW:
1698 case AH_V6_FLOW:
1699 case ESP_V6_FLOW:
1700 case IPV6_FLOW:
1701 if (tuple == 2)
1702 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1703 else if (!tuple)
1704 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1705 break;
1706 }
1707
1708 if (bp->rss_hash_cfg == rss_hash_cfg)
1709 return 0;
1710
1711 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA)
1712 bp->rss_hash_delta = bp->rss_hash_cfg ^ rss_hash_cfg;
1713 bp->rss_hash_cfg = rss_hash_cfg;
1714 if (netif_running(bp->dev)) {
1715 bnxt_close_nic(bp, false, false);
1716 rc = bnxt_open_nic(bp, false, false);
1717 }
1718 return rc;
1719 }
1720
1721 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1722 u32 *rule_locs)
1723 {
1724 struct bnxt *bp = netdev_priv(dev);
1725 int rc = 0;
1726
1727 switch (cmd->cmd) {
1728 case ETHTOOL_GRXRINGS:
1729 cmd->data = bp->rx_nr_rings;
1730 break;
1731
1732 case ETHTOOL_GRXCLSRLCNT:
1733 cmd->rule_cnt = bp->ntp_fltr_count;
1734 cmd->data = bp->max_fltr | RX_CLS_LOC_SPECIAL;
1735 break;
1736
1737 case ETHTOOL_GRXCLSRLALL:
1738 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1739 break;
1740
1741 case ETHTOOL_GRXCLSRULE:
1742 rc = bnxt_grxclsrule(bp, cmd);
1743 break;
1744
1745 case ETHTOOL_GRXFH:
1746 rc = bnxt_grxfh(bp, cmd);
1747 break;
1748
1749 default:
1750 rc = -EOPNOTSUPP;
1751 break;
1752 }
1753
1754 return rc;
1755 }
1756
1757 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1758 {
1759 struct bnxt *bp = netdev_priv(dev);
1760 int rc;
1761
1762 switch (cmd->cmd) {
1763 case ETHTOOL_SRXFH:
1764 rc = bnxt_srxfh(bp, cmd);
1765 break;
1766
1767 case ETHTOOL_SRXCLSRLINS:
1768 rc = bnxt_srxclsrlins(bp, cmd);
1769 break;
1770
1771 case ETHTOOL_SRXCLSRLDEL:
1772 rc = bnxt_srxclsrldel(bp, cmd);
1773 break;
1774
1775 default:
1776 rc = -EOPNOTSUPP;
1777 break;
1778 }
1779 return rc;
1780 }
1781
1782 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1783 {
1784 struct bnxt *bp = netdev_priv(dev);
1785
1786 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
1787 return bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) *
1788 BNXT_RSS_TABLE_ENTRIES_P5;
1789 return HW_HASH_INDEX_SIZE;
1790 }
1791
1792 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1793 {
1794 return HW_HASH_KEY_SIZE;
1795 }
1796
1797 static int bnxt_get_rxfh(struct net_device *dev,
1798 struct ethtool_rxfh_param *rxfh)
1799 {
1800 struct bnxt_rss_ctx *rss_ctx = NULL;
1801 struct bnxt *bp = netdev_priv(dev);
1802 u32 *indir_tbl = bp->rss_indir_tbl;
1803 struct bnxt_vnic_info *vnic;
1804 u32 i, tbl_size;
1805
1806 rxfh->hfunc = ETH_RSS_HASH_TOP;
1807
1808 if (!bp->vnic_info)
1809 return 0;
1810
1811 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];
1812 if (rxfh->rss_context) {
1813 struct ethtool_rxfh_context *ctx;
1814
1815 ctx = xa_load(&bp->dev->ethtool->rss_ctx, rxfh->rss_context);
1816 if (!ctx)
1817 return -EINVAL;
1818 indir_tbl = ethtool_rxfh_context_indir(ctx);
1819 rss_ctx = ethtool_rxfh_context_priv(ctx);
1820 vnic = &rss_ctx->vnic;
1821 }
1822
1823 if (rxfh->indir && indir_tbl) {
1824 tbl_size = bnxt_get_rxfh_indir_size(dev);
1825 for (i = 0; i < tbl_size; i++)
1826 rxfh->indir[i] = indir_tbl[i];
1827 }
1828
1829 if (rxfh->key && vnic->rss_hash_key)
1830 memcpy(rxfh->key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1831
1832 return 0;
1833 }
1834
1835 static void bnxt_modify_rss(struct bnxt *bp, struct ethtool_rxfh_context *ctx,
1836 struct bnxt_rss_ctx *rss_ctx,
1837 const struct ethtool_rxfh_param *rxfh)
1838 {
1839 if (rxfh->key) {
1840 if (rss_ctx) {
1841 memcpy(rss_ctx->vnic.rss_hash_key, rxfh->key,
1842 HW_HASH_KEY_SIZE);
1843 } else {
1844 memcpy(bp->rss_hash_key, rxfh->key, HW_HASH_KEY_SIZE);
1845 bp->rss_hash_key_updated = true;
1846 }
1847 }
1848 if (rxfh->indir) {
1849 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(bp->dev);
1850 u32 *indir_tbl = bp->rss_indir_tbl;
1851
1852 if (rss_ctx)
1853 indir_tbl = ethtool_rxfh_context_indir(ctx);
1854 for (i = 0; i < tbl_size; i++)
1855 indir_tbl[i] = rxfh->indir[i];
1856 pad = bp->rss_indir_tbl_entries - tbl_size;
1857 if (pad)
1858 memset(&indir_tbl[i], 0, pad * sizeof(*indir_tbl));
1859 }
1860 }
1861
1862 static int bnxt_rxfh_context_check(struct bnxt *bp,
1863 const struct ethtool_rxfh_param *rxfh,
1864 struct netlink_ext_ack *extack)
1865 {
1866 if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP) {
1867 NL_SET_ERR_MSG_MOD(extack, "RSS hash function not supported");
1868 return -EOPNOTSUPP;
1869 }
1870
1871 if (!BNXT_SUPPORTS_MULTI_RSS_CTX(bp)) {
1872 NL_SET_ERR_MSG_MOD(extack, "RSS contexts not supported");
1873 return -EOPNOTSUPP;
1874 }
1875
1876 if (!netif_running(bp->dev)) {
1877 NL_SET_ERR_MSG_MOD(extack, "Unable to set RSS contexts when interface is down");
1878 return -EAGAIN;
1879 }
1880
1881 return 0;
1882 }
1883
1884 static int bnxt_create_rxfh_context(struct net_device *dev,
1885 struct ethtool_rxfh_context *ctx,
1886 const struct ethtool_rxfh_param *rxfh,
1887 struct netlink_ext_ack *extack)
1888 {
1889 struct bnxt *bp = netdev_priv(dev);
1890 struct bnxt_rss_ctx *rss_ctx;
1891 struct bnxt_vnic_info *vnic;
1892 int rc;
1893
1894 rc = bnxt_rxfh_context_check(bp, rxfh, extack);
1895 if (rc)
1896 return rc;
1897
1898 if (bp->num_rss_ctx >= BNXT_MAX_ETH_RSS_CTX) {
1899 NL_SET_ERR_MSG_FMT_MOD(extack, "Out of RSS contexts, maximum %u",
1900 BNXT_MAX_ETH_RSS_CTX);
1901 return -EINVAL;
1902 }
1903
1904 if (!bnxt_rfs_capable(bp, true)) {
1905 NL_SET_ERR_MSG_MOD(extack, "Out hardware resources");
1906 return -ENOMEM;
1907 }
1908
1909 rss_ctx = ethtool_rxfh_context_priv(ctx);
1910
1911 bp->num_rss_ctx++;
1912
1913 vnic = &rss_ctx->vnic;
1914 vnic->rss_ctx = ctx;
1915 vnic->flags |= BNXT_VNIC_RSSCTX_FLAG;
1916 vnic->vnic_id = BNXT_VNIC_ID_INVALID;
1917 rc = bnxt_alloc_vnic_rss_table(bp, vnic);
1918 if (rc)
1919 goto out;
1920
1921 /* Populate defaults in the context */
1922 bnxt_set_dflt_rss_indir_tbl(bp, ctx);
1923 ctx->hfunc = ETH_RSS_HASH_TOP;
1924 memcpy(vnic->rss_hash_key, bp->rss_hash_key, HW_HASH_KEY_SIZE);
1925 memcpy(ethtool_rxfh_context_key(ctx),
1926 bp->rss_hash_key, HW_HASH_KEY_SIZE);
1927
1928 rc = bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings);
1929 if (rc) {
1930 NL_SET_ERR_MSG_MOD(extack, "Unable to allocate VNIC");
1931 goto out;
1932 }
1933
1934 rc = bnxt_hwrm_vnic_set_tpa(bp, vnic, bp->flags & BNXT_FLAG_TPA);
1935 if (rc) {
1936 NL_SET_ERR_MSG_MOD(extack, "Unable to setup TPA");
1937 goto out;
1938 }
1939 bnxt_modify_rss(bp, ctx, rss_ctx, rxfh);
1940
1941 rc = __bnxt_setup_vnic_p5(bp, vnic);
1942 if (rc) {
1943 NL_SET_ERR_MSG_MOD(extack, "Unable to setup TPA");
1944 goto out;
1945 }
1946
1947 rss_ctx->index = rxfh->rss_context;
1948 return 0;
1949 out:
1950 bnxt_del_one_rss_ctx(bp, rss_ctx, true);
1951 return rc;
1952 }
1953
1954 static int bnxt_modify_rxfh_context(struct net_device *dev,
1955 struct ethtool_rxfh_context *ctx,
1956 const struct ethtool_rxfh_param *rxfh,
1957 struct netlink_ext_ack *extack)
1958 {
1959 struct bnxt *bp = netdev_priv(dev);
1960 struct bnxt_rss_ctx *rss_ctx;
1961 int rc;
1962
1963 rc = bnxt_rxfh_context_check(bp, rxfh, extack);
1964 if (rc)
1965 return rc;
1966
1967 rss_ctx = ethtool_rxfh_context_priv(ctx);
1968
1969 bnxt_modify_rss(bp, ctx, rss_ctx, rxfh);
1970
1971 return bnxt_hwrm_vnic_rss_cfg_p5(bp, &rss_ctx->vnic);
1972 }
1973
1974 static int bnxt_remove_rxfh_context(struct net_device *dev,
1975 struct ethtool_rxfh_context *ctx,
1976 u32 rss_context,
1977 struct netlink_ext_ack *extack)
1978 {
1979 struct bnxt *bp = netdev_priv(dev);
1980 struct bnxt_rss_ctx *rss_ctx;
1981
1982 rss_ctx = ethtool_rxfh_context_priv(ctx);
1983
1984 bnxt_del_one_rss_ctx(bp, rss_ctx, true);
1985 return 0;
1986 }
1987
1988 static int bnxt_set_rxfh(struct net_device *dev,
1989 struct ethtool_rxfh_param *rxfh,
1990 struct netlink_ext_ack *extack)
1991 {
1992 struct bnxt *bp = netdev_priv(dev);
1993 int rc = 0;
1994
1995 if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP)
1996 return -EOPNOTSUPP;
1997
1998 bnxt_modify_rss(bp, NULL, NULL, rxfh);
1999
2000 if (netif_running(bp->dev)) {
2001 bnxt_close_nic(bp, false, false);
2002 rc = bnxt_open_nic(bp, false, false);
2003 }
2004 return rc;
2005 }
2006
2007 static void bnxt_get_drvinfo(struct net_device *dev,
2008 struct ethtool_drvinfo *info)
2009 {
2010 struct bnxt *bp = netdev_priv(dev);
2011
2012 strscpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
2013 strscpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
2014 strscpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
2015 info->n_stats = bnxt_get_num_stats(bp);
2016 info->testinfo_len = bp->num_tests;
2017 /* TODO CHIMP_FW: eeprom dump details */
2018 info->eedump_len = 0;
2019 /* TODO CHIMP FW: reg dump details */
2020 info->regdump_len = 0;
2021 }
2022
2023 static int bnxt_get_regs_len(struct net_device *dev)
2024 {
2025 struct bnxt *bp = netdev_priv(dev);
2026 int reg_len;
2027
2028 if (!BNXT_PF(bp))
2029 return -EOPNOTSUPP;
2030
2031 reg_len = BNXT_PXP_REG_LEN;
2032
2033 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
2034 reg_len += sizeof(struct pcie_ctx_hw_stats);
2035
2036 return reg_len;
2037 }
2038
2039 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
2040 void *_p)
2041 {
2042 struct pcie_ctx_hw_stats *hw_pcie_stats;
2043 struct hwrm_pcie_qstats_input *req;
2044 struct bnxt *bp = netdev_priv(dev);
2045 dma_addr_t hw_pcie_stats_addr;
2046 int rc;
2047
2048 regs->version = 0;
2049 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
2050
2051 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
2052 return;
2053
2054 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))
2055 return;
2056
2057 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),
2058 &hw_pcie_stats_addr);
2059 if (!hw_pcie_stats) {
2060 hwrm_req_drop(bp, req);
2061 return;
2062 }
2063
2064 regs->version = 1;
2065 hwrm_req_hold(bp, req); /* hold on to slice */
2066 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
2067 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
2068 rc = hwrm_req_send(bp, req);
2069 if (!rc) {
2070 __le64 *src = (__le64 *)hw_pcie_stats;
2071 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
2072 int i;
2073
2074 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
2075 dst[i] = le64_to_cpu(src[i]);
2076 }
2077 hwrm_req_drop(bp, req);
2078 }
2079
2080 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2081 {
2082 struct bnxt *bp = netdev_priv(dev);
2083
2084 wol->supported = 0;
2085 wol->wolopts = 0;
2086 memset(&wol->sopass, 0, sizeof(wol->sopass));
2087 if (bp->flags & BNXT_FLAG_WOL_CAP) {
2088 wol->supported = WAKE_MAGIC;
2089 if (bp->wol)
2090 wol->wolopts = WAKE_MAGIC;
2091 }
2092 }
2093
2094 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2095 {
2096 struct bnxt *bp = netdev_priv(dev);
2097
2098 if (wol->wolopts & ~WAKE_MAGIC)
2099 return -EINVAL;
2100
2101 if (wol->wolopts & WAKE_MAGIC) {
2102 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
2103 return -EINVAL;
2104 if (!bp->wol) {
2105 if (bnxt_hwrm_alloc_wol_fltr(bp))
2106 return -EBUSY;
2107 bp->wol = 1;
2108 }
2109 } else {
2110 if (bp->wol) {
2111 if (bnxt_hwrm_free_wol_fltr(bp))
2112 return -EBUSY;
2113 bp->wol = 0;
2114 }
2115 }
2116 return 0;
2117 }
2118
2119 /* TODO: support 25GB, 40GB, 50GB with different cable type */
2120 void _bnxt_fw_to_linkmode(unsigned long *mode, u16 fw_speeds)
2121 {
2122 linkmode_zero(mode);
2123
2124 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
2125 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mode);
2126 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
2127 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mode);
2128 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
2129 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, mode);
2130 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
2131 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, mode);
2132 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
2133 linkmode_set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, mode);
2134 }
2135
2136 enum bnxt_media_type {
2137 BNXT_MEDIA_UNKNOWN = 0,
2138 BNXT_MEDIA_TP,
2139 BNXT_MEDIA_CR,
2140 BNXT_MEDIA_SR,
2141 BNXT_MEDIA_LR_ER_FR,
2142 BNXT_MEDIA_KR,
2143 BNXT_MEDIA_KX,
2144 BNXT_MEDIA_X,
2145 __BNXT_MEDIA_END,
2146 };
2147
2148 static const enum bnxt_media_type bnxt_phy_types[] = {
2149 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASECR] = BNXT_MEDIA_CR,
2150 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR4] = BNXT_MEDIA_KR,
2151 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASELR] = BNXT_MEDIA_LR_ER_FR,
2152 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASESR] = BNXT_MEDIA_SR,
2153 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR2] = BNXT_MEDIA_KR,
2154 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKX] = BNXT_MEDIA_KX,
2155 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR] = BNXT_MEDIA_KR,
2156 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASET] = BNXT_MEDIA_TP,
2157 [PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE] = BNXT_MEDIA_TP,
2158 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_L] = BNXT_MEDIA_CR,
2159 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_S] = BNXT_MEDIA_CR,
2160 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_N] = BNXT_MEDIA_CR,
2161 [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASESR] = BNXT_MEDIA_SR,
2162 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR4] = BNXT_MEDIA_CR,
2163 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR4] = BNXT_MEDIA_SR,
2164 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
2165 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
2166 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR10] = BNXT_MEDIA_SR,
2167 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASECR4] = BNXT_MEDIA_CR,
2168 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASESR4] = BNXT_MEDIA_SR,
2169 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
2170 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
2171 [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_ACTIVE_CABLE] = BNXT_MEDIA_SR,
2172 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASET] = BNXT_MEDIA_TP,
2173 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASESX] = BNXT_MEDIA_X,
2174 [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASECX] = BNXT_MEDIA_X,
2175 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR4] = BNXT_MEDIA_CR,
2176 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4] = BNXT_MEDIA_SR,
2177 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
2178 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
2179 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR] = BNXT_MEDIA_CR,
2180 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR] = BNXT_MEDIA_SR,
2181 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR] = BNXT_MEDIA_LR_ER_FR,
2182 [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER] = BNXT_MEDIA_LR_ER_FR,
2183 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2] = BNXT_MEDIA_CR,
2184 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2] = BNXT_MEDIA_SR,
2185 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2] = BNXT_MEDIA_LR_ER_FR,
2186 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2] = BNXT_MEDIA_LR_ER_FR,
2187 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR] = BNXT_MEDIA_CR,
2188 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR] = BNXT_MEDIA_SR,
2189 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR] = BNXT_MEDIA_LR_ER_FR,
2190 [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER] = BNXT_MEDIA_LR_ER_FR,
2191 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR2] = BNXT_MEDIA_CR,
2192 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR2] = BNXT_MEDIA_SR,
2193 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR2] = BNXT_MEDIA_LR_ER_FR,
2194 [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER2] = BNXT_MEDIA_LR_ER_FR,
2195 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR8] = BNXT_MEDIA_CR,
2196 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR8] = BNXT_MEDIA_SR,
2197 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR8] = BNXT_MEDIA_LR_ER_FR,
2198 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER8] = BNXT_MEDIA_LR_ER_FR,
2199 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR4] = BNXT_MEDIA_CR,
2200 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR4] = BNXT_MEDIA_SR,
2201 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
2202 [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
2203 };
2204
2205 static enum bnxt_media_type
2206 bnxt_get_media(struct bnxt_link_info *link_info)
2207 {
2208 switch (link_info->media_type) {
2209 case PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP:
2210 return BNXT_MEDIA_TP;
2211 case PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC:
2212 return BNXT_MEDIA_CR;
2213 default:
2214 if (link_info->phy_type < ARRAY_SIZE(bnxt_phy_types))
2215 return bnxt_phy_types[link_info->phy_type];
2216 return BNXT_MEDIA_UNKNOWN;
2217 }
2218 }
2219
2220 enum bnxt_link_speed_indices {
2221 BNXT_LINK_SPEED_UNKNOWN = 0,
2222 BNXT_LINK_SPEED_100MB_IDX,
2223 BNXT_LINK_SPEED_1GB_IDX,
2224 BNXT_LINK_SPEED_10GB_IDX,
2225 BNXT_LINK_SPEED_25GB_IDX,
2226 BNXT_LINK_SPEED_40GB_IDX,
2227 BNXT_LINK_SPEED_50GB_IDX,
2228 BNXT_LINK_SPEED_100GB_IDX,
2229 BNXT_LINK_SPEED_200GB_IDX,
2230 BNXT_LINK_SPEED_400GB_IDX,
2231 __BNXT_LINK_SPEED_END
2232 };
2233
2234 static enum bnxt_link_speed_indices bnxt_fw_speed_idx(u16 speed)
2235 {
2236 switch (speed) {
2237 case BNXT_LINK_SPEED_100MB: return BNXT_LINK_SPEED_100MB_IDX;
2238 case BNXT_LINK_SPEED_1GB: return BNXT_LINK_SPEED_1GB_IDX;
2239 case BNXT_LINK_SPEED_10GB: return BNXT_LINK_SPEED_10GB_IDX;
2240 case BNXT_LINK_SPEED_25GB: return BNXT_LINK_SPEED_25GB_IDX;
2241 case BNXT_LINK_SPEED_40GB: return BNXT_LINK_SPEED_40GB_IDX;
2242 case BNXT_LINK_SPEED_50GB:
2243 case BNXT_LINK_SPEED_50GB_PAM4:
2244 return BNXT_LINK_SPEED_50GB_IDX;
2245 case BNXT_LINK_SPEED_100GB:
2246 case BNXT_LINK_SPEED_100GB_PAM4:
2247 case BNXT_LINK_SPEED_100GB_PAM4_112:
2248 return BNXT_LINK_SPEED_100GB_IDX;
2249 case BNXT_LINK_SPEED_200GB:
2250 case BNXT_LINK_SPEED_200GB_PAM4:
2251 case BNXT_LINK_SPEED_200GB_PAM4_112:
2252 return BNXT_LINK_SPEED_200GB_IDX;
2253 case BNXT_LINK_SPEED_400GB:
2254 case BNXT_LINK_SPEED_400GB_PAM4:
2255 case BNXT_LINK_SPEED_400GB_PAM4_112:
2256 return BNXT_LINK_SPEED_400GB_IDX;
2257 default: return BNXT_LINK_SPEED_UNKNOWN;
2258 }
2259 }
2260
2261 static const enum ethtool_link_mode_bit_indices
2262 bnxt_link_modes[__BNXT_LINK_SPEED_END][BNXT_SIG_MODE_MAX][__BNXT_MEDIA_END] = {
2263 [BNXT_LINK_SPEED_100MB_IDX] = {
2264 {
2265 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
2266 },
2267 },
2268 [BNXT_LINK_SPEED_1GB_IDX] = {
2269 {
2270 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
2271 /* historically baseT, but DAC is more correctly baseX */
2272 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
2273 [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
2274 [BNXT_MEDIA_X] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
2275 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
2276 },
2277 },
2278 [BNXT_LINK_SPEED_10GB_IDX] = {
2279 {
2280 [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
2281 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
2282 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
2283 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
2284 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
2285 [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
2286 },
2287 },
2288 [BNXT_LINK_SPEED_25GB_IDX] = {
2289 {
2290 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
2291 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2292 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
2293 },
2294 },
2295 [BNXT_LINK_SPEED_40GB_IDX] = {
2296 {
2297 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
2298 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
2299 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
2300 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
2301 },
2302 },
2303 [BNXT_LINK_SPEED_50GB_IDX] = {
2304 [BNXT_SIG_MODE_NRZ] = {
2305 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
2306 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
2307 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
2308 },
2309 [BNXT_SIG_MODE_PAM4] = {
2310 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
2311 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
2312 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
2313 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
2314 },
2315 },
2316 [BNXT_LINK_SPEED_100GB_IDX] = {
2317 [BNXT_SIG_MODE_NRZ] = {
2318 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
2319 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
2320 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
2321 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
2322 },
2323 [BNXT_SIG_MODE_PAM4] = {
2324 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
2325 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
2326 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
2327 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
2328 },
2329 [BNXT_SIG_MODE_PAM4_112] = {
2330 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR_Full_BIT,
2331 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
2332 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
2333 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
2334 },
2335 },
2336 [BNXT_LINK_SPEED_200GB_IDX] = {
2337 [BNXT_SIG_MODE_PAM4] = {
2338 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT,
2339 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
2340 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
2341 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
2342 },
2343 [BNXT_SIG_MODE_PAM4_112] = {
2344 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT,
2345 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
2346 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
2347 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
2348 },
2349 },
2350 [BNXT_LINK_SPEED_400GB_IDX] = {
2351 [BNXT_SIG_MODE_PAM4] = {
2352 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT,
2353 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT,
2354 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT,
2355 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
2356 },
2357 [BNXT_SIG_MODE_PAM4_112] = {
2358 [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT,
2359 [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
2360 [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
2361 [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
2362 },
2363 },
2364 };
2365
2366 #define BNXT_LINK_MODE_UNKNOWN -1
2367
2368 static enum ethtool_link_mode_bit_indices
2369 bnxt_get_link_mode(struct bnxt_link_info *link_info)
2370 {
2371 enum ethtool_link_mode_bit_indices link_mode;
2372 enum bnxt_link_speed_indices speed;
2373 enum bnxt_media_type media;
2374 u8 sig_mode;
2375
2376 if (link_info->phy_link_status != BNXT_LINK_LINK)
2377 return BNXT_LINK_MODE_UNKNOWN;
2378
2379 media = bnxt_get_media(link_info);
2380 if (BNXT_AUTO_MODE(link_info->auto_mode)) {
2381 speed = bnxt_fw_speed_idx(link_info->link_speed);
2382 sig_mode = link_info->active_fec_sig_mode &
2383 PORT_PHY_QCFG_RESP_SIGNAL_MODE_MASK;
2384 } else {
2385 speed = bnxt_fw_speed_idx(link_info->req_link_speed);
2386 sig_mode = link_info->req_signal_mode;
2387 }
2388 if (sig_mode >= BNXT_SIG_MODE_MAX)
2389 return BNXT_LINK_MODE_UNKNOWN;
2390
2391 /* Note ETHTOOL_LINK_MODE_10baseT_Half_BIT == 0 is a legal Linux
2392 * link mode, but since no such devices exist, the zeroes in the
2393 * map can be conveniently used to represent unknown link modes.
2394 */
2395 link_mode = bnxt_link_modes[speed][sig_mode][media];
2396 if (!link_mode)
2397 return BNXT_LINK_MODE_UNKNOWN;
2398
2399 switch (link_mode) {
2400 case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
2401 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL)
2402 link_mode = ETHTOOL_LINK_MODE_100baseT_Half_BIT;
2403 break;
2404 case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
2405 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL)
2406 link_mode = ETHTOOL_LINK_MODE_1000baseT_Half_BIT;
2407 break;
2408 default:
2409 break;
2410 }
2411
2412 return link_mode;
2413 }
2414
2415 static void bnxt_get_ethtool_modes(struct bnxt_link_info *link_info,
2416 struct ethtool_link_ksettings *lk_ksettings)
2417 {
2418 struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2419
2420 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) {
2421 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2422 lk_ksettings->link_modes.supported);
2423 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2424 lk_ksettings->link_modes.supported);
2425 }
2426
2427 if (link_info->support_auto_speeds || link_info->support_auto_speeds2 ||
2428 link_info->support_pam4_auto_speeds)
2429 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2430 lk_ksettings->link_modes.supported);
2431
2432 if (~link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
2433 return;
2434
2435 if (link_info->auto_pause_setting & BNXT_LINK_PAUSE_RX)
2436 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2437 lk_ksettings->link_modes.advertising);
2438 if (hweight8(link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) == 1)
2439 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2440 lk_ksettings->link_modes.advertising);
2441 if (link_info->lp_pause & BNXT_LINK_PAUSE_RX)
2442 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2443 lk_ksettings->link_modes.lp_advertising);
2444 if (hweight8(link_info->lp_pause & BNXT_LINK_PAUSE_BOTH) == 1)
2445 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2446 lk_ksettings->link_modes.lp_advertising);
2447 }
2448
2449 static const u16 bnxt_nrz_speed_masks[] = {
2450 [BNXT_LINK_SPEED_100MB_IDX] = BNXT_LINK_SPEED_MSK_100MB,
2451 [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEED_MSK_1GB,
2452 [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEED_MSK_10GB,
2453 [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEED_MSK_25GB,
2454 [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEED_MSK_40GB,
2455 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEED_MSK_50GB,
2456 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEED_MSK_100GB,
2457 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
2458 };
2459
2460 static const u16 bnxt_pam4_speed_masks[] = {
2461 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_50GB,
2462 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_100GB,
2463 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_200GB,
2464 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
2465 };
2466
2467 static const u16 bnxt_nrz_speeds2_masks[] = {
2468 [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEEDS2_MSK_1GB,
2469 [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEEDS2_MSK_10GB,
2470 [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEEDS2_MSK_25GB,
2471 [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEEDS2_MSK_40GB,
2472 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB,
2473 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB,
2474 [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
2475 };
2476
2477 static const u16 bnxt_pam4_speeds2_masks[] = {
2478 [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB_PAM4,
2479 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4,
2480 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4,
2481 [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4,
2482 };
2483
2484 static const u16 bnxt_pam4_112_speeds2_masks[] = {
2485 [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112,
2486 [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112,
2487 [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112,
2488 };
2489
2490 static enum bnxt_link_speed_indices
2491 bnxt_encoding_speed_idx(u8 sig_mode, u16 phy_flags, u16 speed_msk)
2492 {
2493 const u16 *speeds;
2494 int idx, len;
2495
2496 switch (sig_mode) {
2497 case BNXT_SIG_MODE_NRZ:
2498 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
2499 speeds = bnxt_nrz_speeds2_masks;
2500 len = ARRAY_SIZE(bnxt_nrz_speeds2_masks);
2501 } else {
2502 speeds = bnxt_nrz_speed_masks;
2503 len = ARRAY_SIZE(bnxt_nrz_speed_masks);
2504 }
2505 break;
2506 case BNXT_SIG_MODE_PAM4:
2507 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
2508 speeds = bnxt_pam4_speeds2_masks;
2509 len = ARRAY_SIZE(bnxt_pam4_speeds2_masks);
2510 } else {
2511 speeds = bnxt_pam4_speed_masks;
2512 len = ARRAY_SIZE(bnxt_pam4_speed_masks);
2513 }
2514 break;
2515 case BNXT_SIG_MODE_PAM4_112:
2516 speeds = bnxt_pam4_112_speeds2_masks;
2517 len = ARRAY_SIZE(bnxt_pam4_112_speeds2_masks);
2518 break;
2519 default:
2520 return BNXT_LINK_SPEED_UNKNOWN;
2521 }
2522
2523 for (idx = 0; idx < len; idx++) {
2524 if (speeds[idx] == speed_msk)
2525 return idx;
2526 }
2527
2528 return BNXT_LINK_SPEED_UNKNOWN;
2529 }
2530
2531 #define BNXT_FW_SPEED_MSK_BITS 16
2532
2533 static void
2534 __bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media,
2535 u8 sig_mode, u16 phy_flags, unsigned long *et_mask)
2536 {
2537 enum ethtool_link_mode_bit_indices link_mode;
2538 enum bnxt_link_speed_indices speed;
2539 u8 bit;
2540
2541 for_each_set_bit(bit, &fw_mask, BNXT_FW_SPEED_MSK_BITS) {
2542 speed = bnxt_encoding_speed_idx(sig_mode, phy_flags, 1 << bit);
2543 if (!speed)
2544 continue;
2545
2546 link_mode = bnxt_link_modes[speed][sig_mode][media];
2547 if (!link_mode)
2548 continue;
2549
2550 linkmode_set_bit(link_mode, et_mask);
2551 }
2552 }
2553
2554 static void
2555 bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media,
2556 u8 sig_mode, u16 phy_flags, unsigned long *et_mask)
2557 {
2558 if (media) {
2559 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags,
2560 et_mask);
2561 return;
2562 }
2563
2564 /* list speeds for all media if unknown */
2565 for (media = 1; media < __BNXT_MEDIA_END; media++)
2566 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags,
2567 et_mask);
2568 }
2569
2570 static void
2571 bnxt_get_all_ethtool_support_speeds(struct bnxt_link_info *link_info,
2572 enum bnxt_media_type media,
2573 struct ethtool_link_ksettings *lk_ksettings)
2574 {
2575 struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2576 u16 sp_nrz, sp_pam4, sp_pam4_112 = 0;
2577 u16 phy_flags = bp->phy_flags;
2578
2579 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
2580 sp_nrz = link_info->support_speeds2;
2581 sp_pam4 = link_info->support_speeds2;
2582 sp_pam4_112 = link_info->support_speeds2;
2583 } else {
2584 sp_nrz = link_info->support_speeds;
2585 sp_pam4 = link_info->support_pam4_speeds;
2586 }
2587 bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags,
2588 lk_ksettings->link_modes.supported);
2589 bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags,
2590 lk_ksettings->link_modes.supported);
2591 bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112,
2592 phy_flags, lk_ksettings->link_modes.supported);
2593 }
2594
2595 static void
2596 bnxt_get_all_ethtool_adv_speeds(struct bnxt_link_info *link_info,
2597 enum bnxt_media_type media,
2598 struct ethtool_link_ksettings *lk_ksettings)
2599 {
2600 struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2601 u16 sp_nrz, sp_pam4, sp_pam4_112 = 0;
2602 u16 phy_flags = bp->phy_flags;
2603
2604 sp_nrz = link_info->advertising;
2605 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
2606 sp_pam4 = link_info->advertising;
2607 sp_pam4_112 = link_info->advertising;
2608 } else {
2609 sp_pam4 = link_info->advertising_pam4;
2610 }
2611 bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags,
2612 lk_ksettings->link_modes.advertising);
2613 bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags,
2614 lk_ksettings->link_modes.advertising);
2615 bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112,
2616 phy_flags, lk_ksettings->link_modes.advertising);
2617 }
2618
2619 static void
2620 bnxt_get_all_ethtool_lp_speeds(struct bnxt_link_info *link_info,
2621 enum bnxt_media_type media,
2622 struct ethtool_link_ksettings *lk_ksettings)
2623 {
2624 struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2625 u16 phy_flags = bp->phy_flags;
2626
2627 bnxt_get_ethtool_speeds(link_info->lp_auto_link_speeds, media,
2628 BNXT_SIG_MODE_NRZ, phy_flags,
2629 lk_ksettings->link_modes.lp_advertising);
2630 bnxt_get_ethtool_speeds(link_info->lp_auto_pam4_link_speeds, media,
2631 BNXT_SIG_MODE_PAM4, phy_flags,
2632 lk_ksettings->link_modes.lp_advertising);
2633 }
2634
2635 static void bnxt_update_speed(u32 *delta, bool installed_media, u16 *speeds,
2636 u16 speed_msk, const unsigned long *et_mask,
2637 enum ethtool_link_mode_bit_indices mode)
2638 {
2639 bool mode_desired = linkmode_test_bit(mode, et_mask);
2640
2641 if (!mode)
2642 return;
2643
2644 /* enabled speeds for installed media should override */
2645 if (installed_media && mode_desired) {
2646 *speeds |= speed_msk;
2647 *delta |= speed_msk;
2648 return;
2649 }
2650
2651 /* many to one mapping, only allow one change per fw_speed bit */
2652 if (!(*delta & speed_msk) && (mode_desired == !(*speeds & speed_msk))) {
2653 *speeds ^= speed_msk;
2654 *delta |= speed_msk;
2655 }
2656 }
2657
2658 static void bnxt_set_ethtool_speeds(struct bnxt_link_info *link_info,
2659 const unsigned long *et_mask)
2660 {
2661 struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2662 u16 const *sp_msks, *sp_pam4_msks, *sp_pam4_112_msks;
2663 enum bnxt_media_type media = bnxt_get_media(link_info);
2664 u16 *adv, *adv_pam4, *adv_pam4_112 = NULL;
2665 u32 delta_pam4_112 = 0;
2666 u32 delta_pam4 = 0;
2667 u32 delta_nrz = 0;
2668 int i, m;
2669
2670 adv = &link_info->advertising;
2671 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {
2672 adv_pam4 = &link_info->advertising;
2673 adv_pam4_112 = &link_info->advertising;
2674 sp_msks = bnxt_nrz_speeds2_masks;
2675 sp_pam4_msks = bnxt_pam4_speeds2_masks;
2676 sp_pam4_112_msks = bnxt_pam4_112_speeds2_masks;
2677 } else {
2678 adv_pam4 = &link_info->advertising_pam4;
2679 sp_msks = bnxt_nrz_speed_masks;
2680 sp_pam4_msks = bnxt_pam4_speed_masks;
2681 }
2682 for (i = 1; i < __BNXT_LINK_SPEED_END; i++) {
2683 /* accept any legal media from user */
2684 for (m = 1; m < __BNXT_MEDIA_END; m++) {
2685 bnxt_update_speed(&delta_nrz, m == media,
2686 adv, sp_msks[i], et_mask,
2687 bnxt_link_modes[i][BNXT_SIG_MODE_NRZ][m]);
2688 bnxt_update_speed(&delta_pam4, m == media,
2689 adv_pam4, sp_pam4_msks[i], et_mask,
2690 bnxt_link_modes[i][BNXT_SIG_MODE_PAM4][m]);
2691 if (!adv_pam4_112)
2692 continue;
2693
2694 bnxt_update_speed(&delta_pam4_112, m == media,
2695 adv_pam4_112, sp_pam4_112_msks[i], et_mask,
2696 bnxt_link_modes[i][BNXT_SIG_MODE_PAM4_112][m]);
2697 }
2698 }
2699 }
2700
2701 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info,
2702 struct ethtool_link_ksettings *lk_ksettings)
2703 {
2704 u16 fec_cfg = link_info->fec_cfg;
2705
2706 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) {
2707 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
2708 lk_ksettings->link_modes.advertising);
2709 return;
2710 }
2711 if (fec_cfg & BNXT_FEC_ENC_BASE_R)
2712 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
2713 lk_ksettings->link_modes.advertising);
2714 if (fec_cfg & BNXT_FEC_ENC_RS)
2715 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
2716 lk_ksettings->link_modes.advertising);
2717 if (fec_cfg & BNXT_FEC_ENC_LLRS)
2718 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
2719 lk_ksettings->link_modes.advertising);
2720 }
2721
2722 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info,
2723 struct ethtool_link_ksettings *lk_ksettings)
2724 {
2725 u16 fec_cfg = link_info->fec_cfg;
2726
2727 if (fec_cfg & BNXT_FEC_NONE) {
2728 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
2729 lk_ksettings->link_modes.supported);
2730 return;
2731 }
2732 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)
2733 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
2734 lk_ksettings->link_modes.supported);
2735 if (fec_cfg & BNXT_FEC_ENC_RS_CAP)
2736 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
2737 lk_ksettings->link_modes.supported);
2738 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP)
2739 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
2740 lk_ksettings->link_modes.supported);
2741 }
2742
2743 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
2744 {
2745 switch (fw_link_speed) {
2746 case BNXT_LINK_SPEED_100MB:
2747 return SPEED_100;
2748 case BNXT_LINK_SPEED_1GB:
2749 return SPEED_1000;
2750 case BNXT_LINK_SPEED_2_5GB:
2751 return SPEED_2500;
2752 case BNXT_LINK_SPEED_10GB:
2753 return SPEED_10000;
2754 case BNXT_LINK_SPEED_20GB:
2755 return SPEED_20000;
2756 case BNXT_LINK_SPEED_25GB:
2757 return SPEED_25000;
2758 case BNXT_LINK_SPEED_40GB:
2759 return SPEED_40000;
2760 case BNXT_LINK_SPEED_50GB:
2761 case BNXT_LINK_SPEED_50GB_PAM4:
2762 return SPEED_50000;
2763 case BNXT_LINK_SPEED_100GB:
2764 case BNXT_LINK_SPEED_100GB_PAM4:
2765 case BNXT_LINK_SPEED_100GB_PAM4_112:
2766 return SPEED_100000;
2767 case BNXT_LINK_SPEED_200GB:
2768 case BNXT_LINK_SPEED_200GB_PAM4:
2769 case BNXT_LINK_SPEED_200GB_PAM4_112:
2770 return SPEED_200000;
2771 case BNXT_LINK_SPEED_400GB:
2772 case BNXT_LINK_SPEED_400GB_PAM4:
2773 case BNXT_LINK_SPEED_400GB_PAM4_112:
2774 return SPEED_400000;
2775 default:
2776 return SPEED_UNKNOWN;
2777 }
2778 }
2779
2780 static void bnxt_get_default_speeds(struct ethtool_link_ksettings *lk_ksettings,
2781 struct bnxt_link_info *link_info)
2782 {
2783 struct ethtool_link_settings *base = &lk_ksettings->base;
2784
2785 if (link_info->link_state == BNXT_LINK_STATE_UP) {
2786 base->speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
2787 base->duplex = DUPLEX_HALF;
2788 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
2789 base->duplex = DUPLEX_FULL;
2790 lk_ksettings->lanes = link_info->active_lanes;
2791 } else if (!link_info->autoneg) {
2792 base->speed = bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
2793 base->duplex = DUPLEX_HALF;
2794 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
2795 base->duplex = DUPLEX_FULL;
2796 }
2797 }
2798
2799 static int bnxt_get_link_ksettings(struct net_device *dev,
2800 struct ethtool_link_ksettings *lk_ksettings)
2801 {
2802 struct ethtool_link_settings *base = &lk_ksettings->base;
2803 enum ethtool_link_mode_bit_indices link_mode;
2804 struct bnxt *bp = netdev_priv(dev);
2805 struct bnxt_link_info *link_info;
2806 enum bnxt_media_type media;
2807
2808 ethtool_link_ksettings_zero_link_mode(lk_ksettings, lp_advertising);
2809 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
2810 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
2811 base->duplex = DUPLEX_UNKNOWN;
2812 base->speed = SPEED_UNKNOWN;
2813 link_info = &bp->link_info;
2814
2815 mutex_lock(&bp->link_lock);
2816 bnxt_get_ethtool_modes(link_info, lk_ksettings);
2817 media = bnxt_get_media(link_info);
2818 bnxt_get_all_ethtool_support_speeds(link_info, media, lk_ksettings);
2819 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings);
2820 link_mode = bnxt_get_link_mode(link_info);
2821 if (link_mode != BNXT_LINK_MODE_UNKNOWN)
2822 ethtool_params_from_link_mode(lk_ksettings, link_mode);
2823 else
2824 bnxt_get_default_speeds(lk_ksettings, link_info);
2825
2826 if (link_info->autoneg) {
2827 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings);
2828 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2829 lk_ksettings->link_modes.advertising);
2830 base->autoneg = AUTONEG_ENABLE;
2831 bnxt_get_all_ethtool_adv_speeds(link_info, media, lk_ksettings);
2832 if (link_info->phy_link_status == BNXT_LINK_LINK)
2833 bnxt_get_all_ethtool_lp_speeds(link_info, media,
2834 lk_ksettings);
2835 } else {
2836 base->autoneg = AUTONEG_DISABLE;
2837 }
2838
2839 base->port = PORT_NONE;
2840 if (media == BNXT_MEDIA_TP) {
2841 base->port = PORT_TP;
2842 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
2843 lk_ksettings->link_modes.supported);
2844 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
2845 lk_ksettings->link_modes.advertising);
2846 } else if (media == BNXT_MEDIA_KR) {
2847 linkmode_set_bit(ETHTOOL_LINK_MODE_Backplane_BIT,
2848 lk_ksettings->link_modes.supported);
2849 linkmode_set_bit(ETHTOOL_LINK_MODE_Backplane_BIT,
2850 lk_ksettings->link_modes.advertising);
2851 } else {
2852 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2853 lk_ksettings->link_modes.supported);
2854 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2855 lk_ksettings->link_modes.advertising);
2856
2857 if (media == BNXT_MEDIA_CR)
2858 base->port = PORT_DA;
2859 else
2860 base->port = PORT_FIBRE;
2861 }
2862 base->phy_address = link_info->phy_addr;
2863 mutex_unlock(&bp->link_lock);
2864
2865 return 0;
2866 }
2867
2868 static int
2869 bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed, u32 lanes)
2870 {
2871 struct bnxt *bp = netdev_priv(dev);
2872 struct bnxt_link_info *link_info = &bp->link_info;
2873 u16 support_pam4_spds = link_info->support_pam4_speeds;
2874 u16 support_spds2 = link_info->support_speeds2;
2875 u16 support_spds = link_info->support_speeds;
2876 u8 sig_mode = BNXT_SIG_MODE_NRZ;
2877 u32 lanes_needed = 1;
2878 u16 fw_speed = 0;
2879
2880 switch (ethtool_speed) {
2881 case SPEED_100:
2882 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
2883 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB;
2884 break;
2885 case SPEED_1000:
2886 if ((support_spds & BNXT_LINK_SPEED_MSK_1GB) ||
2887 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_1GB))
2888 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2889 break;
2890 case SPEED_2500:
2891 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
2892 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB;
2893 break;
2894 case SPEED_10000:
2895 if ((support_spds & BNXT_LINK_SPEED_MSK_10GB) ||
2896 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_10GB))
2897 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2898 break;
2899 case SPEED_20000:
2900 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) {
2901 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB;
2902 lanes_needed = 2;
2903 }
2904 break;
2905 case SPEED_25000:
2906 if ((support_spds & BNXT_LINK_SPEED_MSK_25GB) ||
2907 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_25GB))
2908 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2909 break;
2910 case SPEED_40000:
2911 if ((support_spds & BNXT_LINK_SPEED_MSK_40GB) ||
2912 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_40GB)) {
2913 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2914 lanes_needed = 4;
2915 }
2916 break;
2917 case SPEED_50000:
2918 if (((support_spds & BNXT_LINK_SPEED_MSK_50GB) ||
2919 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB)) &&
2920 lanes != 1) {
2921 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2922 lanes_needed = 2;
2923 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) {
2924 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB;
2925 sig_mode = BNXT_SIG_MODE_PAM4;
2926 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB_PAM4) {
2927 fw_speed = BNXT_LINK_SPEED_50GB_PAM4;
2928 sig_mode = BNXT_SIG_MODE_PAM4;
2929 }
2930 break;
2931 case SPEED_100000:
2932 if (((support_spds & BNXT_LINK_SPEED_MSK_100GB) ||
2933 (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB)) &&
2934 lanes != 2 && lanes != 1) {
2935 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB;
2936 lanes_needed = 4;
2937 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) {
2938 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB;
2939 sig_mode = BNXT_SIG_MODE_PAM4;
2940 lanes_needed = 2;
2941 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4) &&
2942 lanes != 1) {
2943 fw_speed = BNXT_LINK_SPEED_100GB_PAM4;
2944 sig_mode = BNXT_SIG_MODE_PAM4;
2945 lanes_needed = 2;
2946 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112) {
2947 fw_speed = BNXT_LINK_SPEED_100GB_PAM4_112;
2948 sig_mode = BNXT_SIG_MODE_PAM4_112;
2949 }
2950 break;
2951 case SPEED_200000:
2952 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) {
2953 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB;
2954 sig_mode = BNXT_SIG_MODE_PAM4;
2955 lanes_needed = 4;
2956 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4) &&
2957 lanes != 2) {
2958 fw_speed = BNXT_LINK_SPEED_200GB_PAM4;
2959 sig_mode = BNXT_SIG_MODE_PAM4;
2960 lanes_needed = 4;
2961 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112) {
2962 fw_speed = BNXT_LINK_SPEED_200GB_PAM4_112;
2963 sig_mode = BNXT_SIG_MODE_PAM4_112;
2964 lanes_needed = 2;
2965 }
2966 break;
2967 case SPEED_400000:
2968 if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4) &&
2969 lanes != 4) {
2970 fw_speed = BNXT_LINK_SPEED_400GB_PAM4;
2971 sig_mode = BNXT_SIG_MODE_PAM4;
2972 lanes_needed = 8;
2973 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112) {
2974 fw_speed = BNXT_LINK_SPEED_400GB_PAM4_112;
2975 sig_mode = BNXT_SIG_MODE_PAM4_112;
2976 lanes_needed = 4;
2977 }
2978 break;
2979 }
2980
2981 if (!fw_speed) {
2982 netdev_err(dev, "unsupported speed!\n");
2983 return -EINVAL;
2984 }
2985
2986 if (lanes && lanes != lanes_needed) {
2987 netdev_err(dev, "unsupported number of lanes for speed\n");
2988 return -EINVAL;
2989 }
2990
2991 if (link_info->req_link_speed == fw_speed &&
2992 link_info->req_signal_mode == sig_mode &&
2993 link_info->autoneg == 0)
2994 return -EALREADY;
2995
2996 link_info->req_link_speed = fw_speed;
2997 link_info->req_signal_mode = sig_mode;
2998 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
2999 link_info->autoneg = 0;
3000 link_info->advertising = 0;
3001 link_info->advertising_pam4 = 0;
3002
3003 return 0;
3004 }
3005
3006 u16 bnxt_get_fw_auto_link_speeds(const unsigned long *mode)
3007 {
3008 u16 fw_speed_mask = 0;
3009
3010 if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mode) ||
3011 linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mode))
3012 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
3013
3014 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mode) ||
3015 linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, mode))
3016 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
3017
3018 if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, mode))
3019 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
3020
3021 if (linkmode_test_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, mode))
3022 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
3023
3024 return fw_speed_mask;
3025 }
3026
3027 static int bnxt_set_link_ksettings(struct net_device *dev,
3028 const struct ethtool_link_ksettings *lk_ksettings)
3029 {
3030 struct bnxt *bp = netdev_priv(dev);
3031 struct bnxt_link_info *link_info = &bp->link_info;
3032 const struct ethtool_link_settings *base = &lk_ksettings->base;
3033 bool set_pause = false;
3034 u32 speed, lanes = 0;
3035 int rc = 0;
3036
3037 if (!BNXT_PHY_CFG_ABLE(bp))
3038 return -EOPNOTSUPP;
3039
3040 mutex_lock(&bp->link_lock);
3041 if (base->autoneg == AUTONEG_ENABLE) {
3042 bnxt_set_ethtool_speeds(link_info,
3043 lk_ksettings->link_modes.advertising);
3044 link_info->autoneg |= BNXT_AUTONEG_SPEED;
3045 if (!link_info->advertising && !link_info->advertising_pam4) {
3046 link_info->advertising = link_info->support_auto_speeds;
3047 link_info->advertising_pam4 =
3048 link_info->support_pam4_auto_speeds;
3049 }
3050 /* any change to autoneg will cause link change, therefore the
3051 * driver should put back the original pause setting in autoneg
3052 */
3053 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE))
3054 set_pause = true;
3055 } else {
3056 u8 phy_type = link_info->phy_type;
3057
3058 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
3059 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
3060 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
3061 netdev_err(dev, "10GBase-T devices must autoneg\n");
3062 rc = -EINVAL;
3063 goto set_setting_exit;
3064 }
3065 if (base->duplex == DUPLEX_HALF) {
3066 netdev_err(dev, "HALF DUPLEX is not supported!\n");
3067 rc = -EINVAL;
3068 goto set_setting_exit;
3069 }
3070 speed = base->speed;
3071 lanes = lk_ksettings->lanes;
3072 rc = bnxt_force_link_speed(dev, speed, lanes);
3073 if (rc) {
3074 if (rc == -EALREADY)
3075 rc = 0;
3076 goto set_setting_exit;
3077 }
3078 }
3079
3080 if (netif_running(dev))
3081 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
3082
3083 set_setting_exit:
3084 mutex_unlock(&bp->link_lock);
3085 return rc;
3086 }
3087
3088 static int bnxt_get_fecparam(struct net_device *dev,
3089 struct ethtool_fecparam *fec)
3090 {
3091 struct bnxt *bp = netdev_priv(dev);
3092 struct bnxt_link_info *link_info;
3093 u8 active_fec;
3094 u16 fec_cfg;
3095
3096 link_info = &bp->link_info;
3097 fec_cfg = link_info->fec_cfg;
3098 active_fec = link_info->active_fec_sig_mode &
3099 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK;
3100 if (fec_cfg & BNXT_FEC_NONE) {
3101 fec->fec = ETHTOOL_FEC_NONE;
3102 fec->active_fec = ETHTOOL_FEC_NONE;
3103 return 0;
3104 }
3105 if (fec_cfg & BNXT_FEC_AUTONEG)
3106 fec->fec |= ETHTOOL_FEC_AUTO;
3107 if (fec_cfg & BNXT_FEC_ENC_BASE_R)
3108 fec->fec |= ETHTOOL_FEC_BASER;
3109 if (fec_cfg & BNXT_FEC_ENC_RS)
3110 fec->fec |= ETHTOOL_FEC_RS;
3111 if (fec_cfg & BNXT_FEC_ENC_LLRS)
3112 fec->fec |= ETHTOOL_FEC_LLRS;
3113
3114 switch (active_fec) {
3115 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE:
3116 fec->active_fec |= ETHTOOL_FEC_BASER;
3117 break;
3118 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE:
3119 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE:
3120 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE:
3121 fec->active_fec |= ETHTOOL_FEC_RS;
3122 break;
3123 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE:
3124 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE:
3125 fec->active_fec |= ETHTOOL_FEC_LLRS;
3126 break;
3127 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE:
3128 fec->active_fec |= ETHTOOL_FEC_OFF;
3129 break;
3130 }
3131 return 0;
3132 }
3133
3134 static void bnxt_get_fec_stats(struct net_device *dev,
3135 struct ethtool_fec_stats *fec_stats)
3136 {
3137 struct bnxt *bp = netdev_priv(dev);
3138 u64 *rx;
3139
3140 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
3141 return;
3142
3143 rx = bp->rx_port_stats_ext.sw_stats;
3144 fec_stats->corrected_bits.total =
3145 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits));
3146
3147 if (bp->fw_rx_stats_ext_size <= BNXT_RX_STATS_EXT_NUM_LEGACY)
3148 return;
3149
3150 fec_stats->corrected_blocks.total =
3151 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks));
3152 fec_stats->uncorrectable_blocks.total =
3153 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_uncorrectable_blocks));
3154 }
3155
3156 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
3157 u32 fec)
3158 {
3159 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE;
3160
3161 if (fec & ETHTOOL_FEC_BASER)
3162 fw_fec |= BNXT_FEC_BASE_R_ON(link_info);
3163 else if (fec & ETHTOOL_FEC_RS)
3164 fw_fec |= BNXT_FEC_RS_ON(link_info);
3165 else if (fec & ETHTOOL_FEC_LLRS)
3166 fw_fec |= BNXT_FEC_LLRS_ON;
3167 return fw_fec;
3168 }
3169
3170 static int bnxt_set_fecparam(struct net_device *dev,
3171 struct ethtool_fecparam *fecparam)
3172 {
3173 struct hwrm_port_phy_cfg_input *req;
3174 struct bnxt *bp = netdev_priv(dev);
3175 struct bnxt_link_info *link_info;
3176 u32 new_cfg, fec = fecparam->fec;
3177 u16 fec_cfg;
3178 int rc;
3179
3180 link_info = &bp->link_info;
3181 fec_cfg = link_info->fec_cfg;
3182 if (fec_cfg & BNXT_FEC_NONE)
3183 return -EOPNOTSUPP;
3184
3185 if (fec & ETHTOOL_FEC_OFF) {
3186 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE |
3187 BNXT_FEC_ALL_OFF(link_info);
3188 goto apply_fec;
3189 }
3190 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) ||
3191 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) ||
3192 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) ||
3193 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)))
3194 return -EINVAL;
3195
3196 if (fec & ETHTOOL_FEC_AUTO) {
3197 if (!link_info->autoneg)
3198 return -EINVAL;
3199 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE;
3200 } else {
3201 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec);
3202 }
3203
3204 apply_fec:
3205 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
3206 if (rc)
3207 return rc;
3208 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
3209 rc = hwrm_req_send(bp, req);
3210 /* update current settings */
3211 if (!rc) {
3212 mutex_lock(&bp->link_lock);
3213 bnxt_update_link(bp, false);
3214 mutex_unlock(&bp->link_lock);
3215 }
3216 return rc;
3217 }
3218
3219 static void bnxt_get_pauseparam(struct net_device *dev,
3220 struct ethtool_pauseparam *epause)
3221 {
3222 struct bnxt *bp = netdev_priv(dev);
3223 struct bnxt_link_info *link_info = &bp->link_info;
3224
3225 if (BNXT_VF(bp))
3226 return;
3227 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
3228 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
3229 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
3230 }
3231
3232 static void bnxt_get_pause_stats(struct net_device *dev,
3233 struct ethtool_pause_stats *epstat)
3234 {
3235 struct bnxt *bp = netdev_priv(dev);
3236 u64 *rx, *tx;
3237
3238 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
3239 return;
3240
3241 rx = bp->port_stats.sw_stats;
3242 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
3243
3244 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames);
3245 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames);
3246 }
3247
3248 static int bnxt_set_pauseparam(struct net_device *dev,
3249 struct ethtool_pauseparam *epause)
3250 {
3251 int rc = 0;
3252 struct bnxt *bp = netdev_priv(dev);
3253 struct bnxt_link_info *link_info = &bp->link_info;
3254
3255 if (!BNXT_PHY_CFG_ABLE(bp) || (bp->phy_flags & BNXT_PHY_FL_NO_PAUSE))
3256 return -EOPNOTSUPP;
3257
3258 mutex_lock(&bp->link_lock);
3259 if (epause->autoneg) {
3260 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
3261 rc = -EINVAL;
3262 goto pause_exit;
3263 }
3264
3265 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
3266 link_info->req_flow_ctrl = 0;
3267 } else {
3268 /* when transition from auto pause to force pause,
3269 * force a link change
3270 */
3271 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
3272 link_info->force_link_chng = true;
3273 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
3274 link_info->req_flow_ctrl = 0;
3275 }
3276 if (epause->rx_pause)
3277 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
3278
3279 if (epause->tx_pause)
3280 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
3281
3282 if (netif_running(dev))
3283 rc = bnxt_hwrm_set_pause(bp);
3284
3285 pause_exit:
3286 mutex_unlock(&bp->link_lock);
3287 return rc;
3288 }
3289
3290 static u32 bnxt_get_link(struct net_device *dev)
3291 {
3292 struct bnxt *bp = netdev_priv(dev);
3293
3294 /* TODO: handle MF, VF, driver close case */
3295 return BNXT_LINK_IS_UP(bp);
3296 }
3297
3298 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
3299 struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
3300 {
3301 struct hwrm_nvm_get_dev_info_output *resp;
3302 struct hwrm_nvm_get_dev_info_input *req;
3303 int rc;
3304
3305 if (BNXT_VF(bp))
3306 return -EOPNOTSUPP;
3307
3308 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO);
3309 if (rc)
3310 return rc;
3311
3312 resp = hwrm_req_hold(bp, req);
3313 rc = hwrm_req_send(bp, req);
3314 if (!rc)
3315 memcpy(nvm_dev_info, resp, sizeof(*resp));
3316 hwrm_req_drop(bp, req);
3317 return rc;
3318 }
3319
3320 static void bnxt_print_admin_err(struct bnxt *bp)
3321 {
3322 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
3323 }
3324
3325 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
3326 u16 ext, u16 *index, u32 *item_length,
3327 u32 *data_length);
3328
3329 int bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
3330 u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
3331 u32 dir_item_len, const u8 *data,
3332 size_t data_len)
3333 {
3334 struct bnxt *bp = netdev_priv(dev);
3335 struct hwrm_nvm_write_input *req;
3336 int rc;
3337
3338 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE);
3339 if (rc)
3340 return rc;
3341
3342 if (data_len && data) {
3343 dma_addr_t dma_handle;
3344 u8 *kmem;
3345
3346 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle);
3347 if (!kmem) {
3348 hwrm_req_drop(bp, req);
3349 return -ENOMEM;
3350 }
3351
3352 req->dir_data_length = cpu_to_le32(data_len);
3353
3354 memcpy(kmem, data, data_len);
3355 req->host_src_addr = cpu_to_le64(dma_handle);
3356 }
3357
3358 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout);
3359 req->dir_type = cpu_to_le16(dir_type);
3360 req->dir_ordinal = cpu_to_le16(dir_ordinal);
3361 req->dir_ext = cpu_to_le16(dir_ext);
3362 req->dir_attr = cpu_to_le16(dir_attr);
3363 req->dir_item_length = cpu_to_le32(dir_item_len);
3364 rc = hwrm_req_send(bp, req);
3365
3366 if (rc == -EACCES)
3367 bnxt_print_admin_err(bp);
3368 return rc;
3369 }
3370
3371 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
3372 u8 self_reset, u8 flags)
3373 {
3374 struct bnxt *bp = netdev_priv(dev);
3375 struct hwrm_fw_reset_input *req;
3376 int rc;
3377
3378 if (!bnxt_hwrm_reset_permitted(bp)) {
3379 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver");
3380 return -EPERM;
3381 }
3382
3383 rc = hwrm_req_init(bp, req, HWRM_FW_RESET);
3384 if (rc)
3385 return rc;
3386
3387 req->embedded_proc_type = proc_type;
3388 req->selfrst_status = self_reset;
3389 req->flags = flags;
3390
3391 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
3392 rc = hwrm_req_send_silent(bp, req);
3393 } else {
3394 rc = hwrm_req_send(bp, req);
3395 if (rc == -EACCES)
3396 bnxt_print_admin_err(bp);
3397 }
3398 return rc;
3399 }
3400
3401 static int bnxt_firmware_reset(struct net_device *dev,
3402 enum bnxt_nvm_directory_type dir_type)
3403 {
3404 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
3405 u8 proc_type, flags = 0;
3406
3407 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
3408 /* (e.g. when firmware isn't already running) */
3409 switch (dir_type) {
3410 case BNX_DIR_TYPE_CHIMP_PATCH:
3411 case BNX_DIR_TYPE_BOOTCODE:
3412 case BNX_DIR_TYPE_BOOTCODE_2:
3413 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
3414 /* Self-reset ChiMP upon next PCIe reset: */
3415 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
3416 break;
3417 case BNX_DIR_TYPE_APE_FW:
3418 case BNX_DIR_TYPE_APE_PATCH:
3419 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
3420 /* Self-reset APE upon next PCIe reset: */
3421 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
3422 break;
3423 case BNX_DIR_TYPE_KONG_FW:
3424 case BNX_DIR_TYPE_KONG_PATCH:
3425 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
3426 break;
3427 case BNX_DIR_TYPE_BONO_FW:
3428 case BNX_DIR_TYPE_BONO_PATCH:
3429 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
3430 break;
3431 default:
3432 return -EINVAL;
3433 }
3434
3435 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
3436 }
3437
3438 static int bnxt_firmware_reset_chip(struct net_device *dev)
3439 {
3440 struct bnxt *bp = netdev_priv(dev);
3441 u8 flags = 0;
3442
3443 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
3444 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
3445
3446 return bnxt_hwrm_firmware_reset(dev,
3447 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
3448 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
3449 flags);
3450 }
3451
3452 static int bnxt_firmware_reset_ap(struct net_device *dev)
3453 {
3454 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
3455 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
3456 0);
3457 }
3458
3459 static int bnxt_flash_firmware(struct net_device *dev,
3460 u16 dir_type,
3461 const u8 *fw_data,
3462 size_t fw_size)
3463 {
3464 int rc = 0;
3465 u16 code_type;
3466 u32 stored_crc;
3467 u32 calculated_crc;
3468 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
3469
3470 switch (dir_type) {
3471 case BNX_DIR_TYPE_BOOTCODE:
3472 case BNX_DIR_TYPE_BOOTCODE_2:
3473 code_type = CODE_BOOT;
3474 break;
3475 case BNX_DIR_TYPE_CHIMP_PATCH:
3476 code_type = CODE_CHIMP_PATCH;
3477 break;
3478 case BNX_DIR_TYPE_APE_FW:
3479 code_type = CODE_MCTP_PASSTHRU;
3480 break;
3481 case BNX_DIR_TYPE_APE_PATCH:
3482 code_type = CODE_APE_PATCH;
3483 break;
3484 case BNX_DIR_TYPE_KONG_FW:
3485 code_type = CODE_KONG_FW;
3486 break;
3487 case BNX_DIR_TYPE_KONG_PATCH:
3488 code_type = CODE_KONG_PATCH;
3489 break;
3490 case BNX_DIR_TYPE_BONO_FW:
3491 code_type = CODE_BONO_FW;
3492 break;
3493 case BNX_DIR_TYPE_BONO_PATCH:
3494 code_type = CODE_BONO_PATCH;
3495 break;
3496 default:
3497 netdev_err(dev, "Unsupported directory entry type: %u\n",
3498 dir_type);
3499 return -EINVAL;
3500 }
3501 if (fw_size < sizeof(struct bnxt_fw_header)) {
3502 netdev_err(dev, "Invalid firmware file size: %u\n",
3503 (unsigned int)fw_size);
3504 return -EINVAL;
3505 }
3506 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
3507 netdev_err(dev, "Invalid firmware signature: %08X\n",
3508 le32_to_cpu(header->signature));
3509 return -EINVAL;
3510 }
3511 if (header->code_type != code_type) {
3512 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
3513 code_type, header->code_type);
3514 return -EINVAL;
3515 }
3516 if (header->device != DEVICE_CUMULUS_FAMILY) {
3517 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
3518 DEVICE_CUMULUS_FAMILY, header->device);
3519 return -EINVAL;
3520 }
3521 /* Confirm the CRC32 checksum of the file: */
3522 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
3523 sizeof(stored_crc)));
3524 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
3525 if (calculated_crc != stored_crc) {
3526 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
3527 (unsigned long)stored_crc,
3528 (unsigned long)calculated_crc);
3529 return -EINVAL;
3530 }
3531 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
3532 0, 0, 0, fw_data, fw_size);
3533 if (rc == 0) /* Firmware update successful */
3534 rc = bnxt_firmware_reset(dev, dir_type);
3535
3536 return rc;
3537 }
3538
3539 static int bnxt_flash_microcode(struct net_device *dev,
3540 u16 dir_type,
3541 const u8 *fw_data,
3542 size_t fw_size)
3543 {
3544 struct bnxt_ucode_trailer *trailer;
3545 u32 calculated_crc;
3546 u32 stored_crc;
3547 int rc = 0;
3548
3549 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
3550 netdev_err(dev, "Invalid microcode file size: %u\n",
3551 (unsigned int)fw_size);
3552 return -EINVAL;
3553 }
3554 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
3555 sizeof(*trailer)));
3556 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
3557 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
3558 le32_to_cpu(trailer->sig));
3559 return -EINVAL;
3560 }
3561 if (le16_to_cpu(trailer->dir_type) != dir_type) {
3562 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
3563 dir_type, le16_to_cpu(trailer->dir_type));
3564 return -EINVAL;
3565 }
3566 if (le16_to_cpu(trailer->trailer_length) <
3567 sizeof(struct bnxt_ucode_trailer)) {
3568 netdev_err(dev, "Invalid microcode trailer length: %d\n",
3569 le16_to_cpu(trailer->trailer_length));
3570 return -EINVAL;
3571 }
3572
3573 /* Confirm the CRC32 checksum of the file: */
3574 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
3575 sizeof(stored_crc)));
3576 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
3577 if (calculated_crc != stored_crc) {
3578 netdev_err(dev,
3579 "CRC32 (%08lX) does not match calculated: %08lX\n",
3580 (unsigned long)stored_crc,
3581 (unsigned long)calculated_crc);
3582 return -EINVAL;
3583 }
3584 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
3585 0, 0, 0, fw_data, fw_size);
3586
3587 return rc;
3588 }
3589
3590 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
3591 {
3592 switch (dir_type) {
3593 case BNX_DIR_TYPE_CHIMP_PATCH:
3594 case BNX_DIR_TYPE_BOOTCODE:
3595 case BNX_DIR_TYPE_BOOTCODE_2:
3596 case BNX_DIR_TYPE_APE_FW:
3597 case BNX_DIR_TYPE_APE_PATCH:
3598 case BNX_DIR_TYPE_KONG_FW:
3599 case BNX_DIR_TYPE_KONG_PATCH:
3600 case BNX_DIR_TYPE_BONO_FW:
3601 case BNX_DIR_TYPE_BONO_PATCH:
3602 return true;
3603 }
3604
3605 return false;
3606 }
3607
3608 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
3609 {
3610 switch (dir_type) {
3611 case BNX_DIR_TYPE_AVS:
3612 case BNX_DIR_TYPE_EXP_ROM_MBA:
3613 case BNX_DIR_TYPE_PCIE:
3614 case BNX_DIR_TYPE_TSCF_UCODE:
3615 case BNX_DIR_TYPE_EXT_PHY:
3616 case BNX_DIR_TYPE_CCM:
3617 case BNX_DIR_TYPE_ISCSI_BOOT:
3618 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
3619 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
3620 return true;
3621 }
3622
3623 return false;
3624 }
3625
3626 static bool bnxt_dir_type_is_executable(u16 dir_type)
3627 {
3628 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
3629 bnxt_dir_type_is_other_exec_format(dir_type);
3630 }
3631
3632 static int bnxt_flash_firmware_from_file(struct net_device *dev,
3633 u16 dir_type,
3634 const char *filename)
3635 {
3636 const struct firmware *fw;
3637 int rc;
3638
3639 rc = request_firmware(&fw, filename, &dev->dev);
3640 if (rc != 0) {
3641 netdev_err(dev, "Error %d requesting firmware file: %s\n",
3642 rc, filename);
3643 return rc;
3644 }
3645 if (bnxt_dir_type_is_ape_bin_format(dir_type))
3646 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
3647 else if (bnxt_dir_type_is_other_exec_format(dir_type))
3648 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
3649 else
3650 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
3651 0, 0, 0, fw->data, fw->size);
3652 release_firmware(fw);
3653 return rc;
3654 }
3655
3656 #define MSG_INTEGRITY_ERR "PKG install error : Data integrity on NVM"
3657 #define MSG_INVALID_PKG "PKG install error : Invalid package"
3658 #define MSG_AUTHENTICATION_ERR "PKG install error : Authentication error"
3659 #define MSG_INVALID_DEV "PKG install error : Invalid device"
3660 #define MSG_INTERNAL_ERR "PKG install error : Internal error"
3661 #define MSG_NO_PKG_UPDATE_AREA_ERR "PKG update area not created in nvram"
3662 #define MSG_NO_SPACE_ERR "PKG insufficient update area in nvram"
3663 #define MSG_RESIZE_UPDATE_ERR "Resize UPDATE entry error"
3664 #define MSG_ANTI_ROLLBACK_ERR "HWRM_NVM_INSTALL_UPDATE failure due to Anti-rollback detected"
3665 #define MSG_GENERIC_FAILURE_ERR "HWRM_NVM_INSTALL_UPDATE failure"
3666
3667 static int nvm_update_err_to_stderr(struct net_device *dev, u8 result,
3668 struct netlink_ext_ack *extack)
3669 {
3670 switch (result) {
3671 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TYPE_PARAMETER:
3672 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_INDEX_PARAMETER:
3673 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_DATA_ERROR:
3674 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_CHECKSUM_ERROR:
3675 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_NOT_FOUND:
3676 case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED:
3677 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTEGRITY_ERR);
3678 return -EINVAL;
3679 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PREREQUISITE:
3680 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_FILE_HEADER:
3681 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_SIGNATURE:
3682 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_STREAM:
3683 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_LENGTH:
3684 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_MANIFEST:
3685 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TRAILER:
3686 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_CHECKSUM:
3687 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_ITEM_CHECKSUM:
3688 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DATA_LENGTH:
3689 case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DIRECTIVE:
3690 case NVM_INSTALL_UPDATE_RESP_RESULT_DUPLICATE_ITEM:
3691 case NVM_INSTALL_UPDATE_RESP_RESULT_ZERO_LENGTH_ITEM:
3692 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_PKG);
3693 return -ENOPKG;
3694 case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_AUTHENTICATION_ERROR:
3695 BNXT_NVM_ERR_MSG(dev, extack, MSG_AUTHENTICATION_ERR);
3696 return -EPERM;
3697 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_CHIP_REV:
3698 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_DEVICE_ID:
3699 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_VENDOR:
3700 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_ID:
3701 case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_PLATFORM:
3702 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_DEV);
3703 return -EOPNOTSUPP;
3704 default:
3705 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTERNAL_ERR);
3706 return -EIO;
3707 }
3708 }
3709
3710 #define BNXT_PKG_DMA_SIZE 0x40000
3711 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE))
3712 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST))
3713
3714 static int bnxt_resize_update_entry(struct net_device *dev, size_t fw_size,
3715 struct netlink_ext_ack *extack)
3716 {
3717 u32 item_len;
3718 int rc;
3719
3720 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
3721 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, NULL,
3722 &item_len, NULL);
3723 if (rc) {
3724 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR);
3725 return rc;
3726 }
3727
3728 if (fw_size > item_len) {
3729 rc = bnxt_flash_nvram(dev, BNX_DIR_TYPE_UPDATE,
3730 BNX_DIR_ORDINAL_FIRST, 0, 1,
3731 round_up(fw_size, 4096), NULL, 0);
3732 if (rc) {
3733 BNXT_NVM_ERR_MSG(dev, extack, MSG_RESIZE_UPDATE_ERR);
3734 return rc;
3735 }
3736 }
3737 return 0;
3738 }
3739
3740 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw,
3741 u32 install_type, struct netlink_ext_ack *extack)
3742 {
3743 struct hwrm_nvm_install_update_input *install;
3744 struct hwrm_nvm_install_update_output *resp;
3745 struct hwrm_nvm_modify_input *modify;
3746 struct bnxt *bp = netdev_priv(dev);
3747 bool defrag_attempted = false;
3748 dma_addr_t dma_handle;
3749 u8 *kmem = NULL;
3750 u32 modify_len;
3751 u32 item_len;
3752 u8 cmd_err;
3753 u16 index;
3754 int rc;
3755
3756 /* resize before flashing larger image than available space */
3757 rc = bnxt_resize_update_entry(dev, fw->size, extack);
3758 if (rc)
3759 return rc;
3760
3761 bnxt_hwrm_fw_set_time(bp);
3762
3763 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY);
3764 if (rc)
3765 return rc;
3766
3767 /* Try allocating a large DMA buffer first. Older fw will
3768 * cause excessive NVRAM erases when using small blocks.
3769 */
3770 modify_len = roundup_pow_of_two(fw->size);
3771 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE);
3772 while (1) {
3773 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle);
3774 if (!kmem && modify_len > PAGE_SIZE)
3775 modify_len /= 2;
3776 else
3777 break;
3778 }
3779 if (!kmem) {
3780 hwrm_req_drop(bp, modify);
3781 return -ENOMEM;
3782 }
3783
3784 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE);
3785 if (rc) {
3786 hwrm_req_drop(bp, modify);
3787 return rc;
3788 }
3789
3790 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout);
3791 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout);
3792
3793 hwrm_req_hold(bp, modify);
3794 modify->host_src_addr = cpu_to_le64(dma_handle);
3795
3796 resp = hwrm_req_hold(bp, install);
3797 if ((install_type & 0xffff) == 0)
3798 install_type >>= 16;
3799 install->install_type = cpu_to_le32(install_type);
3800
3801 do {
3802 u32 copied = 0, len = modify_len;
3803
3804 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
3805 BNX_DIR_ORDINAL_FIRST,
3806 BNX_DIR_EXT_NONE,
3807 &index, &item_len, NULL);
3808 if (rc) {
3809 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR);
3810 break;
3811 }
3812 if (fw->size > item_len) {
3813 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_SPACE_ERR);
3814 rc = -EFBIG;
3815 break;
3816 }
3817
3818 modify->dir_idx = cpu_to_le16(index);
3819
3820 if (fw->size > modify_len)
3821 modify->flags = BNXT_NVM_MORE_FLAG;
3822 while (copied < fw->size) {
3823 u32 balance = fw->size - copied;
3824
3825 if (balance <= modify_len) {
3826 len = balance;
3827 if (copied)
3828 modify->flags |= BNXT_NVM_LAST_FLAG;
3829 }
3830 memcpy(kmem, fw->data + copied, len);
3831 modify->len = cpu_to_le32(len);
3832 modify->offset = cpu_to_le32(copied);
3833 rc = hwrm_req_send(bp, modify);
3834 if (rc)
3835 goto pkg_abort;
3836 copied += len;
3837 }
3838
3839 rc = hwrm_req_send_silent(bp, install);
3840 if (!rc)
3841 break;
3842
3843 if (defrag_attempted) {
3844 /* We have tried to defragment already in the previous
3845 * iteration. Return with the result for INSTALL_UPDATE
3846 */
3847 break;
3848 }
3849
3850 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err;
3851
3852 switch (cmd_err) {
3853 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_ANTI_ROLLBACK:
3854 BNXT_NVM_ERR_MSG(dev, extack, MSG_ANTI_ROLLBACK_ERR);
3855 rc = -EALREADY;
3856 break;
3857 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR:
3858 install->flags =
3859 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
3860
3861 rc = hwrm_req_send_silent(bp, install);
3862 if (!rc)
3863 break;
3864
3865 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err;
3866
3867 if (cmd_err == NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) {
3868 /* FW has cleared NVM area, driver will create
3869 * UPDATE directory and try the flash again
3870 */
3871 defrag_attempted = true;
3872 install->flags = 0;
3873 rc = bnxt_flash_nvram(bp->dev,
3874 BNX_DIR_TYPE_UPDATE,
3875 BNX_DIR_ORDINAL_FIRST,
3876 0, 0, item_len, NULL, 0);
3877 if (!rc)
3878 break;
3879 }
3880 fallthrough;
3881 default:
3882 BNXT_NVM_ERR_MSG(dev, extack, MSG_GENERIC_FAILURE_ERR);
3883 }
3884 } while (defrag_attempted && !rc);
3885
3886 pkg_abort:
3887 hwrm_req_drop(bp, modify);
3888 hwrm_req_drop(bp, install);
3889
3890 if (resp->result) {
3891 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
3892 (s8)resp->result, (int)resp->problem_item);
3893 rc = nvm_update_err_to_stderr(dev, resp->result, extack);
3894 }
3895 if (rc == -EACCES)
3896 bnxt_print_admin_err(bp);
3897 return rc;
3898 }
3899
3900 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
3901 u32 install_type, struct netlink_ext_ack *extack)
3902 {
3903 const struct firmware *fw;
3904 int rc;
3905
3906 rc = request_firmware(&fw, filename, &dev->dev);
3907 if (rc != 0) {
3908 netdev_err(dev, "PKG error %d requesting file: %s\n",
3909 rc, filename);
3910 return rc;
3911 }
3912
3913 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type, extack);
3914
3915 release_firmware(fw);
3916
3917 return rc;
3918 }
3919
3920 static int bnxt_flash_device(struct net_device *dev,
3921 struct ethtool_flash *flash)
3922 {
3923 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
3924 netdev_err(dev, "flashdev not supported from a virtual function\n");
3925 return -EINVAL;
3926 }
3927
3928 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
3929 flash->region > 0xffff)
3930 return bnxt_flash_package_from_file(dev, flash->data,
3931 flash->region, NULL);
3932
3933 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
3934 }
3935
3936 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
3937 {
3938 struct hwrm_nvm_get_dir_info_output *output;
3939 struct hwrm_nvm_get_dir_info_input *req;
3940 struct bnxt *bp = netdev_priv(dev);
3941 int rc;
3942
3943 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO);
3944 if (rc)
3945 return rc;
3946
3947 output = hwrm_req_hold(bp, req);
3948 rc = hwrm_req_send(bp, req);
3949 if (!rc) {
3950 *entries = le32_to_cpu(output->entries);
3951 *length = le32_to_cpu(output->entry_length);
3952 }
3953 hwrm_req_drop(bp, req);
3954 return rc;
3955 }
3956
3957 static int bnxt_get_eeprom_len(struct net_device *dev)
3958 {
3959 struct bnxt *bp = netdev_priv(dev);
3960
3961 if (BNXT_VF(bp))
3962 return 0;
3963
3964 /* The -1 return value allows the entire 32-bit range of offsets to be
3965 * passed via the ethtool command-line utility.
3966 */
3967 return -1;
3968 }
3969
3970 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
3971 {
3972 struct bnxt *bp = netdev_priv(dev);
3973 int rc;
3974 u32 dir_entries;
3975 u32 entry_length;
3976 u8 *buf;
3977 size_t buflen;
3978 dma_addr_t dma_handle;
3979 struct hwrm_nvm_get_dir_entries_input *req;
3980
3981 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
3982 if (rc != 0)
3983 return rc;
3984
3985 if (!dir_entries || !entry_length)
3986 return -EIO;
3987
3988 /* Insert 2 bytes of directory info (count and size of entries) */
3989 if (len < 2)
3990 return -EINVAL;
3991
3992 *data++ = dir_entries;
3993 *data++ = entry_length;
3994 len -= 2;
3995 memset(data, 0xff, len);
3996
3997 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES);
3998 if (rc)
3999 return rc;
4000
4001 buflen = mul_u32_u32(dir_entries, entry_length);
4002 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle);
4003 if (!buf) {
4004 hwrm_req_drop(bp, req);
4005 return -ENOMEM;
4006 }
4007 req->host_dest_addr = cpu_to_le64(dma_handle);
4008
4009 hwrm_req_hold(bp, req); /* hold the slice */
4010 rc = hwrm_req_send(bp, req);
4011 if (rc == 0)
4012 memcpy(data, buf, len > buflen ? buflen : len);
4013 hwrm_req_drop(bp, req);
4014 return rc;
4015 }
4016
4017 int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
4018 u32 length, u8 *data)
4019 {
4020 struct bnxt *bp = netdev_priv(dev);
4021 int rc;
4022 u8 *buf;
4023 dma_addr_t dma_handle;
4024 struct hwrm_nvm_read_input *req;
4025
4026 if (!length)
4027 return -EINVAL;
4028
4029 rc = hwrm_req_init(bp, req, HWRM_NVM_READ);
4030 if (rc)
4031 return rc;
4032
4033 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle);
4034 if (!buf) {
4035 hwrm_req_drop(bp, req);
4036 return -ENOMEM;
4037 }
4038
4039 req->host_dest_addr = cpu_to_le64(dma_handle);
4040 req->dir_idx = cpu_to_le16(index);
4041 req->offset = cpu_to_le32(offset);
4042 req->len = cpu_to_le32(length);
4043
4044 hwrm_req_hold(bp, req); /* hold the slice */
4045 rc = hwrm_req_send(bp, req);
4046 if (rc == 0)
4047 memcpy(data, buf, length);
4048 hwrm_req_drop(bp, req);
4049 return rc;
4050 }
4051
4052 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
4053 u16 ext, u16 *index, u32 *item_length,
4054 u32 *data_length)
4055 {
4056 struct hwrm_nvm_find_dir_entry_output *output;
4057 struct hwrm_nvm_find_dir_entry_input *req;
4058 struct bnxt *bp = netdev_priv(dev);
4059 int rc;
4060
4061 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY);
4062 if (rc)
4063 return rc;
4064
4065 req->enables = 0;
4066 req->dir_idx = 0;
4067 req->dir_type = cpu_to_le16(type);
4068 req->dir_ordinal = cpu_to_le16(ordinal);
4069 req->dir_ext = cpu_to_le16(ext);
4070 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
4071 output = hwrm_req_hold(bp, req);
4072 rc = hwrm_req_send_silent(bp, req);
4073 if (rc == 0) {
4074 if (index)
4075 *index = le16_to_cpu(output->dir_idx);
4076 if (item_length)
4077 *item_length = le32_to_cpu(output->dir_item_length);
4078 if (data_length)
4079 *data_length = le32_to_cpu(output->dir_data_length);
4080 }
4081 hwrm_req_drop(bp, req);
4082 return rc;
4083 }
4084
4085 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
4086 {
4087 char *retval = NULL;
4088 char *p;
4089 char *value;
4090 int field = 0;
4091
4092 if (datalen < 1)
4093 return NULL;
4094 /* null-terminate the log data (removing last '\n'): */
4095 data[datalen - 1] = 0;
4096 for (p = data; *p != 0; p++) {
4097 field = 0;
4098 retval = NULL;
4099 while (*p != 0 && *p != '\n') {
4100 value = p;
4101 while (*p != 0 && *p != '\t' && *p != '\n')
4102 p++;
4103 if (field == desired_field)
4104 retval = value;
4105 if (*p != '\t')
4106 break;
4107 *p = 0;
4108 field++;
4109 p++;
4110 }
4111 if (*p == 0)
4112 break;
4113 *p = 0;
4114 }
4115 return retval;
4116 }
4117
4118 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size)
4119 {
4120 struct bnxt *bp = netdev_priv(dev);
4121 u16 index = 0;
4122 char *pkgver;
4123 u32 pkglen;
4124 u8 *pkgbuf;
4125 int rc;
4126
4127 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
4128 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
4129 &index, NULL, &pkglen);
4130 if (rc)
4131 return rc;
4132
4133 pkgbuf = kzalloc(pkglen, GFP_KERNEL);
4134 if (!pkgbuf) {
4135 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
4136 pkglen);
4137 return -ENOMEM;
4138 }
4139
4140 rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf);
4141 if (rc)
4142 goto err;
4143
4144 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
4145 pkglen);
4146 if (pkgver && *pkgver != 0 && isdigit(*pkgver))
4147 strscpy(ver, pkgver, size);
4148 else
4149 rc = -ENOENT;
4150
4151 err:
4152 kfree(pkgbuf);
4153
4154 return rc;
4155 }
4156
4157 static void bnxt_get_pkgver(struct net_device *dev)
4158 {
4159 struct bnxt *bp = netdev_priv(dev);
4160 char buf[FW_VER_STR_LEN];
4161 int len;
4162
4163 if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) {
4164 len = strlen(bp->fw_ver_str);
4165 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len,
4166 "/pkg %s", buf);
4167 }
4168 }
4169
4170 static int bnxt_get_eeprom(struct net_device *dev,
4171 struct ethtool_eeprom *eeprom,
4172 u8 *data)
4173 {
4174 u32 index;
4175 u32 offset;
4176
4177 if (eeprom->offset == 0) /* special offset value to get directory */
4178 return bnxt_get_nvram_directory(dev, eeprom->len, data);
4179
4180 index = eeprom->offset >> 24;
4181 offset = eeprom->offset & 0xffffff;
4182
4183 if (index == 0) {
4184 netdev_err(dev, "unsupported index value: %d\n", index);
4185 return -EINVAL;
4186 }
4187
4188 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
4189 }
4190
4191 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
4192 {
4193 struct hwrm_nvm_erase_dir_entry_input *req;
4194 struct bnxt *bp = netdev_priv(dev);
4195 int rc;
4196
4197 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY);
4198 if (rc)
4199 return rc;
4200
4201 req->dir_idx = cpu_to_le16(index);
4202 return hwrm_req_send(bp, req);
4203 }
4204
4205 static int bnxt_set_eeprom(struct net_device *dev,
4206 struct ethtool_eeprom *eeprom,
4207 u8 *data)
4208 {
4209 struct bnxt *bp = netdev_priv(dev);
4210 u8 index, dir_op;
4211 u16 type, ext, ordinal, attr;
4212
4213 if (!BNXT_PF(bp)) {
4214 netdev_err(dev, "NVM write not supported from a virtual function\n");
4215 return -EINVAL;
4216 }
4217
4218 type = eeprom->magic >> 16;
4219
4220 if (type == 0xffff) { /* special value for directory operations */
4221 index = eeprom->magic & 0xff;
4222 dir_op = eeprom->magic >> 8;
4223 if (index == 0)
4224 return -EINVAL;
4225 switch (dir_op) {
4226 case 0x0e: /* erase */
4227 if (eeprom->offset != ~eeprom->magic)
4228 return -EINVAL;
4229 return bnxt_erase_nvram_directory(dev, index - 1);
4230 default:
4231 return -EINVAL;
4232 }
4233 }
4234
4235 /* Create or re-write an NVM item: */
4236 if (bnxt_dir_type_is_executable(type))
4237 return -EOPNOTSUPP;
4238 ext = eeprom->magic & 0xffff;
4239 ordinal = eeprom->offset >> 16;
4240 attr = eeprom->offset & 0xffff;
4241
4242 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data,
4243 eeprom->len);
4244 }
4245
4246 static int bnxt_set_eee(struct net_device *dev, struct ethtool_keee *edata)
4247 {
4248 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
4249 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp);
4250 struct bnxt *bp = netdev_priv(dev);
4251 struct ethtool_keee *eee = &bp->eee;
4252 struct bnxt_link_info *link_info = &bp->link_info;
4253 int rc = 0;
4254
4255 if (!BNXT_PHY_CFG_ABLE(bp))
4256 return -EOPNOTSUPP;
4257
4258 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
4259 return -EOPNOTSUPP;
4260
4261 mutex_lock(&bp->link_lock);
4262 _bnxt_fw_to_linkmode(advertising, link_info->advertising);
4263 if (!edata->eee_enabled)
4264 goto eee_ok;
4265
4266 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
4267 netdev_warn(dev, "EEE requires autoneg\n");
4268 rc = -EINVAL;
4269 goto eee_exit;
4270 }
4271 if (edata->tx_lpi_enabled) {
4272 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
4273 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
4274 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
4275 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
4276 rc = -EINVAL;
4277 goto eee_exit;
4278 } else if (!bp->lpi_tmr_hi) {
4279 edata->tx_lpi_timer = eee->tx_lpi_timer;
4280 }
4281 }
4282 if (linkmode_empty(edata->advertised)) {
4283 linkmode_and(edata->advertised, advertising, eee->supported);
4284 } else if (linkmode_andnot(tmp, edata->advertised, advertising)) {
4285 netdev_warn(dev, "EEE advertised must be a subset of autoneg advertised speeds\n");
4286 rc = -EINVAL;
4287 goto eee_exit;
4288 }
4289
4290 linkmode_copy(eee->advertised, edata->advertised);
4291 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
4292 eee->tx_lpi_timer = edata->tx_lpi_timer;
4293 eee_ok:
4294 eee->eee_enabled = edata->eee_enabled;
4295
4296 if (netif_running(dev))
4297 rc = bnxt_hwrm_set_link_setting(bp, false, true);
4298
4299 eee_exit:
4300 mutex_unlock(&bp->link_lock);
4301 return rc;
4302 }
4303
4304 static int bnxt_get_eee(struct net_device *dev, struct ethtool_keee *edata)
4305 {
4306 struct bnxt *bp = netdev_priv(dev);
4307
4308 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
4309 return -EOPNOTSUPP;
4310
4311 *edata = bp->eee;
4312 if (!bp->eee.eee_enabled) {
4313 /* Preserve tx_lpi_timer so that the last value will be used
4314 * by default when it is re-enabled.
4315 */
4316 linkmode_zero(edata->advertised);
4317 edata->tx_lpi_enabled = 0;
4318 }
4319
4320 if (!bp->eee.eee_active)
4321 linkmode_zero(edata->lp_advertised);
4322
4323 return 0;
4324 }
4325
4326 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
4327 u16 page_number, u8 bank,
4328 u16 start_addr, u16 data_length,
4329 u8 *buf)
4330 {
4331 struct hwrm_port_phy_i2c_read_output *output;
4332 struct hwrm_port_phy_i2c_read_input *req;
4333 int rc, byte_offset = 0;
4334
4335 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ);
4336 if (rc)
4337 return rc;
4338
4339 output = hwrm_req_hold(bp, req);
4340 req->i2c_slave_addr = i2c_addr;
4341 req->page_number = cpu_to_le16(page_number);
4342 req->port_id = cpu_to_le16(bp->pf.port_id);
4343 do {
4344 u16 xfer_size;
4345
4346 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
4347 data_length -= xfer_size;
4348 req->page_offset = cpu_to_le16(start_addr + byte_offset);
4349 req->data_length = xfer_size;
4350 req->enables =
4351 cpu_to_le32((start_addr + byte_offset ?
4352 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET :
4353 0) |
4354 (bank ?
4355 PORT_PHY_I2C_READ_REQ_ENABLES_BANK_NUMBER :
4356 0));
4357 rc = hwrm_req_send(bp, req);
4358 if (!rc)
4359 memcpy(buf + byte_offset, output->data, xfer_size);
4360 byte_offset += xfer_size;
4361 } while (!rc && data_length > 0);
4362 hwrm_req_drop(bp, req);
4363
4364 return rc;
4365 }
4366
4367 static int bnxt_get_module_info(struct net_device *dev,
4368 struct ethtool_modinfo *modinfo)
4369 {
4370 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
4371 struct bnxt *bp = netdev_priv(dev);
4372 int rc;
4373
4374 /* No point in going further if phy status indicates
4375 * module is not inserted or if it is powered down or
4376 * if it is of type 10GBase-T
4377 */
4378 if (bp->link_info.module_status >
4379 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
4380 return -EOPNOTSUPP;
4381
4382 /* This feature is not supported in older firmware versions */
4383 if (bp->hwrm_spec_code < 0x10202)
4384 return -EOPNOTSUPP;
4385
4386 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 0,
4387 SFF_DIAG_SUPPORT_OFFSET + 1,
4388 data);
4389 if (!rc) {
4390 u8 module_id = data[0];
4391 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
4392
4393 switch (module_id) {
4394 case SFF_MODULE_ID_SFP:
4395 modinfo->type = ETH_MODULE_SFF_8472;
4396 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
4397 if (!diag_supported)
4398 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
4399 break;
4400 case SFF_MODULE_ID_QSFP:
4401 case SFF_MODULE_ID_QSFP_PLUS:
4402 modinfo->type = ETH_MODULE_SFF_8436;
4403 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
4404 break;
4405 case SFF_MODULE_ID_QSFP28:
4406 modinfo->type = ETH_MODULE_SFF_8636;
4407 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
4408 break;
4409 default:
4410 rc = -EOPNOTSUPP;
4411 break;
4412 }
4413 }
4414 return rc;
4415 }
4416
4417 static int bnxt_get_module_eeprom(struct net_device *dev,
4418 struct ethtool_eeprom *eeprom,
4419 u8 *data)
4420 {
4421 struct bnxt *bp = netdev_priv(dev);
4422 u16 start = eeprom->offset, length = eeprom->len;
4423 int rc = 0;
4424
4425 memset(data, 0, eeprom->len);
4426
4427 /* Read A0 portion of the EEPROM */
4428 if (start < ETH_MODULE_SFF_8436_LEN) {
4429 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
4430 length = ETH_MODULE_SFF_8436_LEN - start;
4431 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
4432 start, length, data);
4433 if (rc)
4434 return rc;
4435 start += length;
4436 data += length;
4437 length = eeprom->len - length;
4438 }
4439
4440 /* Read A2 portion of the EEPROM */
4441 if (length) {
4442 start -= ETH_MODULE_SFF_8436_LEN;
4443 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 0,
4444 start, length, data);
4445 }
4446 return rc;
4447 }
4448
4449 static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extack)
4450 {
4451 if (bp->link_info.module_status <=
4452 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
4453 return 0;
4454
4455 switch (bp->link_info.module_status) {
4456 case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN:
4457 NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down");
4458 break;
4459 case PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTINSERTED:
4460 NL_SET_ERR_MSG_MOD(extack, "Transceiver module not inserted");
4461 break;
4462 case PORT_PHY_QCFG_RESP_MODULE_STATUS_CURRENTFAULT:
4463 NL_SET_ERR_MSG_MOD(extack, "Transceiver module disabled due to current fault");
4464 break;
4465 default:
4466 NL_SET_ERR_MSG_MOD(extack, "Unknown error");
4467 break;
4468 }
4469 return -EINVAL;
4470 }
4471
4472 static int bnxt_get_module_eeprom_by_page(struct net_device *dev,
4473 const struct ethtool_module_eeprom *page_data,
4474 struct netlink_ext_ack *extack)
4475 {
4476 struct bnxt *bp = netdev_priv(dev);
4477 int rc;
4478
4479 rc = bnxt_get_module_status(bp, extack);
4480 if (rc)
4481 return rc;
4482
4483 if (bp->hwrm_spec_code < 0x10202) {
4484 NL_SET_ERR_MSG_MOD(extack, "Firmware version too old");
4485 return -EINVAL;
4486 }
4487
4488 if (page_data->bank && !(bp->phy_flags & BNXT_PHY_FL_BANK_SEL)) {
4489 NL_SET_ERR_MSG_MOD(extack, "Firmware not capable for bank selection");
4490 return -EINVAL;
4491 }
4492
4493 rc = bnxt_read_sfp_module_eeprom_info(bp, page_data->i2c_address << 1,
4494 page_data->page, page_data->bank,
4495 page_data->offset,
4496 page_data->length,
4497 page_data->data);
4498 if (rc) {
4499 NL_SET_ERR_MSG_MOD(extack, "Module`s eeprom read failed");
4500 return rc;
4501 }
4502 return page_data->length;
4503 }
4504
4505 static int bnxt_nway_reset(struct net_device *dev)
4506 {
4507 int rc = 0;
4508
4509 struct bnxt *bp = netdev_priv(dev);
4510 struct bnxt_link_info *link_info = &bp->link_info;
4511
4512 if (!BNXT_PHY_CFG_ABLE(bp))
4513 return -EOPNOTSUPP;
4514
4515 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
4516 return -EINVAL;
4517
4518 if (netif_running(dev))
4519 rc = bnxt_hwrm_set_link_setting(bp, true, false);
4520
4521 return rc;
4522 }
4523
4524 static int bnxt_set_phys_id(struct net_device *dev,
4525 enum ethtool_phys_id_state state)
4526 {
4527 struct hwrm_port_led_cfg_input *req;
4528 struct bnxt *bp = netdev_priv(dev);
4529 struct bnxt_pf_info *pf = &bp->pf;
4530 struct bnxt_led_cfg *led_cfg;
4531 u8 led_state;
4532 __le16 duration;
4533 int rc, i;
4534
4535 if (!bp->num_leds || BNXT_VF(bp))
4536 return -EOPNOTSUPP;
4537
4538 if (state == ETHTOOL_ID_ACTIVE) {
4539 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
4540 duration = cpu_to_le16(500);
4541 } else if (state == ETHTOOL_ID_INACTIVE) {
4542 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
4543 duration = cpu_to_le16(0);
4544 } else {
4545 return -EINVAL;
4546 }
4547 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG);
4548 if (rc)
4549 return rc;
4550
4551 req->port_id = cpu_to_le16(pf->port_id);
4552 req->num_leds = bp->num_leds;
4553 led_cfg = (struct bnxt_led_cfg *)&req->led0_id;
4554 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
4555 req->enables |= BNXT_LED_DFLT_ENABLES(i);
4556 led_cfg->led_id = bp->leds[i].led_id;
4557 led_cfg->led_state = led_state;
4558 led_cfg->led_blink_on = duration;
4559 led_cfg->led_blink_off = duration;
4560 led_cfg->led_group_id = bp->leds[i].led_group_id;
4561 }
4562 return hwrm_req_send(bp, req);
4563 }
4564
4565 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
4566 {
4567 struct hwrm_selftest_irq_input *req;
4568 int rc;
4569
4570 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ);
4571 if (rc)
4572 return rc;
4573
4574 req->cmpl_ring = cpu_to_le16(cmpl_ring);
4575 return hwrm_req_send(bp, req);
4576 }
4577
4578 static int bnxt_test_irq(struct bnxt *bp)
4579 {
4580 int i;
4581
4582 for (i = 0; i < bp->cp_nr_rings; i++) {
4583 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
4584 int rc;
4585
4586 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
4587 if (rc)
4588 return rc;
4589 }
4590 return 0;
4591 }
4592
4593 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
4594 {
4595 struct hwrm_port_mac_cfg_input *req;
4596 int rc;
4597
4598 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
4599 if (rc)
4600 return rc;
4601
4602 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
4603 if (enable)
4604 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
4605 else
4606 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
4607 return hwrm_req_send(bp, req);
4608 }
4609
4610 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
4611 {
4612 struct hwrm_port_phy_qcaps_output *resp;
4613 struct hwrm_port_phy_qcaps_input *req;
4614 int rc;
4615
4616 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS);
4617 if (rc)
4618 return rc;
4619
4620 resp = hwrm_req_hold(bp, req);
4621 rc = hwrm_req_send(bp, req);
4622 if (!rc)
4623 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
4624
4625 hwrm_req_drop(bp, req);
4626 return rc;
4627 }
4628
4629 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
4630 struct hwrm_port_phy_cfg_input *req)
4631 {
4632 struct bnxt_link_info *link_info = &bp->link_info;
4633 u16 fw_advertising;
4634 u16 fw_speed;
4635 int rc;
4636
4637 if (!link_info->autoneg ||
4638 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK))
4639 return 0;
4640
4641 rc = bnxt_query_force_speeds(bp, &fw_advertising);
4642 if (rc)
4643 return rc;
4644
4645 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
4646 if (BNXT_LINK_IS_UP(bp))
4647 fw_speed = bp->link_info.link_speed;
4648 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
4649 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
4650 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
4651 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
4652 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
4653 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
4654 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
4655 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
4656
4657 req->force_link_speed = cpu_to_le16(fw_speed);
4658 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
4659 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
4660 rc = hwrm_req_send(bp, req);
4661 req->flags = 0;
4662 req->force_link_speed = cpu_to_le16(0);
4663 return rc;
4664 }
4665
4666 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
4667 {
4668 struct hwrm_port_phy_cfg_input *req;
4669 int rc;
4670
4671 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
4672 if (rc)
4673 return rc;
4674
4675 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */
4676 hwrm_req_hold(bp, req);
4677
4678 if (enable) {
4679 bnxt_disable_an_for_lpbk(bp, req);
4680 if (ext)
4681 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
4682 else
4683 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
4684 } else {
4685 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
4686 }
4687 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
4688 rc = hwrm_req_send(bp, req);
4689 hwrm_req_drop(bp, req);
4690 return rc;
4691 }
4692
4693 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
4694 u32 raw_cons, int pkt_size)
4695 {
4696 struct bnxt_napi *bnapi = cpr->bnapi;
4697 struct bnxt_rx_ring_info *rxr;
4698 struct bnxt_sw_rx_bd *rx_buf;
4699 struct rx_cmp *rxcmp;
4700 u16 cp_cons, cons;
4701 u8 *data;
4702 u32 len;
4703 int i;
4704
4705 rxr = bnapi->rx_ring;
4706 cp_cons = RING_CMP(raw_cons);
4707 rxcmp = (struct rx_cmp *)
4708 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
4709 cons = rxcmp->rx_cmp_opaque;
4710 rx_buf = &rxr->rx_buf_ring[cons];
4711 data = rx_buf->data_ptr;
4712 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
4713 if (len != pkt_size)
4714 return -EIO;
4715 i = ETH_ALEN;
4716 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
4717 return -EIO;
4718 i += ETH_ALEN;
4719 for ( ; i < pkt_size; i++) {
4720 if (data[i] != (u8)(i & 0xff))
4721 return -EIO;
4722 }
4723 return 0;
4724 }
4725
4726 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
4727 int pkt_size)
4728 {
4729 struct tx_cmp *txcmp;
4730 int rc = -EIO;
4731 u32 raw_cons;
4732 u32 cons;
4733 int i;
4734
4735 raw_cons = cpr->cp_raw_cons;
4736 for (i = 0; i < 200; i++) {
4737 cons = RING_CMP(raw_cons);
4738 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
4739
4740 if (!TX_CMP_VALID(txcmp, raw_cons)) {
4741 udelay(5);
4742 continue;
4743 }
4744
4745 /* The valid test of the entry must be done first before
4746 * reading any further.
4747 */
4748 dma_rmb();
4749 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP ||
4750 TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_V3_CMP) {
4751 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
4752 raw_cons = NEXT_RAW_CMP(raw_cons);
4753 raw_cons = NEXT_RAW_CMP(raw_cons);
4754 break;
4755 }
4756 raw_cons = NEXT_RAW_CMP(raw_cons);
4757 }
4758 cpr->cp_raw_cons = raw_cons;
4759 return rc;
4760 }
4761
4762 static int bnxt_run_loopback(struct bnxt *bp)
4763 {
4764 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
4765 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
4766 struct bnxt_cp_ring_info *cpr;
4767 int pkt_size, i = 0;
4768 struct sk_buff *skb;
4769 dma_addr_t map;
4770 u8 *data;
4771 int rc;
4772
4773 cpr = &rxr->bnapi->cp_ring;
4774 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
4775 cpr = rxr->rx_cpr;
4776 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
4777 skb = netdev_alloc_skb(bp->dev, pkt_size);
4778 if (!skb)
4779 return -ENOMEM;
4780 data = skb_put(skb, pkt_size);
4781 ether_addr_copy(&data[i], bp->dev->dev_addr);
4782 i += ETH_ALEN;
4783 ether_addr_copy(&data[i], bp->dev->dev_addr);
4784 i += ETH_ALEN;
4785 for ( ; i < pkt_size; i++)
4786 data[i] = (u8)(i & 0xff);
4787
4788 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
4789 DMA_TO_DEVICE);
4790 if (dma_mapping_error(&bp->pdev->dev, map)) {
4791 dev_kfree_skb(skb);
4792 return -EIO;
4793 }
4794 bnxt_xmit_bd(bp, txr, map, pkt_size, NULL);
4795
4796 /* Sync BD data before updating doorbell */
4797 wmb();
4798
4799 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
4800 rc = bnxt_poll_loopback(bp, cpr, pkt_size);
4801
4802 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE);
4803 dev_kfree_skb(skb);
4804 return rc;
4805 }
4806
4807 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
4808 {
4809 struct hwrm_selftest_exec_output *resp;
4810 struct hwrm_selftest_exec_input *req;
4811 int rc;
4812
4813 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC);
4814 if (rc)
4815 return rc;
4816
4817 hwrm_req_timeout(bp, req, bp->test_info->timeout);
4818 req->flags = test_mask;
4819
4820 resp = hwrm_req_hold(bp, req);
4821 rc = hwrm_req_send(bp, req);
4822 *test_results = resp->test_success;
4823 hwrm_req_drop(bp, req);
4824 return rc;
4825 }
4826
4827 #define BNXT_DRV_TESTS 4
4828 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
4829 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
4830 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
4831 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3)
4832
4833 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
4834 u64 *buf)
4835 {
4836 struct bnxt *bp = netdev_priv(dev);
4837 bool do_ext_lpbk = false;
4838 bool offline = false;
4839 u8 test_results = 0;
4840 u8 test_mask = 0;
4841 int rc = 0, i;
4842
4843 if (!bp->num_tests || !BNXT_PF(bp))
4844 return;
4845
4846 if (etest->flags & ETH_TEST_FL_OFFLINE &&
4847 bnxt_ulp_registered(bp->edev)) {
4848 etest->flags |= ETH_TEST_FL_FAILED;
4849 netdev_warn(dev, "Offline tests cannot be run with RoCE driver loaded\n");
4850 return;
4851 }
4852
4853 memset(buf, 0, sizeof(u64) * bp->num_tests);
4854 if (!netif_running(dev)) {
4855 etest->flags |= ETH_TEST_FL_FAILED;
4856 return;
4857 }
4858
4859 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
4860 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK))
4861 do_ext_lpbk = true;
4862
4863 if (etest->flags & ETH_TEST_FL_OFFLINE) {
4864 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) {
4865 etest->flags |= ETH_TEST_FL_FAILED;
4866 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n");
4867 return;
4868 }
4869 offline = true;
4870 }
4871
4872 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
4873 u8 bit_val = 1 << i;
4874
4875 if (!(bp->test_info->offline_mask & bit_val))
4876 test_mask |= bit_val;
4877 else if (offline)
4878 test_mask |= bit_val;
4879 }
4880 if (!offline) {
4881 bnxt_run_fw_tests(bp, test_mask, &test_results);
4882 } else {
4883 bnxt_close_nic(bp, true, false);
4884 bnxt_run_fw_tests(bp, test_mask, &test_results);
4885
4886 buf[BNXT_MACLPBK_TEST_IDX] = 1;
4887 bnxt_hwrm_mac_loopback(bp, true);
4888 msleep(250);
4889 rc = bnxt_half_open_nic(bp);
4890 if (rc) {
4891 bnxt_hwrm_mac_loopback(bp, false);
4892 etest->flags |= ETH_TEST_FL_FAILED;
4893 return;
4894 }
4895 if (bnxt_run_loopback(bp))
4896 etest->flags |= ETH_TEST_FL_FAILED;
4897 else
4898 buf[BNXT_MACLPBK_TEST_IDX] = 0;
4899
4900 bnxt_hwrm_mac_loopback(bp, false);
4901 bnxt_hwrm_phy_loopback(bp, true, false);
4902 msleep(1000);
4903 if (bnxt_run_loopback(bp)) {
4904 buf[BNXT_PHYLPBK_TEST_IDX] = 1;
4905 etest->flags |= ETH_TEST_FL_FAILED;
4906 }
4907 if (do_ext_lpbk) {
4908 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
4909 bnxt_hwrm_phy_loopback(bp, true, true);
4910 msleep(1000);
4911 if (bnxt_run_loopback(bp)) {
4912 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
4913 etest->flags |= ETH_TEST_FL_FAILED;
4914 }
4915 }
4916 bnxt_hwrm_phy_loopback(bp, false, false);
4917 bnxt_half_close_nic(bp);
4918 rc = bnxt_open_nic(bp, true, true);
4919 }
4920 if (rc || bnxt_test_irq(bp)) {
4921 buf[BNXT_IRQ_TEST_IDX] = 1;
4922 etest->flags |= ETH_TEST_FL_FAILED;
4923 }
4924 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
4925 u8 bit_val = 1 << i;
4926
4927 if ((test_mask & bit_val) && !(test_results & bit_val)) {
4928 buf[i] = 1;
4929 etest->flags |= ETH_TEST_FL_FAILED;
4930 }
4931 }
4932 }
4933
4934 static int bnxt_reset(struct net_device *dev, u32 *flags)
4935 {
4936 struct bnxt *bp = netdev_priv(dev);
4937 bool reload = false;
4938 u32 req = *flags;
4939
4940 if (!req)
4941 return -EINVAL;
4942
4943 if (!BNXT_PF(bp)) {
4944 netdev_err(dev, "Reset is not supported from a VF\n");
4945 return -EOPNOTSUPP;
4946 }
4947
4948 if (pci_vfs_assigned(bp->pdev) &&
4949 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
4950 netdev_err(dev,
4951 "Reset not allowed when VFs are assigned to VMs\n");
4952 return -EBUSY;
4953 }
4954
4955 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
4956 /* This feature is not supported in older firmware versions */
4957 if (bp->hwrm_spec_code >= 0x10803) {
4958 if (!bnxt_firmware_reset_chip(dev)) {
4959 netdev_info(dev, "Firmware reset request successful.\n");
4960 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
4961 reload = true;
4962 *flags &= ~BNXT_FW_RESET_CHIP;
4963 }
4964 } else if (req == BNXT_FW_RESET_CHIP) {
4965 return -EOPNOTSUPP; /* only request, fail hard */
4966 }
4967 }
4968
4969 if (!BNXT_CHIP_P4_PLUS(bp) && (req & BNXT_FW_RESET_AP)) {
4970 /* This feature is not supported in older firmware versions */
4971 if (bp->hwrm_spec_code >= 0x10803) {
4972 if (!bnxt_firmware_reset_ap(dev)) {
4973 netdev_info(dev, "Reset application processor successful.\n");
4974 reload = true;
4975 *flags &= ~BNXT_FW_RESET_AP;
4976 }
4977 } else if (req == BNXT_FW_RESET_AP) {
4978 return -EOPNOTSUPP; /* only request, fail hard */
4979 }
4980 }
4981
4982 if (reload)
4983 netdev_info(dev, "Reload driver to complete reset\n");
4984
4985 return 0;
4986 }
4987
4988 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
4989 {
4990 struct bnxt *bp = netdev_priv(dev);
4991
4992 if (dump->flag > BNXT_DUMP_DRIVER) {
4993 netdev_info(dev, "Supports only Live(0), Crash(1), Driver(2) dumps.\n");
4994 return -EINVAL;
4995 }
4996
4997 if (dump->flag == BNXT_DUMP_CRASH) {
4998 if (bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_SOC_DDR &&
4999 (!IS_ENABLED(CONFIG_TEE_BNXT_FW))) {
5000 netdev_info(dev,
5001 "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
5002 return -EOPNOTSUPP;
5003 } else if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR)) {
5004 netdev_info(dev, "Crash dump collection from host memory is not supported on this interface.\n");
5005 return -EOPNOTSUPP;
5006 }
5007 }
5008
5009 bp->dump_flag = dump->flag;
5010 return 0;
5011 }
5012
5013 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
5014 {
5015 struct bnxt *bp = netdev_priv(dev);
5016
5017 if (bp->hwrm_spec_code < 0x10801)
5018 return -EOPNOTSUPP;
5019
5020 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
5021 bp->ver_resp.hwrm_fw_min_8b << 16 |
5022 bp->ver_resp.hwrm_fw_bld_8b << 8 |
5023 bp->ver_resp.hwrm_fw_rsvd_8b;
5024
5025 dump->flag = bp->dump_flag;
5026 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag);
5027 return 0;
5028 }
5029
5030 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
5031 void *buf)
5032 {
5033 struct bnxt *bp = netdev_priv(dev);
5034
5035 if (bp->hwrm_spec_code < 0x10801)
5036 return -EOPNOTSUPP;
5037
5038 memset(buf, 0, dump->len);
5039
5040 dump->flag = bp->dump_flag;
5041 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len);
5042 }
5043
5044 static int bnxt_get_ts_info(struct net_device *dev,
5045 struct kernel_ethtool_ts_info *info)
5046 {
5047 struct bnxt *bp = netdev_priv(dev);
5048 struct bnxt_ptp_cfg *ptp;
5049
5050 ptp = bp->ptp_cfg;
5051 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;
5052
5053 if (!ptp)
5054 return 0;
5055
5056 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
5057 SOF_TIMESTAMPING_RX_HARDWARE |
5058 SOF_TIMESTAMPING_RAW_HARDWARE;
5059 if (ptp->ptp_clock)
5060 info->phc_index = ptp_clock_index(ptp->ptp_clock);
5061
5062 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
5063
5064 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
5065 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
5066 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
5067
5068 if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS)
5069 info->rx_filters |= (1 << HWTSTAMP_FILTER_ALL);
5070 return 0;
5071 }
5072
5073 void bnxt_ethtool_init(struct bnxt *bp)
5074 {
5075 struct hwrm_selftest_qlist_output *resp;
5076 struct hwrm_selftest_qlist_input *req;
5077 struct bnxt_test_info *test_info;
5078 struct net_device *dev = bp->dev;
5079 int i, rc;
5080
5081 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
5082 bnxt_get_pkgver(dev);
5083
5084 bp->num_tests = 0;
5085 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp))
5086 return;
5087
5088 test_info = bp->test_info;
5089 if (!test_info) {
5090 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
5091 if (!test_info)
5092 return;
5093 bp->test_info = test_info;
5094 }
5095
5096 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST))
5097 return;
5098
5099 resp = hwrm_req_hold(bp, req);
5100 rc = hwrm_req_send_silent(bp, req);
5101 if (rc)
5102 goto ethtool_init_exit;
5103
5104 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
5105 if (bp->num_tests > BNXT_MAX_TEST)
5106 bp->num_tests = BNXT_MAX_TEST;
5107
5108 test_info->offline_mask = resp->offline_tests;
5109 test_info->timeout = le16_to_cpu(resp->test_timeout);
5110 if (!test_info->timeout)
5111 test_info->timeout = HWRM_CMD_TIMEOUT;
5112 for (i = 0; i < bp->num_tests; i++) {
5113 char *str = test_info->string[i];
5114 char *fw_str = resp->test_name[i];
5115
5116 if (i == BNXT_MACLPBK_TEST_IDX) {
5117 strcpy(str, "Mac loopback test (offline)");
5118 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
5119 strcpy(str, "Phy loopback test (offline)");
5120 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
5121 strcpy(str, "Ext loopback test (offline)");
5122 } else if (i == BNXT_IRQ_TEST_IDX) {
5123 strcpy(str, "Interrupt_test (offline)");
5124 } else {
5125 snprintf(str, ETH_GSTRING_LEN, "%s test (%s)",
5126 fw_str, test_info->offline_mask & (1 << i) ?
5127 "offline" : "online");
5128 }
5129 }
5130
5131 ethtool_init_exit:
5132 hwrm_req_drop(bp, req);
5133 }
5134
5135 static void bnxt_get_eth_phy_stats(struct net_device *dev,
5136 struct ethtool_eth_phy_stats *phy_stats)
5137 {
5138 struct bnxt *bp = netdev_priv(dev);
5139 u64 *rx;
5140
5141 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
5142 return;
5143
5144 rx = bp->rx_port_stats_ext.sw_stats;
5145 phy_stats->SymbolErrorDuringCarrier =
5146 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err));
5147 }
5148
5149 static void bnxt_get_eth_mac_stats(struct net_device *dev,
5150 struct ethtool_eth_mac_stats *mac_stats)
5151 {
5152 struct bnxt *bp = netdev_priv(dev);
5153 u64 *rx, *tx;
5154
5155 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
5156 return;
5157
5158 rx = bp->port_stats.sw_stats;
5159 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
5160
5161 mac_stats->FramesReceivedOK =
5162 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames);
5163 mac_stats->FramesTransmittedOK =
5164 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames);
5165 mac_stats->FrameCheckSequenceErrors =
5166 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames);
5167 mac_stats->AlignmentErrors =
5168 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames);
5169 mac_stats->OutOfRangeLengthField =
5170 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames);
5171 }
5172
5173 static void bnxt_get_eth_ctrl_stats(struct net_device *dev,
5174 struct ethtool_eth_ctrl_stats *ctrl_stats)
5175 {
5176 struct bnxt *bp = netdev_priv(dev);
5177 u64 *rx;
5178
5179 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
5180 return;
5181
5182 rx = bp->port_stats.sw_stats;
5183 ctrl_stats->MACControlFramesReceived =
5184 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames);
5185 }
5186
5187 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = {
5188 { 0, 64 },
5189 { 65, 127 },
5190 { 128, 255 },
5191 { 256, 511 },
5192 { 512, 1023 },
5193 { 1024, 1518 },
5194 { 1519, 2047 },
5195 { 2048, 4095 },
5196 { 4096, 9216 },
5197 { 9217, 16383 },
5198 {}
5199 };
5200
5201 static void bnxt_get_rmon_stats(struct net_device *dev,
5202 struct ethtool_rmon_stats *rmon_stats,
5203 const struct ethtool_rmon_hist_range **ranges)
5204 {
5205 struct bnxt *bp = netdev_priv(dev);
5206 u64 *rx, *tx;
5207
5208 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
5209 return;
5210
5211 rx = bp->port_stats.sw_stats;
5212 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
5213
5214 rmon_stats->jabbers =
5215 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames);
5216 rmon_stats->oversize_pkts =
5217 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames);
5218 rmon_stats->undersize_pkts =
5219 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames);
5220
5221 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames);
5222 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames);
5223 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames);
5224 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames);
5225 rmon_stats->hist[4] =
5226 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames);
5227 rmon_stats->hist[5] =
5228 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames);
5229 rmon_stats->hist[6] =
5230 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames);
5231 rmon_stats->hist[7] =
5232 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames);
5233 rmon_stats->hist[8] =
5234 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames);
5235 rmon_stats->hist[9] =
5236 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames);
5237
5238 rmon_stats->hist_tx[0] =
5239 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames);
5240 rmon_stats->hist_tx[1] =
5241 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames);
5242 rmon_stats->hist_tx[2] =
5243 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames);
5244 rmon_stats->hist_tx[3] =
5245 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames);
5246 rmon_stats->hist_tx[4] =
5247 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames);
5248 rmon_stats->hist_tx[5] =
5249 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames);
5250 rmon_stats->hist_tx[6] =
5251 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames);
5252 rmon_stats->hist_tx[7] =
5253 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames);
5254 rmon_stats->hist_tx[8] =
5255 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames);
5256 rmon_stats->hist_tx[9] =
5257 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames);
5258
5259 *ranges = bnxt_rmon_ranges;
5260 }
5261
5262 static void bnxt_get_ptp_stats(struct net_device *dev,
5263 struct ethtool_ts_stats *ts_stats)
5264 {
5265 struct bnxt *bp = netdev_priv(dev);
5266 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
5267
5268 if (ptp) {
5269 ts_stats->pkts = ptp->stats.ts_pkts;
5270 ts_stats->lost = ptp->stats.ts_lost;
5271 ts_stats->err = atomic64_read(&ptp->stats.ts_err);
5272 }
5273 }
5274
5275 static void bnxt_get_link_ext_stats(struct net_device *dev,
5276 struct ethtool_link_ext_stats *stats)
5277 {
5278 struct bnxt *bp = netdev_priv(dev);
5279 u64 *rx;
5280
5281 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
5282 return;
5283
5284 rx = bp->rx_port_stats_ext.sw_stats;
5285 stats->link_down_events =
5286 *(rx + BNXT_RX_STATS_EXT_OFFSET(link_down_events));
5287 }
5288
5289 void bnxt_ethtool_free(struct bnxt *bp)
5290 {
5291 kfree(bp->test_info);
5292 bp->test_info = NULL;
5293 }
5294
5295 const struct ethtool_ops bnxt_ethtool_ops = {
5296 .cap_link_lanes_supported = 1,
5297 .rxfh_per_ctx_key = 1,
5298 .rxfh_max_num_contexts = BNXT_MAX_ETH_RSS_CTX + 1,
5299 .rxfh_indir_space = BNXT_MAX_RSS_TABLE_ENTRIES_P5,
5300 .rxfh_priv_size = sizeof(struct bnxt_rss_ctx),
5301 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5302 ETHTOOL_COALESCE_MAX_FRAMES |
5303 ETHTOOL_COALESCE_USECS_IRQ |
5304 ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
5305 ETHTOOL_COALESCE_STATS_BLOCK_USECS |
5306 ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
5307 ETHTOOL_COALESCE_USE_CQE,
5308 .get_link_ksettings = bnxt_get_link_ksettings,
5309 .set_link_ksettings = bnxt_set_link_ksettings,
5310 .get_fec_stats = bnxt_get_fec_stats,
5311 .get_fecparam = bnxt_get_fecparam,
5312 .set_fecparam = bnxt_set_fecparam,
5313 .get_pause_stats = bnxt_get_pause_stats,
5314 .get_pauseparam = bnxt_get_pauseparam,
5315 .set_pauseparam = bnxt_set_pauseparam,
5316 .get_drvinfo = bnxt_get_drvinfo,
5317 .get_regs_len = bnxt_get_regs_len,
5318 .get_regs = bnxt_get_regs,
5319 .get_wol = bnxt_get_wol,
5320 .set_wol = bnxt_set_wol,
5321 .get_coalesce = bnxt_get_coalesce,
5322 .set_coalesce = bnxt_set_coalesce,
5323 .get_msglevel = bnxt_get_msglevel,
5324 .set_msglevel = bnxt_set_msglevel,
5325 .get_sset_count = bnxt_get_sset_count,
5326 .get_strings = bnxt_get_strings,
5327 .get_ethtool_stats = bnxt_get_ethtool_stats,
5328 .set_ringparam = bnxt_set_ringparam,
5329 .get_ringparam = bnxt_get_ringparam,
5330 .get_channels = bnxt_get_channels,
5331 .set_channels = bnxt_set_channels,
5332 .get_rxnfc = bnxt_get_rxnfc,
5333 .set_rxnfc = bnxt_set_rxnfc,
5334 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
5335 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
5336 .get_rxfh = bnxt_get_rxfh,
5337 .set_rxfh = bnxt_set_rxfh,
5338 .create_rxfh_context = bnxt_create_rxfh_context,
5339 .modify_rxfh_context = bnxt_modify_rxfh_context,
5340 .remove_rxfh_context = bnxt_remove_rxfh_context,
5341 .flash_device = bnxt_flash_device,
5342 .get_eeprom_len = bnxt_get_eeprom_len,
5343 .get_eeprom = bnxt_get_eeprom,
5344 .set_eeprom = bnxt_set_eeprom,
5345 .get_link = bnxt_get_link,
5346 .get_link_ext_stats = bnxt_get_link_ext_stats,
5347 .get_eee = bnxt_get_eee,
5348 .set_eee = bnxt_set_eee,
5349 .get_module_info = bnxt_get_module_info,
5350 .get_module_eeprom = bnxt_get_module_eeprom,
5351 .get_module_eeprom_by_page = bnxt_get_module_eeprom_by_page,
5352 .nway_reset = bnxt_nway_reset,
5353 .set_phys_id = bnxt_set_phys_id,
5354 .self_test = bnxt_self_test,
5355 .get_ts_info = bnxt_get_ts_info,
5356 .reset = bnxt_reset,
5357 .set_dump = bnxt_set_dump,
5358 .get_dump_flag = bnxt_get_dump_flag,
5359 .get_dump_data = bnxt_get_dump_data,
5360 .get_eth_phy_stats = bnxt_get_eth_phy_stats,
5361 .get_eth_mac_stats = bnxt_get_eth_mac_stats,
5362 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats,
5363 .get_rmon_stats = bnxt_get_rmon_stats,
5364 .get_ts_stats = bnxt_get_ptp_stats,
5365 };
Kernel DRM miscellaneous fixes and cross-tree changes