drm/bridge: Fix assignment of the of_node of the parent to aux bridge
[drm/drm-misc.git] / Documentation / devicetree / bindings / fpga / xlnx,zynqmp-pcap-fpga.yaml
blob1390ae103b0b2378cc4ecebd5b694a5c7d4cb3d4
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager
9 maintainers:
10   - Nava kishore Manne <nava.kishore.manne@amd.com>
12 description: |
13   Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
14   The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
15   configure the Programmable Logic (PL). The configuration uses the
16   firmware interface.
18 properties:
19   compatible:
20     const: xlnx,zynqmp-pcap-fpga
22 required:
23   - compatible
25 additionalProperties: false
27 examples:
28   - |
29     firmware {
30       zynqmp_firmware: zynqmp-firmware {
31         zynqmp_pcap: pcap {
32           compatible = "xlnx,zynqmp-pcap-fpga";
33         };
34       };
35     };
36 ...