1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
14 The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
15 configure the Programmable Logic (PL). The configuration uses the
20 const: xlnx,zynqmp-pcap-fpga
25 additionalProperties: false
30 zynqmp_firmware: zynqmp-firmware {
32 compatible = "xlnx,zynqmp-pcap-fpga";