Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A31 MIPI D-PHY Controller
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 properties:
  14   "#phy-cells":
  15     const: 0
  16
  17   compatible:
  18     oneOf:
  19       - const: allwinner,sun6i-a31-mipi-dphy
  20       - const: allwinner,sun50i-a100-mipi-dphy
  21       - items:
  22           - const: allwinner,sun50i-a64-mipi-dphy
  23           - const: allwinner,sun6i-a31-mipi-dphy
  24       - items:
  25           - const: allwinner,sun20i-d1-mipi-dphy
  26           - const: allwinner,sun50i-a100-mipi-dphy
  27
  28   reg:
  29     maxItems: 1
  30
  31   interrupts:
  32     maxItems: 1
  33
  34   clocks:
  35     items:
  36       - description: Bus Clock
  37       - description: Module Clock
  38
  39   clock-names:
  40     items:
  41       - const: bus
  42       - const: mod
  43
  44   resets:
  45     maxItems: 1
  46
  47   allwinner,direction:
  48     $ref: /schemas/types.yaml#/definitions/string
  49     description: |
  50       Direction of the D-PHY:
  51       - "rx" for receiving (e.g. when used with MIPI CSI-2);
  52       - "tx" for transmitting (e.g. when used with MIPI DSI).
  53
  54     enum:
  55       - tx
  56       - rx
  57     default: tx
  58
  59 required:
  60   - "#phy-cells"
  61   - compatible
  62   - reg
  63   - interrupts
  64   - clocks
  65   - clock-names
  66   - resets
  67
  68 additionalProperties: false
  69
  70 examples:
  71   - |
  72     #include <dt-bindings/interrupt-controller/arm-gic.h>
  73
  74     dphy0: d-phy@1ca1000 {
  75         compatible = "allwinner,sun6i-a31-mipi-dphy";
  76         reg = <0x01ca1000 0x1000>;
  77         interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
  78         clocks = <&ccu 23>, <&ccu 97>;
  79         clock-names = "bus", "mod";
  80         resets = <&ccu 4>;
  81         #phy-cells = <0>;
  82     };
  83
  84 ...