1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MQ USB3 PHY
10 - Li Jun <jun.li@nxp.com>
36 A phandle to the regulator for USB VBUS.
38 fsl,phy-tx-vref-tune-percent:
40 Tunes the HS DC level relative to the nominal level
44 fsl,phy-tx-rise-tune-percent:
46 Adjusts the rise/fall time duration of the HS waveform relative to
51 fsl,phy-tx-preemp-amp-tune-microamp:
53 Adjust amount of current sourced to DPn and DMn after a J-to-K
54 or K-to-J transition. Default is 0 (disabled).
58 fsl,phy-tx-vboost-level-microvolt:
60 Adjust the boosted transmit launch pk-pk differential amplitude
64 fsl,phy-comp-dis-tune-percent:
66 Adjust the voltage level used to detect a disconnect event at the host
67 relative to the nominal value
71 fsl,phy-pcs-tx-deemph-3p5db-attenuation-db:
73 Adjust TX de-emphasis attenuation in dB at nominal
74 3.5dB point as per USB specification
75 $ref: /schemas/types.yaml#/definitions/uint32
79 fsl,phy-pcs-tx-swing-full-percent:
81 Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt
92 additionalProperties: false
96 #include <dt-bindings/clock/imx8mq-clock.h>
97 usb3_phy0: phy@381f0040 {
98 compatible = "fsl,imx8mq-usb-phy";
99 reg = <0x381f0040 0x40>;
100 clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;