1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB, SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
13 The QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy
23 - qcom,qdu1000-qmp-usb3-uni-phy
24 - qcom,sa8775p-qmp-usb3-uni-phy
25 - qcom,sc8180x-qmp-usb3-uni-phy
26 - qcom,sc8280xp-qmp-usb3-uni-phy
27 - qcom,sdm845-qmp-usb3-uni-phy
28 - qcom,sdx55-qmp-usb3-uni-phy
29 - qcom,sdx65-qmp-usb3-uni-phy
30 - qcom,sdx75-qmp-usb3-uni-phy
31 - qcom,sm8150-qmp-usb3-uni-phy
32 - qcom,sm8250-qmp-usb3-uni-phy
33 - qcom,sm8350-qmp-usb3-uni-phy
34 - qcom,x1e80100-qmp-usb3-uni-phy
91 - qcom,ipq6018-qmp-usb3-phy
92 - qcom,ipq8074-qmp-usb3-phy
93 - qcom,ipq9574-qmp-usb3-phy
94 - qcom,msm8996-qmp-usb3-phy
95 - qcom,sdx55-qmp-usb3-uni-phy
96 - qcom,sdx65-qmp-usb3-uni-phy
97 - qcom,sdx75-qmp-usb3-uni-phy
114 - qcom,qdu1000-qmp-usb3-uni-phy
115 - qcom,sa8775p-qmp-usb3-uni-phy
116 - qcom,sc8180x-qmp-usb3-uni-phy
117 - qcom,sc8280xp-qmp-usb3-uni-phy
118 - qcom,sm8150-qmp-usb3-uni-phy
119 - qcom,sm8250-qmp-usb3-uni-phy
120 - qcom,sm8350-qmp-usb3-uni-phy
121 - qcom,x1e80100-qmp-usb3-uni-phy
138 - qcom,sdm845-qmp-usb3-uni-phy
156 - qcom,sa8775p-qmp-usb3-uni-phy
157 - qcom,sc8180x-qmp-usb3-uni-phy
158 - qcom,sc8280xp-qmp-usb3-uni-phy
159 - qcom,x1e80100-qmp-usb3-uni-phy
164 additionalProperties: false
168 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
169 #include <dt-bindings/clock/qcom,rpmh.h>
172 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
173 reg = <0x088ef000 0x2000>;
175 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
176 <&gcc GCC_USB3_MP0_CLKREF_CLK>,
177 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
178 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
179 clock-names = "aux", "ref", "com_aux", "pipe";
181 power-domains = <&gcc USB30_MP_GDSC>;
183 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
184 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
185 reset-names = "phy", "phy_phy";
187 vdda-phy-supply = <&vreg_l3a>;
188 vdda-pll-supply = <&vreg_l5a>;
191 clock-output-names = "usb2_phy0_pipe_clk";