drm/bridge: Fix assignment of the of_node of the parent to aux bridge
[drm/drm-misc.git] / Documentation / devicetree / bindings / pinctrl / intel,lgm-io.yaml
blob1144ca2896e336374a9f62850d8a152be90cd22c
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Lightning Mountain SoC pinmux & GPIO controller
9 maintainers:
10   - Rahul Tanwar <rahul.tanwar@linux.intel.com>
12 description: |
13   Pinmux & GPIO controller controls pin multiplexing & configuration including
14   GPIO function selection & GPIO attributes configuration.
16 properties:
17   compatible:
18     const: intel,lgm-io
20   reg:
21     maxItems: 1
23 # Client device subnode's properties
24 patternProperties:
25   '-pins$':
26     type: object
27     description:
28       Pinctrl node's client devices use subnodes for desired pin configuration.
29       Client device subnodes use below standard properties.
30     $ref: pinmux-node.yaml#
32     properties:
33       function: true
34       groups: true
35       pins: true
36       pinmux: true
37       bias-pull-up: true
38       bias-pull-down: true
39       drive-strength: true
40       slew-rate: true
41       drive-open-drain: true
42       output-enable: true
44     required:
45       - function
46       - groups
48     additionalProperties: false
50 allOf:
51   - $ref: pinctrl.yaml#
53 required:
54   - compatible
55   - reg
57 additionalProperties: false
59 examples:
60   # Pinmux controller node
61   - |
62     pinctrl: pinctrl@e2880000 {
63         compatible = "intel,lgm-io";
64         reg = <0xe2880000 0x100000>;
66         uart0-pins {
67              pins = <64>, /* UART_RX0 */
68                     <65>; /* UART_TX0 */
69              function = "CONSOLE_UART0";
70              pinmux = <1>,
71                       <1>;
72              groups = "CONSOLE_UART0";
73           };
74     };
76 ...