drm/bridge: Fix assignment of the of_node of the parent to aux bridge
[drm/drm-misc.git] / Documentation / devicetree / bindings / reset / hisilicon,hi3660-reset.yaml
blobe4de002d6903201fc17127c23307d331e93d6766
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon System Reset Controller
9 maintainers:
10   - Wei Xu <xuwei5@hisilicon.com>
12 description: |
13   Please also refer to reset.txt in this directory for common reset
14   controller binding usage.
15   The reset controller registers are part of the system-ctl block on
16   hi3660 and hi3670 SoCs.
18 properties:
19   compatible:
20     oneOf:
21       - items:
22           - const: hisilicon,hi3660-reset
23       - items:
24           - const: hisilicon,hi3670-reset
25           - const: hisilicon,hi3660-reset
27   hisi,rst-syscon:
28     deprecated: true
29     description: phandle of the reset's syscon, use hisilicon,rst-syscon instead
30     $ref: /schemas/types.yaml#/definitions/phandle
32   hisilicon,rst-syscon:
33     description: phandle of the reset's syscon.
34     $ref: /schemas/types.yaml#/definitions/phandle
36   '#reset-cells':
37     description: |
38       Specifies the number of cells needed to encode a reset source.
39       Cell #1 : offset of the reset assert control register from the syscon
40                 register base
41                 offset + 4: deassert control register
42                 offset + 8: status control register
43       Cell #2 : bit position of the reset in the reset control register
44     const: 2
46 required:
47   - compatible
49 additionalProperties: false
51 examples:
52   - |
53     iomcu_rst_controller {
54         compatible = "hisilicon,hi3660-reset";
55         hisilicon,rst-syscon = <&iomcu>;
56         #reset-cells = <2>;
57     };
58 ...