Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: SPI Bus controller for MediaTek ARM SoCs
   8
   9 maintainers:
  10   - Leilk Liu <leilk.liu@mediatek.com>
  11
  12 allOf:
  13   - $ref: /schemas/spi/spi-controller.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - enum:
  20               - mediatek,mt7629-spi
  21               - mediatek,mt8365-spi
  22           - const: mediatek,mt7622-spi
  23       - items:
  24           - enum:
  25               - mediatek,mt8516-spi
  26           - const: mediatek,mt2712-spi
  27       - items:
  28           - enum:
  29               - mediatek,mt6779-spi
  30               - mediatek,mt8186-spi
  31               - mediatek,mt8192-spi
  32               - mediatek,mt8195-spi
  33           - const: mediatek,mt6765-spi
  34       - items:
  35           - enum:
  36               - mediatek,mt7981-spi-ipm
  37               - mediatek,mt7986-spi-ipm
  38               - mediatek,mt8188-spi-ipm
  39           - const: mediatek,spi-ipm
  40       - items:
  41           - enum:
  42               - mediatek,mt2701-spi
  43               - mediatek,mt2712-spi
  44               - mediatek,mt6589-spi
  45               - mediatek,mt6765-spi
  46               - mediatek,mt6893-spi
  47               - mediatek,mt7622-spi
  48               - mediatek,mt8135-spi
  49               - mediatek,mt8173-spi
  50               - mediatek,mt8183-spi
  51
  52   reg:
  53     maxItems: 1
  54
  55   interrupts:
  56     maxItems: 1
  57
  58   clocks:
  59     minItems: 3
  60     items:
  61       - description: clock used for the parent clock
  62       - description: clock used for the muxes clock
  63       - description: clock used for the clock gate
  64       - description: clock used for the AHB bus, this clock is optional
  65
  66   clock-names:
  67     minItems: 3
  68     items:
  69       - const: parent-clk
  70       - const: sel-clk
  71       - const: spi-clk
  72       - const: hclk
  73
  74   mediatek,pad-select:
  75     $ref: /schemas/types.yaml#/definitions/uint32-array
  76     minItems: 1
  77     maxItems: 4
  78     items:
  79       enum: [0, 1, 2, 3]
  80     description:
  81       specify which pins group(ck/mi/mo/cs) spi controller used.
  82       This is an array.
  83
  84 required:
  85   - compatible
  86   - reg
  87   - interrupts
  88   - clocks
  89   - clock-names
  90   - '#address-cells'
  91   - '#size-cells'
  92
  93 unevaluatedProperties: false
  94
  95 examples:
  96   - |
  97     #include <dt-bindings/clock/mt8173-clk.h>
  98     #include <dt-bindings/gpio/gpio.h>
  99     #include <dt-bindings/interrupt-controller/arm-gic.h>
 100     #include <dt-bindings/interrupt-controller/irq.h>
 101
 102     spi@1100a000 {
 103       compatible = "mediatek,mt8173-spi";
 104       #address-cells = <1>;
 105       #size-cells = <0>;
 106       reg = <0x1100a000 0x1000>;
 107       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
 108       clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
 109                <&topckgen CLK_TOP_SPI_SEL>,
 110                <&pericfg CLK_PERI_SPI0>;
 111       clock-names = "parent-clk", "sel-clk", "spi-clk";
 112       cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
 113       mediatek,pad-select = <1>, <0>;
 114     };