Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Microchip FPGA {Q,}SPI Controllers
   8
   9 description:
  10   SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/
  11   fabric IP cores they are based on
  12
  13 maintainers:
  14   - Conor Dooley <conor.dooley@microchip.com>
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - items:
  20           - enum:
  21               - microchip,mpfs-qspi
  22               - microchip,pic64gx-qspi
  23           - const: microchip,coreqspi-rtl-v2
  24       - const: microchip,coreqspi-rtl-v2 # FPGA QSPI
  25       - items:
  26           - const: microchip,pic64gx-spi
  27           - const: microchip,mpfs-spi
  28       - const: microchip,mpfs-spi
  29
  30   reg:
  31     maxItems: 1
  32
  33   interrupts:
  34     maxItems: 1
  35
  36   clock-names:
  37     maxItems: 1
  38
  39   clocks:
  40     maxItems: 1
  41
  42 required:
  43   - compatible
  44   - reg
  45   - interrupts
  46   - clocks
  47
  48 allOf:
  49   - $ref: spi-controller.yaml#
  50
  51   - if:
  52       properties:
  53         compatible:
  54           contains:
  55             const: microchip,mpfs-spi
  56     then:
  57       properties:
  58         num-cs:
  59           default: 1
  60
  61   - if:
  62       properties:
  63         compatible:
  64           contains:
  65             const: microchip,mpfs-spi
  66       not:
  67         required:
  68           - cs-gpios
  69     then:
  70       properties:
  71         num-cs:
  72           maximum: 1
  73
  74 unevaluatedProperties: false
  75
  76 examples:
  77   - |
  78     #include "dt-bindings/clock/microchip,mpfs-clock.h"
  79     spi@20108000 {
  80         compatible = "microchip,mpfs-spi";
  81         reg = <0x20108000 0x1000>;
  82         clocks = <&clkcfg CLK_SPI0>;
  83         interrupt-parent = <&plic>;
  84         interrupts = <54>;
  85     };
  86 ...