1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 xHCI controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
18 const: nvidia,tegra210-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
34 - description: xHCI host interrupt
35 - description: mailbox interrupt
39 - description: XUSB host clock
40 - description: XUSB host source clock
41 - description: XUSB Falcon source clock
42 - description: XUSB SuperSpeed clock
43 - description: XUSB SuperSpeed clock divider
44 - description: XUSB SuperSpeed source clock
45 - description: XUSB HighSpeed clock source
46 - description: XUSB FullSpeed clock source
47 - description: USB PLL
48 - description: reference clock
49 - description: I/O PLL
54 - const: xusb_host_src
55 - const: xusb_falcon_src
67 - description: reset for the XUSB host controller
68 - description: reset for the SuperSpeed logic
69 - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
78 $ref: /schemas/types.yaml#/definitions/phandle
79 description: phandle to the XUSB pad controller that is used to configure
80 the USB pads used by the XHCI controller
103 - description: XUSBC power domain (for Host and USB 2.0)
104 - description: XUSBA power domain (for SuperSpeed)
112 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
115 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
118 description: USB controller power supply. Must supply 3.3 V.
120 avdd-pll-utmip-supply:
121 description: UTMI PLL power supply. Must supply 1.8 V.
123 avdd-pll-uerefe-supply:
124 description: PLLE reference PLL power supply. Must supply 1.05 V.
126 dvdd-usb-ss-pll-supply:
127 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
129 hvdd-usb-ss-pll-e-supply:
130 description: High-voltage PLLE power supply. Must supply 1.8 V.
133 - $ref: usb-xhci.yaml
135 unevaluatedProperties: false
139 #include <dt-bindings/clock/tegra210-car.h>
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
143 compatible = "nvidia,tegra210-xusb";
144 reg = <0x70090000 0x8000>,
147 reg-names = "hcd", "fpci", "ipfs";
149 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
153 <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
154 <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
155 <&tegra_car TEGRA210_CLK_XUSB_SS>,
156 <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
157 <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
158 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
159 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
160 <&tegra_car TEGRA210_CLK_PLL_U_480M>,
161 <&tegra_car TEGRA210_CLK_CLK_M>,
162 <&tegra_car TEGRA210_CLK_PLL_E>;
163 clock-names = "xusb_host", "xusb_host_src",
164 "xusb_falcon_src", "xusb_ss",
165 "xusb_ss_div2", "xusb_ss_src",
166 "xusb_hs_src", "xusb_fs_src",
167 "pll_u_480m", "clk_m", "pll_e";
168 resets = <&tegra_car 89>, <&tegra_car 156>,
170 reset-names = "xusb_host", "xusb_ss", "xusb_src";
171 power-domains = <&pd_xusbhost>, <&pd_xusbss>;
172 power-domain-names = "xusb_host", "xusb_ss";
174 nvidia,xusb-padctl = <&padctl>;
176 phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
177 <&phy_pcie_6>, <&phy_pcie_5>;
178 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
180 dvddio-pex-supply = <&vdd_pex_1v05>;
181 hvddio-pex-supply = <&vdd_1v8>;
182 avdd-usb-supply = <&vdd_3v3_sys>;
183 avdd-pll-utmip-supply = <&vdd_1v8>;
184 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
185 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
186 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
188 #address-cells = <1>;
192 compatible = "usb955,9ff";