1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/mmu_context.h
5 * Copyright (C) 1996 Russell King.
8 * 27-06-1996 RMK Created
10 #ifndef __ASM_ARM_MMU_CONTEXT_H
11 #define __ASM_ARM_MMU_CONTEXT_H
13 #include <linux/compiler.h>
14 #include <linux/sched.h>
15 #include <linux/mm_types.h>
16 #include <linux/preempt.h>
18 #include <asm/cacheflush.h>
19 #include <asm/cachetype.h>
20 #include <asm/proc-fns.h>
21 #include <asm/smp_plat.h>
22 #include <asm-generic/mm_hooks.h>
24 void __check_vmalloc_seq(struct mm_struct
*mm
);
27 static inline void check_vmalloc_seq(struct mm_struct
*mm
)
29 if (!IS_ENABLED(CONFIG_ARM_LPAE
) &&
30 unlikely(atomic_read(&mm
->context
.vmalloc_seq
) !=
31 atomic_read(&init_mm
.context
.vmalloc_seq
)))
32 __check_vmalloc_seq(mm
);
36 #ifdef CONFIG_CPU_HAS_ASID
38 void check_and_switch_context(struct mm_struct
*mm
, struct task_struct
*tsk
);
40 #define init_new_context init_new_context
42 init_new_context(struct task_struct
*tsk
, struct mm_struct
*mm
)
44 atomic64_set(&mm
->context
.id
, 0);
48 #ifdef CONFIG_ARM_ERRATA_798181
49 void a15_erratum_get_cpumask(int this_cpu
, struct mm_struct
*mm
,
51 #else /* !CONFIG_ARM_ERRATA_798181 */
52 static inline void a15_erratum_get_cpumask(int this_cpu
, struct mm_struct
*mm
,
56 #endif /* CONFIG_ARM_ERRATA_798181 */
58 #else /* !CONFIG_CPU_HAS_ASID */
62 static inline void check_and_switch_context(struct mm_struct
*mm
,
63 struct task_struct
*tsk
)
65 check_vmalloc_seq(mm
);
69 * cpu_switch_mm() needs to flush the VIVT caches. To avoid
70 * high interrupt latencies, defer the call and continue
71 * running with the old mm. Since we only support UP systems
72 * on non-ASID CPUs, the old mm will remain valid until the
73 * finish_arch_post_lock_switch() call.
75 mm
->context
.switch_pending
= 1;
77 cpu_switch_mm(mm
->pgd
, mm
);
81 #define finish_arch_post_lock_switch \
82 finish_arch_post_lock_switch
83 static inline void finish_arch_post_lock_switch(void)
85 struct mm_struct
*mm
= current
->mm
;
87 if (mm
&& mm
->context
.switch_pending
) {
89 * Preemption must be disabled during cpu_switch_mm() as we
90 * have some stateful cache flush implementations. Check
91 * switch_pending again in case we were preempted and the
92 * switch to this mm was already done.
95 if (mm
->context
.switch_pending
) {
96 mm
->context
.switch_pending
= 0;
97 cpu_switch_mm(mm
->pgd
, mm
);
99 preempt_enable_no_resched();
104 #endif /* CONFIG_MMU */
106 #endif /* CONFIG_CPU_HAS_ASID */
108 #define activate_mm(prev,next) switch_mm(prev, next, NULL)
111 * This is the actual mm switch as far as the scheduler
112 * is concerned. No registers are touched. We avoid
113 * calling the CPU specific function when the mm hasn't
117 switch_mm(struct mm_struct
*prev
, struct mm_struct
*next
,
118 struct task_struct
*tsk
)
121 unsigned int cpu
= smp_processor_id();
124 * __sync_icache_dcache doesn't broadcast the I-cache invalidation,
125 * so check for possible thread migration and invalidate the I-cache
126 * if we're new to this CPU.
128 if (cache_ops_need_broadcast() &&
129 !cpumask_empty(mm_cpumask(next
)) &&
130 !cpumask_test_cpu(cpu
, mm_cpumask(next
)))
131 __flush_icache_all();
133 if (!cpumask_test_and_set_cpu(cpu
, mm_cpumask(next
)) || prev
!= next
) {
134 check_and_switch_context(next
, tsk
);
136 cpumask_clear_cpu(cpu
, mm_cpumask(prev
));
141 #ifdef CONFIG_VMAP_STACK
142 static inline void enter_lazy_tlb(struct mm_struct
*mm
, struct task_struct
*tsk
)
145 check_vmalloc_seq(mm
);
147 #define enter_lazy_tlb enter_lazy_tlb
150 #include <asm-generic/mmu_context.h>