1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/kernel/module.c
5 * Copyright (C) 2002 Russell King.
6 * Modified for nommu by Hyok S. Choi
8 * Module allocation method suggested by Andi Kleen.
10 #include <linux/module.h>
11 #include <linux/moduleloader.h>
12 #include <linux/kernel.h>
14 #include <linux/elf.h>
16 #include <linux/string.h>
18 #include <asm/sections.h>
19 #include <asm/smp_plat.h>
20 #include <asm/unwind.h>
21 #include <asm/opcodes.h>
23 bool module_init_section(const char *name
)
25 return strstarts(name
, ".init") ||
26 strstarts(name
, ".ARM.extab.init") ||
27 strstarts(name
, ".ARM.exidx.init");
30 bool module_exit_section(const char *name
)
32 return strstarts(name
, ".exit") ||
33 strstarts(name
, ".ARM.extab.exit") ||
34 strstarts(name
, ".ARM.exidx.exit");
37 #ifdef CONFIG_ARM_HAS_GROUP_RELOCS
39 * This implements the partitioning algorithm for group relocations as
40 * documented in the ARM AArch32 ELF psABI (IHI 0044).
42 * A single PC-relative symbol reference is divided in up to 3 add or subtract
43 * operations, where the final one could be incorporated into a load/store
44 * instruction with immediate offset. E.g.,
46 * ADD Rd, PC, #... or ADD Rd, PC, #...
47 * ADD Rd, Rd, #... ADD Rd, Rd, #...
48 * LDR Rd, [Rd, #...] ADD Rd, Rd, #...
50 * The latter has a guaranteed range of only 16 MiB (3x8 == 24 bits), so it is
51 * of limited use in the kernel. However, the ADD/ADD/LDR combo has a range of
52 * -/+ 256 MiB, (2x8 + 12 == 28 bits), which means it has sufficient range for
53 * any in-kernel symbol reference (unless module PLTs are being used).
55 * The main advantage of this approach over the typical pattern using a literal
56 * load is that literal loads may miss in the D-cache, and generally lead to
57 * lower cache efficiency for variables that are referenced often from many
58 * different places in the code.
60 static u32
get_group_rem(u32 group
, u32
*offset
)
65 shift
= val
? (31 - __fls(val
)) & ~1 : 32;
69 val
&= 0xffffff >> shift
;
76 apply_relocate(Elf32_Shdr
*sechdrs
, const char *strtab
, unsigned int symindex
,
77 unsigned int relindex
, struct module
*module
)
79 Elf32_Shdr
*symsec
= sechdrs
+ symindex
;
80 Elf32_Shdr
*relsec
= sechdrs
+ relindex
;
81 Elf32_Shdr
*dstsec
= sechdrs
+ relsec
->sh_info
;
82 Elf32_Rel
*rel
= (void *)relsec
->sh_addr
;
85 for (i
= 0; i
< relsec
->sh_size
/ sizeof(Elf32_Rel
); i
++, rel
++) {
89 #ifdef CONFIG_ARM_HAS_GROUP_RELOCS
94 #ifdef CONFIG_THUMB2_KERNEL
95 u32 upper
, lower
, sign
, j1
, j2
;
98 offset
= ELF32_R_SYM(rel
->r_info
);
99 if (offset
< 0 || offset
> (symsec
->sh_size
/ sizeof(Elf32_Sym
))) {
100 pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
101 module
->name
, relindex
, i
);
105 sym
= ((Elf32_Sym
*)symsec
->sh_addr
) + offset
;
106 symname
= strtab
+ sym
->st_name
;
108 if (rel
->r_offset
< 0 || rel
->r_offset
> dstsec
->sh_size
- sizeof(u32
)) {
109 pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
110 module
->name
, relindex
, i
, symname
,
111 rel
->r_offset
, dstsec
->sh_size
);
115 loc
= dstsec
->sh_addr
+ rel
->r_offset
;
117 switch (ELF32_R_TYPE(rel
->r_info
)) {
124 *(u32
*)loc
+= sym
->st_value
;
130 if (sym
->st_value
& 3) {
131 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
132 module
->name
, relindex
, i
, symname
);
136 offset
= __mem_to_opcode_arm(*(u32
*)loc
);
137 offset
= (offset
& 0x00ffffff) << 2;
138 offset
= sign_extend32(offset
, 25);
140 offset
+= sym
->st_value
- loc
;
143 * Route through a PLT entry if 'offset' exceeds the
144 * supported range. Note that 'offset + loc + 8'
145 * contains the absolute jump target, i.e.,
146 * @sym + addend, corrected for the +8 PC bias.
148 if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS
) &&
149 (offset
<= (s32
)0xfe000000 ||
150 offset
>= (s32
)0x02000000))
151 offset
= get_module_plt(module
, loc
,
155 if (offset
<= (s32
)0xfe000000 ||
156 offset
>= (s32
)0x02000000) {
157 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
158 module
->name
, relindex
, i
, symname
,
159 ELF32_R_TYPE(rel
->r_info
), loc
,
165 offset
&= 0x00ffffff;
167 *(u32
*)loc
&= __opcode_to_mem_arm(0xff000000);
168 *(u32
*)loc
|= __opcode_to_mem_arm(offset
);
172 /* Preserve Rm and the condition code. Alter
173 * other bits to re-code instruction as
176 *(u32
*)loc
&= __opcode_to_mem_arm(0xf000000f);
177 *(u32
*)loc
|= __opcode_to_mem_arm(0x01a0f000);
181 offset
= (*(s32
*)loc
<< 1) >> 1; /* sign extend */
182 offset
+= sym
->st_value
- loc
;
183 if (offset
>= 0x40000000 || offset
< -0x40000000) {
184 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
185 module
->name
, relindex
, i
, symname
,
186 ELF32_R_TYPE(rel
->r_info
), loc
,
190 *(u32
*)loc
&= 0x80000000;
191 *(u32
*)loc
|= offset
& 0x7fffffff;
195 *(u32
*)loc
+= sym
->st_value
- loc
;
198 case R_ARM_MOVW_ABS_NC
:
200 case R_ARM_MOVW_PREL_NC
:
201 case R_ARM_MOVT_PREL
:
202 offset
= tmp
= __mem_to_opcode_arm(*(u32
*)loc
);
203 offset
= ((offset
& 0xf0000) >> 4) | (offset
& 0xfff);
204 offset
= sign_extend32(offset
, 15);
206 offset
+= sym
->st_value
;
207 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_MOVT_PREL
||
208 ELF32_R_TYPE(rel
->r_info
) == R_ARM_MOVW_PREL_NC
)
210 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_MOVT_ABS
||
211 ELF32_R_TYPE(rel
->r_info
) == R_ARM_MOVT_PREL
)
215 tmp
|= ((offset
& 0xf000) << 4) |
218 *(u32
*)loc
= __opcode_to_mem_arm(tmp
);
221 #ifdef CONFIG_ARM_HAS_GROUP_RELOCS
222 case R_ARM_ALU_PC_G0_NC
:
225 case R_ARM_ALU_PC_G1_NC
:
226 tmp
= __mem_to_opcode_arm(*(u32
*)loc
);
227 offset
= ror32(tmp
& 0xff, (tmp
& 0xf00) >> 7);
230 offset
+= sym
->st_value
- loc
;
233 tmp
= (tmp
& ~BIT(23)) | BIT(22); // SUB opcode
235 tmp
= (tmp
& ~BIT(22)) | BIT(23); // ADD opcode
238 shift
= get_group_rem(group
, &offset
);
240 offset
>>= 24 - shift
;
241 offset
|= (shift
+ 8) << 7;
243 *(u32
*)loc
= __opcode_to_mem_arm((tmp
& ~0xfff) | offset
);
246 case R_ARM_LDR_PC_G2
:
247 tmp
= __mem_to_opcode_arm(*(u32
*)loc
);
248 offset
= tmp
& 0xfff;
249 if (~tmp
& BIT(23)) // U bit cleared?
251 offset
+= sym
->st_value
- loc
;
254 tmp
&= ~BIT(23); // clear U bit
256 tmp
|= BIT(23); // set U bit
258 get_group_rem(2, &offset
);
260 if (offset
> 0xfff) {
261 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
262 module
->name
, relindex
, i
, symname
,
263 ELF32_R_TYPE(rel
->r_info
), loc
,
267 *(u32
*)loc
= __opcode_to_mem_arm((tmp
& ~0xfff) | offset
);
270 #ifdef CONFIG_THUMB2_KERNEL
272 case R_ARM_THM_JUMP24
:
274 * For function symbols, only Thumb addresses are
275 * allowed (no interworking).
277 * For non-function symbols, the destination
278 * has no specific ARM/Thumb disposition, so
279 * the branch is resolved under the assumption
280 * that interworking is not required.
282 if (ELF32_ST_TYPE(sym
->st_info
) == STT_FUNC
&&
283 !(sym
->st_value
& 1)) {
284 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
285 module
->name
, relindex
, i
, symname
);
289 upper
= __mem_to_opcode_thumb16(*(u16
*)loc
);
290 lower
= __mem_to_opcode_thumb16(*(u16
*)(loc
+ 2));
293 * 25 bit signed address range (Thumb-2 BL and B.W
295 * S:I1:I2:imm10:imm11:0
297 * S = upper[10] = offset[24]
298 * I1 = ~(J1 ^ S) = offset[23]
299 * I2 = ~(J2 ^ S) = offset[22]
300 * imm10 = upper[9:0] = offset[21:12]
301 * imm11 = lower[10:0] = offset[11:1]
305 sign
= (upper
>> 10) & 1;
306 j1
= (lower
>> 13) & 1;
307 j2
= (lower
>> 11) & 1;
308 offset
= (sign
<< 24) | ((~(j1
^ sign
) & 1) << 23) |
309 ((~(j2
^ sign
) & 1) << 22) |
310 ((upper
& 0x03ff) << 12) |
311 ((lower
& 0x07ff) << 1);
312 offset
= sign_extend32(offset
, 24);
313 offset
+= sym
->st_value
- loc
;
316 * Route through a PLT entry if 'offset' exceeds the
319 if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS
) &&
320 (offset
<= (s32
)0xff000000 ||
321 offset
>= (s32
)0x01000000))
322 offset
= get_module_plt(module
, loc
,
326 if (offset
<= (s32
)0xff000000 ||
327 offset
>= (s32
)0x01000000) {
328 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
329 module
->name
, relindex
, i
, symname
,
330 ELF32_R_TYPE(rel
->r_info
), loc
,
335 sign
= (offset
>> 24) & 1;
336 j1
= sign
^ (~(offset
>> 23) & 1);
337 j2
= sign
^ (~(offset
>> 22) & 1);
338 upper
= (u16
)((upper
& 0xf800) | (sign
<< 10) |
339 ((offset
>> 12) & 0x03ff));
340 lower
= (u16
)((lower
& 0xd000) |
341 (j1
<< 13) | (j2
<< 11) |
342 ((offset
>> 1) & 0x07ff));
344 *(u16
*)loc
= __opcode_to_mem_thumb16(upper
);
345 *(u16
*)(loc
+ 2) = __opcode_to_mem_thumb16(lower
);
348 case R_ARM_THM_MOVW_ABS_NC
:
349 case R_ARM_THM_MOVT_ABS
:
350 case R_ARM_THM_MOVW_PREL_NC
:
351 case R_ARM_THM_MOVT_PREL
:
352 upper
= __mem_to_opcode_thumb16(*(u16
*)loc
);
353 lower
= __mem_to_opcode_thumb16(*(u16
*)(loc
+ 2));
356 * MOVT/MOVW instructions encoding in Thumb-2:
360 * imm3 = lower[14:12]
363 * imm16 = imm4:i:imm3:imm8
365 offset
= ((upper
& 0x000f) << 12) |
366 ((upper
& 0x0400) << 1) |
367 ((lower
& 0x7000) >> 4) | (lower
& 0x00ff);
368 offset
= sign_extend32(offset
, 15);
369 offset
+= sym
->st_value
;
371 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_MOVT_PREL
||
372 ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_MOVW_PREL_NC
)
374 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_MOVT_ABS
||
375 ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_MOVT_PREL
)
378 upper
= (u16
)((upper
& 0xfbf0) |
379 ((offset
& 0xf000) >> 12) |
380 ((offset
& 0x0800) >> 1));
381 lower
= (u16
)((lower
& 0x8f00) |
382 ((offset
& 0x0700) << 4) |
384 *(u16
*)loc
= __opcode_to_mem_thumb16(upper
);
385 *(u16
*)(loc
+ 2) = __opcode_to_mem_thumb16(lower
);
390 pr_err("%s: unknown relocation: %u\n",
391 module
->name
, ELF32_R_TYPE(rel
->r_info
));
398 static const Elf_Shdr
*find_mod_section(const Elf32_Ehdr
*hdr
,
399 const Elf_Shdr
*sechdrs
, const char *name
)
401 const Elf_Shdr
*s
, *se
;
402 const char *secstrs
= (void *)hdr
+ sechdrs
[hdr
->e_shstrndx
].sh_offset
;
404 for (s
= sechdrs
, se
= sechdrs
+ hdr
->e_shnum
; s
< se
; s
++)
405 if (strcmp(name
, secstrs
+ s
->sh_name
) == 0)
411 extern void fixup_pv_table(const void *, unsigned long);
412 extern void fixup_smp(const void *, unsigned long);
414 int module_finalize(const Elf32_Ehdr
*hdr
, const Elf_Shdr
*sechdrs
,
417 const Elf_Shdr
*s
= NULL
;
418 #ifdef CONFIG_ARM_UNWIND
419 const char *secstrs
= (void *)hdr
+ sechdrs
[hdr
->e_shstrndx
].sh_offset
;
420 const Elf_Shdr
*sechdrs_end
= sechdrs
+ hdr
->e_shnum
;
421 struct list_head
*unwind_list
= &mod
->arch
.unwind_list
;
423 INIT_LIST_HEAD(unwind_list
);
424 mod
->arch
.init_table
= NULL
;
426 for (s
= sechdrs
; s
< sechdrs_end
; s
++) {
427 const char *secname
= secstrs
+ s
->sh_name
;
429 const Elf_Shdr
*txt_sec
;
431 if (!(s
->sh_flags
& SHF_ALLOC
) ||
432 s
->sh_type
!= ELF_SECTION_UNWIND
)
435 if (!strcmp(".ARM.exidx", secname
))
438 txtname
= secname
+ strlen(".ARM.exidx");
439 txt_sec
= find_mod_section(hdr
, sechdrs
, txtname
);
442 struct unwind_table
*table
=
443 unwind_table_add(s
->sh_addr
,
448 list_add(&table
->mod_list
, unwind_list
);
450 /* save init table for module_arch_freeing_init */
451 if (strcmp(".ARM.exidx.init.text", secname
) == 0)
452 mod
->arch
.init_table
= table
;
456 #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
457 s
= find_mod_section(hdr
, sechdrs
, ".pv_table");
459 fixup_pv_table((void *)s
->sh_addr
, s
->sh_size
);
461 s
= find_mod_section(hdr
, sechdrs
, ".alt.smp.init");
463 #ifdef CONFIG_SMP_ON_UP
464 fixup_smp((void *)s
->sh_addr
, s
->sh_size
);
472 module_arch_cleanup(struct module
*mod
)
474 #ifdef CONFIG_ARM_UNWIND
475 struct unwind_table
*tmp
;
476 struct unwind_table
*n
;
478 list_for_each_entry_safe(tmp
, n
,
479 &mod
->arch
.unwind_list
, mod_list
) {
480 list_del(&tmp
->mod_list
);
481 unwind_table_del(tmp
);
483 mod
->arch
.init_table
= NULL
;
487 void __weak
module_arch_freeing_init(struct module
*mod
)
489 #ifdef CONFIG_ARM_UNWIND
490 struct unwind_table
*init
= mod
->arch
.init_table
;
493 mod
->arch
.init_table
= NULL
;
494 list_del(&init
->mod_list
);
495 unwind_table_del(init
);