1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2012 ARM Ltd.
9 #include <asm/kvm_host.h>
11 #include <asm/cpufeature.h>
12 #include <asm/sysreg.h>
14 #define RETURN_READ_PMEVCNTRN(n) \
15 return read_sysreg(pmevcntr##n##_el0)
16 static inline unsigned long read_pmevcntrn(int n
)
18 PMEVN_SWITCH(n
, RETURN_READ_PMEVCNTRN
);
22 #define WRITE_PMEVCNTRN(n) \
23 write_sysreg(val, pmevcntr##n##_el0)
24 static inline void write_pmevcntrn(int n
, unsigned long val
)
26 PMEVN_SWITCH(n
, WRITE_PMEVCNTRN
);
29 #define WRITE_PMEVTYPERN(n) \
30 write_sysreg(val, pmevtyper##n##_el0)
31 static inline void write_pmevtypern(int n
, unsigned long val
)
33 PMEVN_SWITCH(n
, WRITE_PMEVTYPERN
);
36 #define RETURN_READ_PMEVTYPERN(n) \
37 return read_sysreg(pmevtyper##n##_el0)
38 static inline unsigned long read_pmevtypern(int n
)
40 PMEVN_SWITCH(n
, RETURN_READ_PMEVTYPERN
);
44 static inline unsigned long read_pmmir(void)
46 return read_cpuid(PMMIR_EL1
);
49 static inline u32
read_pmuver(void)
51 u64 dfr0
= read_sysreg(id_aa64dfr0_el1
);
53 return cpuid_feature_extract_unsigned_field(dfr0
,
54 ID_AA64DFR0_EL1_PMUVer_SHIFT
);
57 static inline bool pmuv3_has_icntr(void)
59 u64 dfr1
= read_sysreg(id_aa64dfr1_el1
);
61 return !!cpuid_feature_extract_unsigned_field(dfr1
,
62 ID_AA64DFR1_EL1_PMICNTR_SHIFT
);
65 static inline void write_pmcr(u64 val
)
67 write_sysreg(val
, pmcr_el0
);
70 static inline u64
read_pmcr(void)
72 return read_sysreg(pmcr_el0
);
75 static inline void write_pmselr(u32 val
)
77 write_sysreg(val
, pmselr_el0
);
80 static inline void write_pmccntr(u64 val
)
82 write_sysreg(val
, pmccntr_el0
);
85 static inline u64
read_pmccntr(void)
87 return read_sysreg(pmccntr_el0
);
90 static inline void write_pmicntr(u64 val
)
92 write_sysreg_s(val
, SYS_PMICNTR_EL0
);
95 static inline u64
read_pmicntr(void)
97 return read_sysreg_s(SYS_PMICNTR_EL0
);
100 static inline void write_pmcntenset(u64 val
)
102 write_sysreg(val
, pmcntenset_el0
);
105 static inline void write_pmcntenclr(u64 val
)
107 write_sysreg(val
, pmcntenclr_el0
);
110 static inline void write_pmintenset(u64 val
)
112 write_sysreg(val
, pmintenset_el1
);
115 static inline void write_pmintenclr(u64 val
)
117 write_sysreg(val
, pmintenclr_el1
);
120 static inline void write_pmccfiltr(u64 val
)
122 write_sysreg(val
, pmccfiltr_el0
);
125 static inline u64
read_pmccfiltr(void)
127 return read_sysreg(pmccfiltr_el0
);
130 static inline void write_pmicfiltr(u64 val
)
132 write_sysreg_s(val
, SYS_PMICFILTR_EL0
);
135 static inline u64
read_pmicfiltr(void)
137 return read_sysreg_s(SYS_PMICFILTR_EL0
);
140 static inline void write_pmovsclr(u64 val
)
142 write_sysreg(val
, pmovsclr_el0
);
145 static inline u64
read_pmovsclr(void)
147 return read_sysreg(pmovsclr_el0
);
150 static inline void write_pmuserenr(u32 val
)
152 write_sysreg(val
, pmuserenr_el0
);
155 static inline void write_pmuacr(u64 val
)
157 write_sysreg_s(val
, SYS_PMUACR_EL1
);
160 static inline u64
read_pmceid0(void)
162 return read_sysreg(pmceid0_el0
);
165 static inline u64
read_pmceid1(void)
167 return read_sysreg(pmceid1_el0
);
170 static inline bool pmuv3_implemented(int pmuver
)
172 return !(pmuver
== ID_AA64DFR0_EL1_PMUVer_IMP_DEF
||
173 pmuver
== ID_AA64DFR0_EL1_PMUVer_NI
);
176 static inline bool is_pmuv3p4(int pmuver
)
178 return pmuver
>= ID_AA64DFR0_EL1_PMUVer_V3P4
;
181 static inline bool is_pmuv3p5(int pmuver
)
183 return pmuver
>= ID_AA64DFR0_EL1_PMUVer_V3P5
;
186 static inline bool is_pmuv3p9(int pmuver
)
188 return pmuver
>= ID_AA64DFR0_EL1_PMUVer_V3P9
;