arch/arm64/include/asm/hyperv-tlfs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2
   3 /*
   4  * This file contains definitions from the Hyper-V Hypervisor Top-Level
   5  * Functional Specification (TLFS):
   6  * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
   7  *
   8  * Copyright (C) 2021, Microsoft, Inc.
   9  *
  10  * Author : Michael Kelley <mikelley@microsoft.com>
  11  */
  12
  13 #ifndef _ASM_HYPERV_TLFS_H
  14 #define _ASM_HYPERV_TLFS_H
  15
  16 #include <linux/types.h>
  17
  18 /*
  19  * All data structures defined in the TLFS that are shared between Hyper-V
  20  * and a guest VM use Little Endian byte ordering.  This matches the default
  21  * byte ordering of Linux running on ARM64, so no special handling is required.
  22  */
  23
  24 /*
  25  * Group C Features. See the asm-generic version of hyperv-tlfs.h
  26  * for a description of Feature Groups.
  27  */
  28
  29 /* Crash MSRs available */
  30 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE    BIT(8)
  31
  32 /* STIMER direct mode is available */
  33 #define HV_STIMER_DIRECT_MODE_AVAILABLE         BIT(13)
  34
  35 /*
  36  * To support arch-generic code calling hv_set/get_register:
  37  * - On x86, HV_MSR_ indicates an MSR accessed via rdmsrl/wrmsrl
  38  * - On ARM, HV_MSR_ indicates a VP register accessed via hypercall
  39  */
  40 #define HV_MSR_CRASH_P0         (HV_REGISTER_GUEST_CRASH_P0)
  41 #define HV_MSR_CRASH_P1         (HV_REGISTER_GUEST_CRASH_P1)
  42 #define HV_MSR_CRASH_P2         (HV_REGISTER_GUEST_CRASH_P2)
  43 #define HV_MSR_CRASH_P3         (HV_REGISTER_GUEST_CRASH_P3)
  44 #define HV_MSR_CRASH_P4         (HV_REGISTER_GUEST_CRASH_P4)
  45 #define HV_MSR_CRASH_CTL        (HV_REGISTER_GUEST_CRASH_CTL)
  46
  47 #define HV_MSR_VP_INDEX         (HV_REGISTER_VP_INDEX)
  48 #define HV_MSR_TIME_REF_COUNT   (HV_REGISTER_TIME_REF_COUNT)
  49 #define HV_MSR_REFERENCE_TSC    (HV_REGISTER_REFERENCE_TSC)
  50
  51 #define HV_MSR_SINT0            (HV_REGISTER_SINT0)
  52 #define HV_MSR_SCONTROL         (HV_REGISTER_SCONTROL)
  53 #define HV_MSR_SIEFP            (HV_REGISTER_SIEFP)
  54 #define HV_MSR_SIMP             (HV_REGISTER_SIMP)
  55 #define HV_MSR_EOM              (HV_REGISTER_EOM)
  56
  57 #define HV_MSR_STIMER0_CONFIG   (HV_REGISTER_STIMER0_CONFIG)
  58 #define HV_MSR_STIMER0_COUNT    (HV_REGISTER_STIMER0_COUNT)
  59
  60 union hv_msi_entry {
  61         u64 as_uint64[2];
  62         struct {
  63                 u64 address;
  64                 u32 data;
  65                 u32 reserved;
  66         } __packed;
  67 };
  68
  69 #include <asm-generic/hyperv-tlfs.h>
  70
  71 #endif