1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012,2013 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 * Derived from arch/arm/kvm/guest.c:
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
8 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
11 #include <linux/bits.h>
12 #include <linux/errno.h>
13 #include <linux/err.h>
14 #include <linux/nospec.h>
15 #include <linux/kvm_host.h>
16 #include <linux/module.h>
17 #include <linux/stddef.h>
18 #include <linux/string.h>
19 #include <linux/vmalloc.h>
21 #include <kvm/arm_hypercalls.h>
22 #include <asm/cputype.h>
23 #include <linux/uaccess.h>
24 #include <asm/fpsimd.h>
26 #include <asm/kvm_emulate.h>
27 #include <asm/kvm_nested.h>
28 #include <asm/sigcontext.h>
32 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
33 KVM_GENERIC_VM_STATS()
36 const struct kvm_stats_header kvm_vm_stats_header
= {
37 .name_size
= KVM_STATS_NAME_SIZE
,
38 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
39 .id_offset
= sizeof(struct kvm_stats_header
),
40 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
41 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
42 sizeof(kvm_vm_stats_desc
),
45 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
46 KVM_GENERIC_VCPU_STATS(),
47 STATS_DESC_COUNTER(VCPU
, hvc_exit_stat
),
48 STATS_DESC_COUNTER(VCPU
, wfe_exit_stat
),
49 STATS_DESC_COUNTER(VCPU
, wfi_exit_stat
),
50 STATS_DESC_COUNTER(VCPU
, mmio_exit_user
),
51 STATS_DESC_COUNTER(VCPU
, mmio_exit_kernel
),
52 STATS_DESC_COUNTER(VCPU
, signal_exits
),
53 STATS_DESC_COUNTER(VCPU
, exits
)
56 const struct kvm_stats_header kvm_vcpu_stats_header
= {
57 .name_size
= KVM_STATS_NAME_SIZE
,
58 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
59 .id_offset
= sizeof(struct kvm_stats_header
),
60 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
61 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
62 sizeof(kvm_vcpu_stats_desc
),
65 static bool core_reg_offset_is_vreg(u64 off
)
67 return off
>= KVM_REG_ARM_CORE_REG(fp_regs
.vregs
) &&
68 off
< KVM_REG_ARM_CORE_REG(fp_regs
.fpsr
);
71 static u64
core_reg_offset_from_id(u64 id
)
73 return id
& ~(KVM_REG_ARCH_MASK
| KVM_REG_SIZE_MASK
| KVM_REG_ARM_CORE
);
76 static int core_reg_size_from_offset(const struct kvm_vcpu
*vcpu
, u64 off
)
81 case KVM_REG_ARM_CORE_REG(regs
.regs
[0]) ...
82 KVM_REG_ARM_CORE_REG(regs
.regs
[30]):
83 case KVM_REG_ARM_CORE_REG(regs
.sp
):
84 case KVM_REG_ARM_CORE_REG(regs
.pc
):
85 case KVM_REG_ARM_CORE_REG(regs
.pstate
):
86 case KVM_REG_ARM_CORE_REG(sp_el1
):
87 case KVM_REG_ARM_CORE_REG(elr_el1
):
88 case KVM_REG_ARM_CORE_REG(spsr
[0]) ...
89 KVM_REG_ARM_CORE_REG(spsr
[KVM_NR_SPSR
- 1]):
93 case KVM_REG_ARM_CORE_REG(fp_regs
.vregs
[0]) ...
94 KVM_REG_ARM_CORE_REG(fp_regs
.vregs
[31]):
95 size
= sizeof(__uint128_t
);
98 case KVM_REG_ARM_CORE_REG(fp_regs
.fpsr
):
99 case KVM_REG_ARM_CORE_REG(fp_regs
.fpcr
):
100 size
= sizeof(__u32
);
107 if (!IS_ALIGNED(off
, size
/ sizeof(__u32
)))
111 * The KVM_REG_ARM64_SVE regs must be used instead of
112 * KVM_REG_ARM_CORE for accessing the FPSIMD V-registers on
115 if (vcpu_has_sve(vcpu
) && core_reg_offset_is_vreg(off
))
121 static void *core_reg_addr(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
123 u64 off
= core_reg_offset_from_id(reg
->id
);
124 int size
= core_reg_size_from_offset(vcpu
, off
);
129 if (KVM_REG_SIZE(reg
->id
) != size
)
133 case KVM_REG_ARM_CORE_REG(regs
.regs
[0]) ...
134 KVM_REG_ARM_CORE_REG(regs
.regs
[30]):
135 off
-= KVM_REG_ARM_CORE_REG(regs
.regs
[0]);
137 return &vcpu
->arch
.ctxt
.regs
.regs
[off
];
139 case KVM_REG_ARM_CORE_REG(regs
.sp
):
140 return &vcpu
->arch
.ctxt
.regs
.sp
;
142 case KVM_REG_ARM_CORE_REG(regs
.pc
):
143 return &vcpu
->arch
.ctxt
.regs
.pc
;
145 case KVM_REG_ARM_CORE_REG(regs
.pstate
):
146 return &vcpu
->arch
.ctxt
.regs
.pstate
;
148 case KVM_REG_ARM_CORE_REG(sp_el1
):
149 return __ctxt_sys_reg(&vcpu
->arch
.ctxt
, SP_EL1
);
151 case KVM_REG_ARM_CORE_REG(elr_el1
):
152 return __ctxt_sys_reg(&vcpu
->arch
.ctxt
, ELR_EL1
);
154 case KVM_REG_ARM_CORE_REG(spsr
[KVM_SPSR_EL1
]):
155 return __ctxt_sys_reg(&vcpu
->arch
.ctxt
, SPSR_EL1
);
157 case KVM_REG_ARM_CORE_REG(spsr
[KVM_SPSR_ABT
]):
158 return &vcpu
->arch
.ctxt
.spsr_abt
;
160 case KVM_REG_ARM_CORE_REG(spsr
[KVM_SPSR_UND
]):
161 return &vcpu
->arch
.ctxt
.spsr_und
;
163 case KVM_REG_ARM_CORE_REG(spsr
[KVM_SPSR_IRQ
]):
164 return &vcpu
->arch
.ctxt
.spsr_irq
;
166 case KVM_REG_ARM_CORE_REG(spsr
[KVM_SPSR_FIQ
]):
167 return &vcpu
->arch
.ctxt
.spsr_fiq
;
169 case KVM_REG_ARM_CORE_REG(fp_regs
.vregs
[0]) ...
170 KVM_REG_ARM_CORE_REG(fp_regs
.vregs
[31]):
171 off
-= KVM_REG_ARM_CORE_REG(fp_regs
.vregs
[0]);
173 return &vcpu
->arch
.ctxt
.fp_regs
.vregs
[off
];
175 case KVM_REG_ARM_CORE_REG(fp_regs
.fpsr
):
176 return &vcpu
->arch
.ctxt
.fp_regs
.fpsr
;
178 case KVM_REG_ARM_CORE_REG(fp_regs
.fpcr
):
179 return &vcpu
->arch
.ctxt
.fp_regs
.fpcr
;
186 static int get_core_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
189 * Because the kvm_regs structure is a mix of 32, 64 and
190 * 128bit fields, we index it as if it was a 32bit
191 * array. Hence below, nr_regs is the number of entries, and
192 * off the index in the "array".
194 __u32 __user
*uaddr
= (__u32 __user
*)(unsigned long)reg
->addr
;
195 int nr_regs
= sizeof(struct kvm_regs
) / sizeof(__u32
);
199 /* Our ID is an index into the kvm_regs struct. */
200 off
= core_reg_offset_from_id(reg
->id
);
201 if (off
>= nr_regs
||
202 (off
+ (KVM_REG_SIZE(reg
->id
) / sizeof(__u32
))) >= nr_regs
)
205 addr
= core_reg_addr(vcpu
, reg
);
209 if (copy_to_user(uaddr
, addr
, KVM_REG_SIZE(reg
->id
)))
215 static int set_core_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
217 __u32 __user
*uaddr
= (__u32 __user
*)(unsigned long)reg
->addr
;
218 int nr_regs
= sizeof(struct kvm_regs
) / sizeof(__u32
);
220 void *valp
= &tmp
, *addr
;
224 /* Our ID is an index into the kvm_regs struct. */
225 off
= core_reg_offset_from_id(reg
->id
);
226 if (off
>= nr_regs
||
227 (off
+ (KVM_REG_SIZE(reg
->id
) / sizeof(__u32
))) >= nr_regs
)
230 addr
= core_reg_addr(vcpu
, reg
);
234 if (KVM_REG_SIZE(reg
->id
) > sizeof(tmp
))
237 if (copy_from_user(valp
, uaddr
, KVM_REG_SIZE(reg
->id
))) {
242 if (off
== KVM_REG_ARM_CORE_REG(regs
.pstate
)) {
243 u64 mode
= (*(u64
*)valp
) & PSR_AA32_MODE_MASK
;
245 case PSR_AA32_MODE_USR
:
246 if (!kvm_supports_32bit_el0())
249 case PSR_AA32_MODE_FIQ
:
250 case PSR_AA32_MODE_IRQ
:
251 case PSR_AA32_MODE_SVC
:
252 case PSR_AA32_MODE_ABT
:
253 case PSR_AA32_MODE_UND
:
254 case PSR_AA32_MODE_SYS
:
255 if (!vcpu_el1_is_32bit(vcpu
))
260 if (!vcpu_has_nv(vcpu
))
266 if (vcpu_el1_is_32bit(vcpu
))
275 memcpy(addr
, valp
, KVM_REG_SIZE(reg
->id
));
277 if (*vcpu_cpsr(vcpu
) & PSR_MODE32_BIT
) {
280 switch (*vcpu_cpsr(vcpu
) & PSR_AA32_MODE_MASK
) {
282 * Either we are dealing with user mode, and only the
283 * first 15 registers (+ PC) must be narrowed to 32bit.
284 * AArch32 r0-r14 conveniently map to AArch64 x0-x14.
286 case PSR_AA32_MODE_USR
:
287 case PSR_AA32_MODE_SYS
:
292 * Otherwise, this is a privileged mode, and *all* the
293 * registers must be narrowed to 32bit.
300 for (i
= 0; i
< nr_reg
; i
++)
301 vcpu_set_reg(vcpu
, i
, (u32
)vcpu_get_reg(vcpu
, i
));
303 *vcpu_pc(vcpu
) = (u32
)*vcpu_pc(vcpu
);
309 #define vq_word(vq) (((vq) - SVE_VQ_MIN) / 64)
310 #define vq_mask(vq) ((u64)1 << ((vq) - SVE_VQ_MIN) % 64)
311 #define vq_present(vqs, vq) (!!((vqs)[vq_word(vq)] & vq_mask(vq)))
313 static int get_sve_vls(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
315 unsigned int max_vq
, vq
;
316 u64 vqs
[KVM_ARM64_SVE_VLS_WORDS
];
318 if (!vcpu_has_sve(vcpu
))
321 if (WARN_ON(!sve_vl_valid(vcpu
->arch
.sve_max_vl
)))
324 memset(vqs
, 0, sizeof(vqs
));
326 max_vq
= vcpu_sve_max_vq(vcpu
);
327 for (vq
= SVE_VQ_MIN
; vq
<= max_vq
; ++vq
)
328 if (sve_vq_available(vq
))
329 vqs
[vq_word(vq
)] |= vq_mask(vq
);
331 if (copy_to_user((void __user
*)reg
->addr
, vqs
, sizeof(vqs
)))
337 static int set_sve_vls(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
339 unsigned int max_vq
, vq
;
340 u64 vqs
[KVM_ARM64_SVE_VLS_WORDS
];
342 if (!vcpu_has_sve(vcpu
))
345 if (kvm_arm_vcpu_sve_finalized(vcpu
))
346 return -EPERM
; /* too late! */
348 if (WARN_ON(vcpu
->arch
.sve_state
))
351 if (copy_from_user(vqs
, (const void __user
*)reg
->addr
, sizeof(vqs
)))
355 for (vq
= SVE_VQ_MIN
; vq
<= SVE_VQ_MAX
; ++vq
)
356 if (vq_present(vqs
, vq
))
359 if (max_vq
> sve_vq_from_vl(kvm_sve_max_vl
))
363 * Vector lengths supported by the host can't currently be
364 * hidden from the guest individually: instead we can only set a
365 * maximum via ZCR_EL2.LEN. So, make sure the available vector
366 * lengths match the set requested exactly up to the requested
369 for (vq
= SVE_VQ_MIN
; vq
<= max_vq
; ++vq
)
370 if (vq_present(vqs
, vq
) != sve_vq_available(vq
))
373 /* Can't run with no vector lengths at all: */
374 if (max_vq
< SVE_VQ_MIN
)
377 /* vcpu->arch.sve_state will be alloc'd by kvm_vcpu_finalize_sve() */
378 vcpu
->arch
.sve_max_vl
= sve_vl_from_vq(max_vq
);
383 #define SVE_REG_SLICE_SHIFT 0
384 #define SVE_REG_SLICE_BITS 5
385 #define SVE_REG_ID_SHIFT (SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS)
386 #define SVE_REG_ID_BITS 5
388 #define SVE_REG_SLICE_MASK \
389 GENMASK(SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS - 1, \
391 #define SVE_REG_ID_MASK \
392 GENMASK(SVE_REG_ID_SHIFT + SVE_REG_ID_BITS - 1, SVE_REG_ID_SHIFT)
394 #define SVE_NUM_SLICES (1 << SVE_REG_SLICE_BITS)
396 #define KVM_SVE_ZREG_SIZE KVM_REG_SIZE(KVM_REG_ARM64_SVE_ZREG(0, 0))
397 #define KVM_SVE_PREG_SIZE KVM_REG_SIZE(KVM_REG_ARM64_SVE_PREG(0, 0))
400 * Number of register slices required to cover each whole SVE register.
401 * NOTE: Only the first slice every exists, for now.
402 * If you are tempted to modify this, you must also rework sve_reg_to_region()
405 #define vcpu_sve_slices(vcpu) 1
407 /* Bounds of a single SVE register slice within vcpu->arch.sve_state */
408 struct sve_state_reg_region
{
409 unsigned int koffset
; /* offset into sve_state in kernel memory */
410 unsigned int klen
; /* length in kernel memory */
411 unsigned int upad
; /* extra trailing padding in user memory */
415 * Validate SVE register ID and get sanitised bounds for user/kernel SVE
418 static int sve_reg_to_region(struct sve_state_reg_region
*region
,
419 struct kvm_vcpu
*vcpu
,
420 const struct kvm_one_reg
*reg
)
422 /* reg ID ranges for Z- registers */
423 const u64 zreg_id_min
= KVM_REG_ARM64_SVE_ZREG(0, 0);
424 const u64 zreg_id_max
= KVM_REG_ARM64_SVE_ZREG(SVE_NUM_ZREGS
- 1,
427 /* reg ID ranges for P- registers and FFR (which are contiguous) */
428 const u64 preg_id_min
= KVM_REG_ARM64_SVE_PREG(0, 0);
429 const u64 preg_id_max
= KVM_REG_ARM64_SVE_FFR(SVE_NUM_SLICES
- 1);
432 unsigned int reg_num
;
434 unsigned int reqoffset
, reqlen
; /* User-requested offset and length */
435 unsigned int maxlen
; /* Maximum permitted length */
437 size_t sve_state_size
;
439 const u64 last_preg_id
= KVM_REG_ARM64_SVE_PREG(SVE_NUM_PREGS
- 1,
442 /* Verify that the P-regs and FFR really do have contiguous IDs: */
443 BUILD_BUG_ON(KVM_REG_ARM64_SVE_FFR(0) != last_preg_id
+ 1);
445 /* Verify that we match the UAPI header: */
446 BUILD_BUG_ON(SVE_NUM_SLICES
!= KVM_ARM64_SVE_MAX_SLICES
);
448 reg_num
= (reg
->id
& SVE_REG_ID_MASK
) >> SVE_REG_ID_SHIFT
;
450 if (reg
->id
>= zreg_id_min
&& reg
->id
<= zreg_id_max
) {
451 if (!vcpu_has_sve(vcpu
) || (reg
->id
& SVE_REG_SLICE_MASK
) > 0)
454 vq
= vcpu_sve_max_vq(vcpu
);
456 reqoffset
= SVE_SIG_ZREG_OFFSET(vq
, reg_num
) -
458 reqlen
= KVM_SVE_ZREG_SIZE
;
459 maxlen
= SVE_SIG_ZREG_SIZE(vq
);
460 } else if (reg
->id
>= preg_id_min
&& reg
->id
<= preg_id_max
) {
461 if (!vcpu_has_sve(vcpu
) || (reg
->id
& SVE_REG_SLICE_MASK
) > 0)
464 vq
= vcpu_sve_max_vq(vcpu
);
466 reqoffset
= SVE_SIG_PREG_OFFSET(vq
, reg_num
) -
468 reqlen
= KVM_SVE_PREG_SIZE
;
469 maxlen
= SVE_SIG_PREG_SIZE(vq
);
474 sve_state_size
= vcpu_sve_state_size(vcpu
);
475 if (WARN_ON(!sve_state_size
))
478 region
->koffset
= array_index_nospec(reqoffset
, sve_state_size
);
479 region
->klen
= min(maxlen
, reqlen
);
480 region
->upad
= reqlen
- region
->klen
;
485 static int get_sve_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
488 struct sve_state_reg_region region
;
489 char __user
*uptr
= (char __user
*)reg
->addr
;
491 /* Handle the KVM_REG_ARM64_SVE_VLS pseudo-reg as a special case: */
492 if (reg
->id
== KVM_REG_ARM64_SVE_VLS
)
493 return get_sve_vls(vcpu
, reg
);
495 /* Try to interpret reg ID as an architectural SVE register... */
496 ret
= sve_reg_to_region(®ion
, vcpu
, reg
);
500 if (!kvm_arm_vcpu_sve_finalized(vcpu
))
503 if (copy_to_user(uptr
, vcpu
->arch
.sve_state
+ region
.koffset
,
505 clear_user(uptr
+ region
.klen
, region
.upad
))
511 static int set_sve_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
514 struct sve_state_reg_region region
;
515 const char __user
*uptr
= (const char __user
*)reg
->addr
;
517 /* Handle the KVM_REG_ARM64_SVE_VLS pseudo-reg as a special case: */
518 if (reg
->id
== KVM_REG_ARM64_SVE_VLS
)
519 return set_sve_vls(vcpu
, reg
);
521 /* Try to interpret reg ID as an architectural SVE register... */
522 ret
= sve_reg_to_region(®ion
, vcpu
, reg
);
526 if (!kvm_arm_vcpu_sve_finalized(vcpu
))
529 if (copy_from_user(vcpu
->arch
.sve_state
+ region
.koffset
, uptr
,
536 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
541 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
546 static int copy_core_reg_indices(const struct kvm_vcpu
*vcpu
,
547 u64 __user
*uindices
)
552 for (i
= 0; i
< sizeof(struct kvm_regs
) / sizeof(__u32
); i
++) {
553 u64 reg
= KVM_REG_ARM64
| KVM_REG_ARM_CORE
| i
;
554 int size
= core_reg_size_from_offset(vcpu
, i
);
561 reg
|= KVM_REG_SIZE_U32
;
565 reg
|= KVM_REG_SIZE_U64
;
568 case sizeof(__uint128_t
):
569 reg
|= KVM_REG_SIZE_U128
;
578 if (put_user(reg
, uindices
))
589 static unsigned long num_core_regs(const struct kvm_vcpu
*vcpu
)
591 return copy_core_reg_indices(vcpu
, NULL
);
594 static const u64 timer_reg_list
[] = {
595 KVM_REG_ARM_TIMER_CTL
,
596 KVM_REG_ARM_TIMER_CNT
,
597 KVM_REG_ARM_TIMER_CVAL
,
598 KVM_REG_ARM_PTIMER_CTL
,
599 KVM_REG_ARM_PTIMER_CNT
,
600 KVM_REG_ARM_PTIMER_CVAL
,
603 #define NUM_TIMER_REGS ARRAY_SIZE(timer_reg_list)
605 static bool is_timer_reg(u64 index
)
608 case KVM_REG_ARM_TIMER_CTL
:
609 case KVM_REG_ARM_TIMER_CNT
:
610 case KVM_REG_ARM_TIMER_CVAL
:
611 case KVM_REG_ARM_PTIMER_CTL
:
612 case KVM_REG_ARM_PTIMER_CNT
:
613 case KVM_REG_ARM_PTIMER_CVAL
:
619 static int copy_timer_indices(struct kvm_vcpu
*vcpu
, u64 __user
*uindices
)
621 for (int i
= 0; i
< NUM_TIMER_REGS
; i
++) {
622 if (put_user(timer_reg_list
[i
], uindices
))
630 static int set_timer_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
632 void __user
*uaddr
= (void __user
*)(long)reg
->addr
;
636 ret
= copy_from_user(&val
, uaddr
, KVM_REG_SIZE(reg
->id
));
640 return kvm_arm_timer_set_reg(vcpu
, reg
->id
, val
);
643 static int get_timer_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
645 void __user
*uaddr
= (void __user
*)(long)reg
->addr
;
648 val
= kvm_arm_timer_get_reg(vcpu
, reg
->id
);
649 return copy_to_user(uaddr
, &val
, KVM_REG_SIZE(reg
->id
)) ? -EFAULT
: 0;
652 static unsigned long num_sve_regs(const struct kvm_vcpu
*vcpu
)
654 const unsigned int slices
= vcpu_sve_slices(vcpu
);
656 if (!vcpu_has_sve(vcpu
))
659 /* Policed by KVM_GET_REG_LIST: */
660 WARN_ON(!kvm_arm_vcpu_sve_finalized(vcpu
));
662 return slices
* (SVE_NUM_PREGS
+ SVE_NUM_ZREGS
+ 1 /* FFR */)
663 + 1; /* KVM_REG_ARM64_SVE_VLS */
666 static int copy_sve_reg_indices(const struct kvm_vcpu
*vcpu
,
667 u64 __user
*uindices
)
669 const unsigned int slices
= vcpu_sve_slices(vcpu
);
674 if (!vcpu_has_sve(vcpu
))
677 /* Policed by KVM_GET_REG_LIST: */
678 WARN_ON(!kvm_arm_vcpu_sve_finalized(vcpu
));
681 * Enumerate this first, so that userspace can save/restore in
682 * the order reported by KVM_GET_REG_LIST:
684 reg
= KVM_REG_ARM64_SVE_VLS
;
685 if (put_user(reg
, uindices
++))
689 for (i
= 0; i
< slices
; i
++) {
690 for (n
= 0; n
< SVE_NUM_ZREGS
; n
++) {
691 reg
= KVM_REG_ARM64_SVE_ZREG(n
, i
);
692 if (put_user(reg
, uindices
++))
697 for (n
= 0; n
< SVE_NUM_PREGS
; n
++) {
698 reg
= KVM_REG_ARM64_SVE_PREG(n
, i
);
699 if (put_user(reg
, uindices
++))
704 reg
= KVM_REG_ARM64_SVE_FFR(i
);
705 if (put_user(reg
, uindices
++))
714 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
715 * @vcpu: the vCPU pointer
717 * This is for all registers.
719 unsigned long kvm_arm_num_regs(struct kvm_vcpu
*vcpu
)
721 unsigned long res
= 0;
723 res
+= num_core_regs(vcpu
);
724 res
+= num_sve_regs(vcpu
);
725 res
+= kvm_arm_num_sys_reg_descs(vcpu
);
726 res
+= kvm_arm_get_fw_num_regs(vcpu
);
727 res
+= NUM_TIMER_REGS
;
733 * kvm_arm_copy_reg_indices - get indices of all registers.
734 * @vcpu: the vCPU pointer
735 * @uindices: register list to copy
737 * We do core registers right here, then we append system regs.
739 int kvm_arm_copy_reg_indices(struct kvm_vcpu
*vcpu
, u64 __user
*uindices
)
743 ret
= copy_core_reg_indices(vcpu
, uindices
);
748 ret
= copy_sve_reg_indices(vcpu
, uindices
);
753 ret
= kvm_arm_copy_fw_reg_indices(vcpu
, uindices
);
756 uindices
+= kvm_arm_get_fw_num_regs(vcpu
);
758 ret
= copy_timer_indices(vcpu
, uindices
);
761 uindices
+= NUM_TIMER_REGS
;
763 return kvm_arm_copy_sys_reg_indices(vcpu
, uindices
);
766 int kvm_arm_get_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
768 /* We currently use nothing arch-specific in upper 32 bits */
769 if ((reg
->id
& ~KVM_REG_SIZE_MASK
) >> 32 != KVM_REG_ARM64
>> 32)
772 switch (reg
->id
& KVM_REG_ARM_COPROC_MASK
) {
773 case KVM_REG_ARM_CORE
: return get_core_reg(vcpu
, reg
);
775 case KVM_REG_ARM_FW_FEAT_BMAP
:
776 return kvm_arm_get_fw_reg(vcpu
, reg
);
777 case KVM_REG_ARM64_SVE
: return get_sve_reg(vcpu
, reg
);
780 if (is_timer_reg(reg
->id
))
781 return get_timer_reg(vcpu
, reg
);
783 return kvm_arm_sys_reg_get_reg(vcpu
, reg
);
786 int kvm_arm_set_reg(struct kvm_vcpu
*vcpu
, const struct kvm_one_reg
*reg
)
788 /* We currently use nothing arch-specific in upper 32 bits */
789 if ((reg
->id
& ~KVM_REG_SIZE_MASK
) >> 32 != KVM_REG_ARM64
>> 32)
792 switch (reg
->id
& KVM_REG_ARM_COPROC_MASK
) {
793 case KVM_REG_ARM_CORE
: return set_core_reg(vcpu
, reg
);
795 case KVM_REG_ARM_FW_FEAT_BMAP
:
796 return kvm_arm_set_fw_reg(vcpu
, reg
);
797 case KVM_REG_ARM64_SVE
: return set_sve_reg(vcpu
, reg
);
800 if (is_timer_reg(reg
->id
))
801 return set_timer_reg(vcpu
, reg
);
803 return kvm_arm_sys_reg_set_reg(vcpu
, reg
);
806 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
807 struct kvm_sregs
*sregs
)
812 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
813 struct kvm_sregs
*sregs
)
818 int __kvm_arm_vcpu_get_events(struct kvm_vcpu
*vcpu
,
819 struct kvm_vcpu_events
*events
)
821 events
->exception
.serror_pending
= !!(vcpu
->arch
.hcr_el2
& HCR_VSE
);
822 events
->exception
.serror_has_esr
= cpus_have_final_cap(ARM64_HAS_RAS_EXTN
);
824 if (events
->exception
.serror_pending
&& events
->exception
.serror_has_esr
)
825 events
->exception
.serror_esr
= vcpu_get_vsesr(vcpu
);
828 * We never return a pending ext_dabt here because we deliver it to
829 * the virtual CPU directly when setting the event and it's no longer
830 * 'pending' at this point.
836 int __kvm_arm_vcpu_set_events(struct kvm_vcpu
*vcpu
,
837 struct kvm_vcpu_events
*events
)
839 bool serror_pending
= events
->exception
.serror_pending
;
840 bool has_esr
= events
->exception
.serror_has_esr
;
841 bool ext_dabt_pending
= events
->exception
.ext_dabt_pending
;
843 if (serror_pending
&& has_esr
) {
844 if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN
))
847 if (!((events
->exception
.serror_esr
) & ~ESR_ELx_ISS_MASK
))
848 kvm_set_sei_esr(vcpu
, events
->exception
.serror_esr
);
851 } else if (serror_pending
) {
852 kvm_inject_vabt(vcpu
);
855 if (ext_dabt_pending
)
856 kvm_inject_dabt(vcpu
, kvm_vcpu_get_hfar(vcpu
));
861 u32 __attribute_const__
kvm_target_cpu(void)
863 unsigned long implementor
= read_cpuid_implementor();
864 unsigned long part_number
= read_cpuid_part_number();
866 switch (implementor
) {
867 case ARM_CPU_IMP_ARM
:
868 switch (part_number
) {
869 case ARM_CPU_PART_AEM_V8
:
870 return KVM_ARM_TARGET_AEM_V8
;
871 case ARM_CPU_PART_FOUNDATION
:
872 return KVM_ARM_TARGET_FOUNDATION_V8
;
873 case ARM_CPU_PART_CORTEX_A53
:
874 return KVM_ARM_TARGET_CORTEX_A53
;
875 case ARM_CPU_PART_CORTEX_A57
:
876 return KVM_ARM_TARGET_CORTEX_A57
;
879 case ARM_CPU_IMP_APM
:
880 switch (part_number
) {
881 case APM_CPU_PART_XGENE
:
882 return KVM_ARM_TARGET_XGENE_POTENZA
;
887 /* Return a default generic target */
888 return KVM_ARM_TARGET_GENERIC_V8
;
891 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
896 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
901 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
902 struct kvm_translation
*tr
)
908 * kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
909 * @vcpu: the vCPU pointer
910 * @dbg: the ioctl data buffer
912 * This sets up and enables the VM for guest debugging. Userspace
913 * passes in a control flag to enable different debug types and
914 * potentially other architecture specific information in the rest of
917 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
918 struct kvm_guest_debug
*dbg
)
922 trace_kvm_set_guest_debug(vcpu
, dbg
->control
);
924 if (dbg
->control
& ~KVM_GUESTDBG_VALID_MASK
) {
929 if (dbg
->control
& KVM_GUESTDBG_ENABLE
) {
930 vcpu
->guest_debug
= dbg
->control
;
932 /* Hardware assisted Break and Watch points */
933 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW
) {
934 vcpu
->arch
.external_debug_state
= dbg
->arch
;
938 /* If not enabled clear all flags */
939 vcpu
->guest_debug
= 0;
940 vcpu_clear_flag(vcpu
, DBG_SS_ACTIVE_PENDING
);
947 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu
*vcpu
,
948 struct kvm_device_attr
*attr
)
952 switch (attr
->group
) {
953 case KVM_ARM_VCPU_PMU_V3_CTRL
:
954 mutex_lock(&vcpu
->kvm
->arch
.config_lock
);
955 ret
= kvm_arm_pmu_v3_set_attr(vcpu
, attr
);
956 mutex_unlock(&vcpu
->kvm
->arch
.config_lock
);
958 case KVM_ARM_VCPU_TIMER_CTRL
:
959 ret
= kvm_arm_timer_set_attr(vcpu
, attr
);
961 case KVM_ARM_VCPU_PVTIME_CTRL
:
962 ret
= kvm_arm_pvtime_set_attr(vcpu
, attr
);
972 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu
*vcpu
,
973 struct kvm_device_attr
*attr
)
977 switch (attr
->group
) {
978 case KVM_ARM_VCPU_PMU_V3_CTRL
:
979 ret
= kvm_arm_pmu_v3_get_attr(vcpu
, attr
);
981 case KVM_ARM_VCPU_TIMER_CTRL
:
982 ret
= kvm_arm_timer_get_attr(vcpu
, attr
);
984 case KVM_ARM_VCPU_PVTIME_CTRL
:
985 ret
= kvm_arm_pvtime_get_attr(vcpu
, attr
);
995 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu
*vcpu
,
996 struct kvm_device_attr
*attr
)
1000 switch (attr
->group
) {
1001 case KVM_ARM_VCPU_PMU_V3_CTRL
:
1002 ret
= kvm_arm_pmu_v3_has_attr(vcpu
, attr
);
1004 case KVM_ARM_VCPU_TIMER_CTRL
:
1005 ret
= kvm_arm_timer_has_attr(vcpu
, attr
);
1007 case KVM_ARM_VCPU_PVTIME_CTRL
:
1008 ret
= kvm_arm_pvtime_has_attr(vcpu
, attr
);
1018 int kvm_vm_ioctl_mte_copy_tags(struct kvm
*kvm
,
1019 struct kvm_arm_copy_mte_tags
*copy_tags
)
1021 gpa_t guest_ipa
= copy_tags
->guest_ipa
;
1022 size_t length
= copy_tags
->length
;
1023 void __user
*tags
= copy_tags
->addr
;
1025 bool write
= !(copy_tags
->flags
& KVM_ARM_TAGS_FROM_GUEST
);
1028 if (!kvm_has_mte(kvm
))
1031 if (copy_tags
->reserved
[0] || copy_tags
->reserved
[1])
1034 if (copy_tags
->flags
& ~KVM_ARM_TAGS_FROM_GUEST
)
1037 if (length
& ~PAGE_MASK
|| guest_ipa
& ~PAGE_MASK
)
1040 /* Lengths above INT_MAX cannot be represented in the return value */
1041 if (length
> INT_MAX
)
1044 gfn
= gpa_to_gfn(guest_ipa
);
1046 mutex_lock(&kvm
->slots_lock
);
1048 if (write
&& atomic_read(&kvm
->nr_memslots_dirty_logging
)) {
1053 while (length
> 0) {
1054 struct page
*page
= __gfn_to_page(kvm
, gfn
, write
);
1056 unsigned long num_tags
;
1057 struct folio
*folio
;
1064 if (!pfn_to_online_page(page_to_pfn(page
))) {
1065 /* Reject ZONE_DEVICE memory */
1066 kvm_release_page_unused(page
);
1070 folio
= page_folio(page
);
1071 maddr
= page_address(page
);
1074 if ((folio_test_hugetlb(folio
) &&
1075 folio_test_hugetlb_mte_tagged(folio
)) ||
1076 page_mte_tagged(page
))
1077 num_tags
= mte_copy_tags_to_user(tags
, maddr
,
1078 MTE_GRANULES_PER_PAGE
);
1080 /* No tags in memory, so write zeros */
1081 num_tags
= MTE_GRANULES_PER_PAGE
-
1082 clear_user(tags
, MTE_GRANULES_PER_PAGE
);
1083 kvm_release_page_clean(page
);
1086 * Only locking to serialise with a concurrent
1087 * __set_ptes() in the VMM but still overriding the
1088 * tags, hence ignoring the return value.
1090 if (folio_test_hugetlb(folio
))
1091 folio_try_hugetlb_mte_tagging(folio
);
1093 try_page_mte_tagging(page
);
1094 num_tags
= mte_copy_tags_from_user(maddr
, tags
,
1095 MTE_GRANULES_PER_PAGE
);
1097 /* uaccess failed, don't leave stale tags */
1098 if (num_tags
!= MTE_GRANULES_PER_PAGE
)
1099 mte_clear_page_tags(maddr
);
1100 if (folio_test_hugetlb(folio
))
1101 folio_set_hugetlb_mte_tagged(folio
);
1103 set_page_mte_tagged(page
);
1105 kvm_release_page_dirty(page
);
1108 if (num_tags
!= MTE_GRANULES_PER_PAGE
) {
1115 length
-= PAGE_SIZE
;
1119 mutex_unlock(&kvm
->slots_lock
);
1120 /* If some data has been copied report the number of bytes copied */
1121 if (length
!= copy_tags
->length
)
1122 return copy_tags
->length
- length
;