arch/csky/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 config CSKY
   3         def_bool y
   4         select ARCH_32BIT_OFF_T
   5         select ARCH_HAS_CPU_CACHE_ALIASING
   6         select ARCH_HAS_DMA_PREP_COHERENT
   7         select ARCH_HAS_GCOV_PROFILE_ALL
   8         select ARCH_HAS_SYNC_DMA_FOR_CPU
   9         select ARCH_HAS_SYNC_DMA_FOR_DEVICE
  10         select ARCH_USE_BUILTIN_BSWAP
  11         select ARCH_USE_QUEUED_RWLOCKS
  12         select ARCH_USE_QUEUED_SPINLOCKS
  13         select ARCH_HAS_CURRENT_STACK_POINTER
  14         select ARCH_INLINE_READ_LOCK if !PREEMPTION
  15         select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
  16         select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
  17         select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
  18         select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
  19         select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
  20         select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
  21         select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
  22         select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
  23         select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
  24         select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
  25         select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
  26         select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
  27         select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
  28         select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
  29         select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
  30         select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
  31         select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
  32         select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
  33         select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
  34         select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
  35         select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
  36         select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
  37         select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
  38         select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
  39         select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
  40         select ARCH_NEED_CMPXCHG_1_EMU
  41         select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
  42         select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
  43         select COMMON_CLK
  44         select CLKSRC_MMIO
  45         select CSKY_MPINTC if CPU_CK860
  46         select CSKY_MP_TIMER if CPU_CK860
  47         select CSKY_APB_INTC
  48         select DMA_DIRECT_REMAP
  49         select IRQ_DOMAIN
  50         select DW_APB_TIMER_OF
  51         select GENERIC_IOREMAP
  52         select GENERIC_LIB_ASHLDI3
  53         select GENERIC_LIB_ASHRDI3
  54         select GENERIC_LIB_LSHRDI3
  55         select GENERIC_LIB_MULDI3
  56         select GENERIC_LIB_CMPDI2
  57         select GENERIC_LIB_UCMPDI2
  58         select GENERIC_ALLOCATOR
  59         select GENERIC_ATOMIC64
  60         select GENERIC_CPU_DEVICES
  61         select GENERIC_IRQ_CHIP
  62         select GENERIC_IRQ_PROBE
  63         select GENERIC_IRQ_SHOW
  64         select GENERIC_IRQ_MULTI_HANDLER
  65         select GENERIC_SCHED_CLOCK
  66         select GENERIC_SMP_IDLE_THREAD
  67         select GX6605S_TIMER if CPU_CK610
  68         select HAVE_ARCH_TRACEHOOK
  69         select HAVE_ARCH_AUDITSYSCALL
  70         select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
  71         select HAVE_ARCH_JUMP_LABEL_RELATIVE
  72         select HAVE_ARCH_MMAP_RND_BITS
  73         select HAVE_ARCH_SECCOMP_FILTER
  74         select HAVE_CONTEXT_TRACKING_USER
  75         select HAVE_VIRT_CPU_ACCOUNTING_GEN
  76         select HAVE_DEBUG_BUGVERBOSE
  77         select HAVE_DEBUG_KMEMLEAK
  78         select HAVE_DYNAMIC_FTRACE
  79         select HAVE_DYNAMIC_FTRACE_WITH_REGS
  80         select HAVE_FUNCTION_TRACER
  81         select HAVE_FUNCTION_GRAPH_TRACER
  82         select HAVE_FUNCTION_ERROR_INJECTION
  83         select HAVE_FTRACE_MCOUNT_RECORD
  84         select HAVE_KERNEL_GZIP
  85         select HAVE_KERNEL_LZO
  86         select HAVE_KERNEL_LZMA
  87         select HAVE_KPROBES if !CPU_CK610
  88         select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
  89         select HAVE_KRETPROBES if !CPU_CK610
  90         select HAVE_PAGE_SIZE_4KB
  91         select HAVE_PERF_EVENTS
  92         select HAVE_PERF_REGS
  93         select HAVE_PERF_USER_STACK_DUMP
  94         select HAVE_DMA_CONTIGUOUS
  95         select HAVE_REGS_AND_STACK_ACCESS_API
  96         select HAVE_STACKPROTECTOR
  97         select HAVE_SYSCALL_TRACEPOINTS
  98         select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
  99         select LOCK_MM_AND_FIND_VMA
 100         select MAY_HAVE_SPARSE_IRQ
 101         select MODULES_USE_ELF_RELA if MODULES
 102         select OF
 103         select OF_EARLY_FLATTREE
 104         select PERF_USE_VMALLOC if CPU_CK610
 105         select RTC_LIB
 106         select TIMER_OF
 107         select GENERIC_PCI_IOMAP
 108         select HAVE_PCI
 109         select PCI_DOMAINS_GENERIC if PCI
 110         select PCI_SYSCALL if PCI
 111         select PCI_MSI if PCI
 112         select TRACE_IRQFLAGS_SUPPORT
 113
 114 config LOCKDEP_SUPPORT
 115         def_bool y
 116
 117 config ARCH_SUPPORTS_UPROBES
 118         def_bool y if !CPU_CK610
 119
 120 config CPU_HAS_CACHEV2
 121         bool
 122
 123 config CPU_HAS_FPUV2
 124         bool
 125
 126 config CPU_HAS_HILO
 127         bool
 128
 129 config CPU_HAS_TLBI
 130         bool
 131
 132 config CPU_HAS_LDSTEX
 133         bool
 134         help
 135           For SMP, CPU needs "ldex&stex" instructions for atomic operations.
 136
 137 config CPU_NEED_TLBSYNC
 138         bool
 139
 140 config CPU_NEED_SOFTALIGN
 141         bool
 142
 143 config CPU_NO_USER_BKPT
 144         bool
 145         help
 146           For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
 147           abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
 148           So we need a 16bit instruction as user space bkpt, and it will cause an illegal
 149           instruction exception.
 150           In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
 151
 152 config GENERIC_CALIBRATE_DELAY
 153         def_bool y
 154
 155 config GENERIC_CSUM
 156         def_bool y
 157
 158 config GENERIC_HWEIGHT
 159         def_bool y
 160
 161 config MMU
 162         def_bool y
 163
 164 config STACKTRACE_SUPPORT
 165         def_bool y
 166
 167 config TIME_LOW_RES
 168         def_bool y
 169
 170 config CPU_ASID_BITS
 171         int
 172         default "8"     if (CPU_CK610 || CPU_CK807 || CPU_CK810)
 173         default "12"    if (CPU_CK860)
 174
 175 config L1_CACHE_SHIFT
 176         int
 177         default "4"     if (CPU_CK610)
 178         default "5"     if (CPU_CK807 || CPU_CK810)
 179         default "6"     if (CPU_CK860)
 180
 181 config ARCH_MMAP_RND_BITS_MIN
 182         default 8
 183
 184 # max bits determined by the following formula:
 185 #  VA_BITS - PAGE_SHIFT - 3
 186 config ARCH_MMAP_RND_BITS_MAX
 187         default 17
 188
 189 menu "Processor type and features"
 190
 191 choice
 192         prompt "CPU MODEL"
 193         default CPU_CK807
 194
 195 config CPU_CK610
 196         bool "CSKY CPU ck610"
 197         select CPU_NEED_TLBSYNC
 198         select CPU_NEED_SOFTALIGN
 199         select CPU_NO_USER_BKPT
 200
 201 config CPU_CK810
 202         bool "CSKY CPU ck810"
 203         select CPU_HAS_HILO
 204         select CPU_NEED_TLBSYNC
 205
 206 config CPU_CK807
 207         bool "CSKY CPU ck807"
 208         select CPU_HAS_HILO
 209
 210 config CPU_CK860
 211         bool "CSKY CPU ck860"
 212         select CPU_HAS_TLBI
 213         select CPU_HAS_CACHEV2
 214         select CPU_HAS_LDSTEX
 215         select CPU_HAS_FPUV2
 216 endchoice
 217
 218 choice
 219         prompt "PAGE OFFSET"
 220         default PAGE_OFFSET_80000000
 221
 222 config PAGE_OFFSET_80000000
 223         bool "PAGE OFFSET 2G (user:kernel = 2:2)"
 224
 225 config PAGE_OFFSET_A0000000
 226         bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
 227 endchoice
 228
 229 config PAGE_OFFSET
 230         hex
 231         default 0x80000000 if PAGE_OFFSET_80000000
 232         default 0xa0000000 if PAGE_OFFSET_A0000000
 233 choice
 234
 235         prompt "C-SKY PMU type"
 236         depends on PERF_EVENTS
 237         depends on CPU_CK807 || CPU_CK810 || CPU_CK860
 238
 239 config CPU_PMU_NONE
 240         bool "None"
 241
 242 config CSKY_PMU_V1
 243         bool "Performance Monitoring Unit Ver.1"
 244
 245 endchoice
 246
 247 choice
 248         prompt "Power Manager Instruction (wait/doze/stop)"
 249         default CPU_PM_NONE
 250
 251 config CPU_PM_NONE
 252         bool "None"
 253
 254 config CPU_PM_WAIT
 255         bool "wait"
 256
 257 config CPU_PM_DOZE
 258         bool "doze"
 259
 260 config CPU_PM_STOP
 261         bool "stop"
 262 endchoice
 263
 264 menuconfig HAVE_TCM
 265         bool "Tightly-Coupled/Sram Memory"
 266         depends on !COMPILE_TEST
 267         help
 268           The implementation are not only used by TCM (Tightly-Coupled Memory)
 269           but also used by sram on SOC bus. It follow existed linux tcm
 270           software interface, so that old tcm application codes could be
 271           re-used directly.
 272
 273 if HAVE_TCM
 274 config ITCM_RAM_BASE
 275         hex "ITCM ram base"
 276         default 0xffffffff
 277
 278 config ITCM_NR_PAGES
 279         int "Page count of ITCM size: NR*4KB"
 280         range 1 256
 281         default 32
 282
 283 config HAVE_DTCM
 284         bool "DTCM Support"
 285
 286 config DTCM_RAM_BASE
 287         hex "DTCM ram base"
 288         depends on HAVE_DTCM
 289         default 0xffffffff
 290
 291 config DTCM_NR_PAGES
 292         int "Page count of DTCM size: NR*4KB"
 293         depends on HAVE_DTCM
 294         range 1 256
 295         default 32
 296 endif
 297
 298 config CPU_HAS_VDSP
 299         bool "CPU has VDSP coprocessor"
 300         depends on CPU_HAS_FPU && CPU_HAS_FPUV2
 301
 302 config CPU_HAS_FPU
 303         bool "CPU has FPU coprocessor"
 304         depends on CPU_CK807 || CPU_CK810 || CPU_CK860
 305
 306 config CPU_HAS_ICACHE_INS
 307         bool "CPU has Icache invalidate instructions"
 308         depends on CPU_HAS_CACHEV2
 309
 310 config CPU_HAS_TEE
 311         bool "CPU has Trusted Execution Environment"
 312         depends on CPU_CK810
 313
 314 config SMP
 315         bool "Symmetric Multi-Processing (SMP) support for C-SKY"
 316         depends on CPU_CK860
 317         default n
 318
 319 config NR_CPUS
 320         int "Maximum number of CPUs (2-32)"
 321         range 2 32
 322         depends on SMP
 323         default "4"
 324
 325 config HIGHMEM
 326         bool "High Memory Support"
 327         depends on !CPU_CK610
 328         select KMAP_LOCAL
 329         default y
 330
 331 config DRAM_BASE
 332         hex "DRAM start addr (the same with memory-section in dts)"
 333         default 0x0
 334
 335 config HOTPLUG_CPU
 336         bool "Support for hot-pluggable CPUs"
 337         select GENERIC_IRQ_MIGRATION
 338         depends on SMP
 339         help
 340           Say Y here to allow turning CPUs off and on. CPUs can be
 341           controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
 342
 343           Say N if you want to disable CPU hotplug.
 344
 345 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
 346         bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
 347         depends on CPU_CK807 || CPU_CK810 || CPU_CK860
 348         help
 349           Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
 350           deal with unaligned access by hardware.
 351
 352 endmenu
 353
 354 source "arch/csky/Kconfig.platforms"
 355
 356 source "kernel/Kconfig.hz"