1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
8 #include <linux/irqdomain.h>
9 #include <linux/irqreturn.h>
11 #define IRQ_STACK_SIZE THREAD_SIZE
12 #define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
14 DECLARE_PER_CPU(unsigned long, irq_stack
);
17 * The highest address on the IRQ stack contains a dummy frame which is
18 * structured as follows:
21 * | task sp | <- irq_stack[cpu] + IRQ_STACK_START
23 * | | <- First frame of IRQ context
26 * task sp holds a copy of the task stack pointer where the struct pt_regs
27 * from exception entry can be found.
30 static inline bool on_irq_stack(int cpu
, unsigned long sp
)
32 unsigned long low
= per_cpu(irq_stack
, cpu
);
33 unsigned long high
= low
+ IRQ_STACK_SIZE
;
35 return (low
<= sp
&& sp
<= high
);
38 void spurious_interrupt(void);
40 #define NR_IRQS_LEGACY 16
43 * 256 Vectors Mapping for AVECINTC:
45 * 0 - 15: Mapping classic IPs, e.g. IP0-12.
46 * 16 - 255: Mapping vectors for external IRQ.
49 #define NR_VECTORS 256
50 #define NR_LEGACY_VECTORS 16
51 #define IRQ_MATRIX_BITS NR_VECTORS
53 #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
54 void arch_trigger_cpumask_backtrace(const struct cpumask
*mask
, int exclude_cpu
);
57 #define NR_IRQS (64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS))
59 struct acpi_vector_group
{
62 struct irq_domain
*parent
;
64 extern struct acpi_vector_group pch_group
[MAX_IO_PICS
];
65 extern struct acpi_vector_group msi_group
[MAX_IO_PICS
];
67 #define CORES_PER_EIO_NODE 4
68 #define CORES_PER_VEIO_NODE 256
70 #define LOONGSON_CPU_UART0_VEC 10 /* CPU UART0 */
71 #define LOONGSON_CPU_THSENS_VEC 14 /* CPU Thsens */
72 #define LOONGSON_CPU_HT0_VEC 16 /* CPU HT0 irq vector base number */
73 #define LOONGSON_CPU_HT1_VEC 24 /* CPU HT1 irq vector base number */
75 /* IRQ number definitions */
76 #define LOONGSON_LPC_IRQ_BASE 0
77 #define LOONGSON_LPC_LAST_IRQ (LOONGSON_LPC_IRQ_BASE + 15)
79 #define LOONGSON_CPU_IRQ_BASE 16
80 #define LOONGSON_CPU_LAST_IRQ (LOONGSON_CPU_IRQ_BASE + 15)
82 #define LOONGSON_PCH_IRQ_BASE 64
83 #define LOONGSON_PCH_ACPI_IRQ (LOONGSON_PCH_IRQ_BASE + 47)
84 #define LOONGSON_PCH_LAST_IRQ (LOONGSON_PCH_IRQ_BASE + 64 - 1)
86 #define LOONGSON_MSI_IRQ_BASE (LOONGSON_PCH_IRQ_BASE + 64)
87 #define LOONGSON_MSI_LAST_IRQ (LOONGSON_PCH_IRQ_BASE + 256 - 1)
89 #define GSI_MIN_LPC_IRQ LOONGSON_LPC_IRQ_BASE
90 #define GSI_MAX_LPC_IRQ (LOONGSON_LPC_IRQ_BASE + 16 - 1)
91 #define GSI_MIN_CPU_IRQ LOONGSON_CPU_IRQ_BASE
92 #define GSI_MAX_CPU_IRQ (LOONGSON_CPU_IRQ_BASE + 48 - 1)
93 #define GSI_MIN_PCH_IRQ LOONGSON_PCH_IRQ_BASE
94 #define GSI_MAX_PCH_IRQ (LOONGSON_PCH_IRQ_BASE + 256 - 1)
96 struct acpi_madt_lio_pic
;
97 struct acpi_madt_eio_pic
;
98 struct acpi_madt_ht_pic
;
99 struct acpi_madt_bio_pic
;
100 struct acpi_madt_msi_pic
;
101 struct acpi_madt_lpc_pic
;
103 void complete_irq_moving(void);
105 struct fwnode_handle
*get_pch_msi_handle(int pci_segment
);
107 extern struct acpi_madt_lio_pic
*acpi_liointc
;
108 extern struct acpi_madt_eio_pic
*acpi_eiointc
[MAX_IO_PICS
];
110 extern struct acpi_madt_ht_pic
*acpi_htintc
;
111 extern struct acpi_madt_lpc_pic
*acpi_pchlpc
;
112 extern struct acpi_madt_msi_pic
*acpi_pchmsi
[MAX_IO_PICS
];
113 extern struct acpi_madt_bio_pic
*acpi_pchpic
[MAX_IO_PICS
];
115 extern struct fwnode_handle
*cpuintc_handle
;
116 extern struct fwnode_handle
*liointc_handle
;
117 extern struct fwnode_handle
*pch_lpc_handle
;
118 extern struct fwnode_handle
*pch_pic_handle
[MAX_IO_PICS
];
120 static inline int get_percpu_irq(int vector
)
122 struct irq_domain
*d
;
124 d
= irq_find_matching_fwnode(cpuintc_handle
, DOMAIN_BUS_ANY
);
126 return irq_create_mapping(d
, vector
);
131 #include <asm-generic/irq.h>
133 #endif /* _ASM_IRQ_H */