arch/m68k/mac/oss.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *      Operating System Services (OSS) chip handling
   4  *      Written by Joshua M. Thompson (funaho@jurai.org)
   5  *
   6  *
   7  *      This chip is used in the IIfx in place of VIA #2. It acts like a fancy
   8  *      VIA chip with prorammable interrupt levels.
   9  *
  10  * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
  11  *                recent insights into OSS operational details.
  12  * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
  13  *                to mostly match the A/UX interrupt scheme supported on the
  14  *                VIA side. Also added support for enabling the ISM irq again
  15  *                since we now have a functional IOP manager.
  16  */
  17
  18 #include <linux/types.h>
  19 #include <linux/kernel.h>
  20 #include <linux/mm.h>
  21 #include <linux/delay.h>
  22 #include <linux/init.h>
  23 #include <linux/irq.h>
  24
  25 #include <asm/macintosh.h>
  26 #include <asm/macints.h>
  27 #include <asm/mac_via.h>
  28 #include <asm/mac_oss.h>
  29
  30 #include "mac.h"
  31
  32 int oss_present;
  33 volatile struct mac_oss *oss;
  34
  35 /*
  36  * Initialize the OSS
  37  */
  38
  39 void __init oss_init(void)
  40 {
  41         int i;
  42
  43         if (macintosh_config->ident != MAC_MODEL_IIFX)
  44                 return;
  45
  46         oss = (struct mac_oss *) OSS_BASE;
  47         pr_debug("OSS detected at %p", oss);
  48         oss_present = 1;
  49
  50         /* Disable all interrupts. Unlike a VIA it looks like we    */
  51         /* do this by setting the source's interrupt level to zero. */
  52
  53         for (i = 0; i < OSS_NUM_SOURCES; i++)
  54                 oss->irq_level[i] = 0;
  55 }
  56
  57 /*
  58  * Handle OSS interrupts.
  59  * XXX how do you clear a pending IRQ? is it even necessary?
  60  */
  61
  62 static void oss_iopism_irq(struct irq_desc *desc)
  63 {
  64         generic_handle_irq(IRQ_MAC_ADB);
  65 }
  66
  67 static void oss_scsi_irq(struct irq_desc *desc)
  68 {
  69         generic_handle_irq(IRQ_MAC_SCSI);
  70 }
  71
  72 static void oss_nubus_irq(struct irq_desc *desc)
  73 {
  74         u16 events, irq_bit;
  75         int irq_num;
  76
  77         events = oss->irq_pending & OSS_IP_NUBUS;
  78         irq_num = NUBUS_SOURCE_BASE + 5;
  79         irq_bit = OSS_IP_NUBUS5;
  80         do {
  81                 if (events & irq_bit) {
  82                         events &= ~irq_bit;
  83                         generic_handle_irq(irq_num);
  84                 }
  85                 --irq_num;
  86                 irq_bit >>= 1;
  87         } while (events);
  88 }
  89
  90 static void oss_iopscc_irq(struct irq_desc *desc)
  91 {
  92         generic_handle_irq(IRQ_MAC_SCC);
  93 }
  94
  95 /*
  96  * Register the OSS and NuBus interrupt dispatchers.
  97  *
  98  * This IRQ mapping is laid out with two things in mind: first, we try to keep
  99  * things on their own levels to avoid having to do double-dispatches. Second,
 100  * the levels match as closely as possible the alternate IRQ mapping mode (aka
 101  * "A/UX mode") available on some VIA machines.
 102  */
 103
 104 #define OSS_IRQLEV_IOPISM    IRQ_AUTO_1
 105 #define OSS_IRQLEV_SCSI      IRQ_AUTO_2
 106 #define OSS_IRQLEV_NUBUS     IRQ_AUTO_3
 107 #define OSS_IRQLEV_IOPSCC    IRQ_AUTO_4
 108 #define OSS_IRQLEV_VIA1      IRQ_AUTO_6
 109
 110 void __init oss_register_interrupts(void)
 111 {
 112         irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_iopism_irq);
 113         irq_set_chained_handler(OSS_IRQLEV_SCSI,   oss_scsi_irq);
 114         irq_set_chained_handler(OSS_IRQLEV_NUBUS,  oss_nubus_irq);
 115         irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_iopscc_irq);
 116         irq_set_chained_handler(OSS_IRQLEV_VIA1,   via1_irq);
 117
 118         /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
 119         oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
 120 }
 121
 122 /*
 123  * Enable an OSS interrupt
 124  *
 125  * It looks messy but it's rather straightforward. The switch() statement
 126  * just maps the machspec interrupt numbers to the right OSS interrupt
 127  * source (if the OSS handles that interrupt) and then sets the interrupt
 128  * level for that source to nonzero, thus enabling the interrupt.
 129  */
 130
 131 void oss_irq_enable(int irq) {
 132         switch(irq) {
 133                 case IRQ_MAC_SCC:
 134                         oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
 135                         return;
 136                 case IRQ_MAC_ADB:
 137                         oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
 138                         return;
 139                 case IRQ_MAC_SCSI:
 140                         oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
 141                         return;
 142                 case IRQ_NUBUS_9:
 143                 case IRQ_NUBUS_A:
 144                 case IRQ_NUBUS_B:
 145                 case IRQ_NUBUS_C:
 146                 case IRQ_NUBUS_D:
 147                 case IRQ_NUBUS_E:
 148                         irq -= NUBUS_SOURCE_BASE;
 149                         oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
 150                         return;
 151         }
 152
 153         if (IRQ_SRC(irq) == 1)
 154                 via_irq_enable(irq);
 155 }
 156
 157 /*
 158  * Disable an OSS interrupt
 159  *
 160  * Same as above except we set the source's interrupt level to zero,
 161  * to disable the interrupt.
 162  */
 163
 164 void oss_irq_disable(int irq) {
 165         switch(irq) {
 166                 case IRQ_MAC_SCC:
 167                         oss->irq_level[OSS_IOPSCC] = 0;
 168                         return;
 169                 case IRQ_MAC_ADB:
 170                         oss->irq_level[OSS_IOPISM] = 0;
 171                         return;
 172                 case IRQ_MAC_SCSI:
 173                         oss->irq_level[OSS_SCSI] = 0;
 174                         return;
 175                 case IRQ_NUBUS_9:
 176                 case IRQ_NUBUS_A:
 177                 case IRQ_NUBUS_B:
 178                 case IRQ_NUBUS_C:
 179                 case IRQ_NUBUS_D:
 180                 case IRQ_NUBUS_E:
 181                         irq -= NUBUS_SOURCE_BASE;
 182                         oss->irq_level[irq] = 0;
 183                         return;
 184         }
 185
 186         if (IRQ_SRC(irq) == 1)
 187                 via_irq_disable(irq);
 188 }