1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/parisc/traps.c
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
10 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/sched.h>
15 #include <linux/sched/debug.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/timer.h>
21 #include <linux/delay.h>
23 #include <linux/module.h>
24 #include <linux/smp.h>
25 #include <linux/spinlock.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/console.h>
29 #include <linux/bug.h>
30 #include <linux/ratelimit.h>
31 #include <linux/uaccess.h>
32 #include <linux/kdebug.h>
33 #include <linux/kfence.h>
35 #include <asm/assembly.h>
38 #include <asm/traps.h>
39 #include <linux/unaligned.h>
40 #include <linux/atomic.h>
43 #include <asm/pdc_chassis.h>
44 #include <asm/unwind.h>
45 #include <asm/tlbflush.h>
46 #include <asm/cacheflush.h>
47 #include <linux/kgdb.h>
48 #include <linux/kprobes.h>
50 #include "unaligned.h"
52 #if defined(CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK)
53 #include <asm/spinlock.h>
56 #include "../math-emu/math-emu.h" /* for handle_fpe() */
58 static void parisc_show_stack(struct task_struct
*task
,
59 struct pt_regs
*regs
, const char *loglvl
);
61 static int printbinary(char *buf
, unsigned long x
, int nbits
)
63 unsigned long mask
= 1UL << (nbits
- 1);
65 *buf
++ = (mask
& x
? '1' : '0');
78 #define FFMT "%016llx" /* fpregs are 64-bit always */
80 #define PRINTREGS(lvl,r,f,fmt,x) \
81 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
82 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
83 (r)[(x)+2], (r)[(x)+3])
85 static void print_gr(const char *level
, struct pt_regs
*regs
)
90 printk("%s\n", level
);
91 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level
);
92 printbinary(buf
, regs
->gr
[0], 32);
93 printk("%sPSW: %s %s\n", level
, buf
, print_tainted());
95 for (i
= 0; i
< 32; i
+= 4)
96 PRINTREGS(level
, regs
->gr
, "r", RFMT
, i
);
99 static void print_fr(const char *level
, struct pt_regs
*regs
)
103 struct { u32 sw
[2]; } s
;
105 /* FR are 64bit everywhere. Need to use asm to get the content
106 * of fpsr/fper1, and we assume that we won't have a FP Identify
107 * in our way, otherwise we're screwed.
108 * The fldd is used to restore the T-bit if there was one, as the
109 * store clears it anyway.
110 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
111 asm volatile ("fstd %%fr0,0(%1) \n\t"
112 "fldd 0(%1),%%fr0 \n\t"
113 : "=m" (s
) : "r" (&s
) : "r0");
115 printk("%s\n", level
);
116 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level
);
117 printbinary(buf
, s
.sw
[0], 32);
118 printk("%sFPSR: %s\n", level
, buf
);
119 printk("%sFPER1: %08x\n", level
, s
.sw
[1]);
121 /* here we'll print fr0 again, tho it'll be meaningless */
122 for (i
= 0; i
< 32; i
+= 4)
123 PRINTREGS(level
, regs
->fr
, "fr", FFMT
, i
);
126 void show_regs(struct pt_regs
*regs
)
130 unsigned long cr30
, cr31
;
132 user
= user_mode(regs
);
133 level
= user
? KERN_DEBUG
: KERN_CRIT
;
135 show_regs_print_info(level
);
137 print_gr(level
, regs
);
139 for (i
= 0; i
< 8; i
+= 4)
140 PRINTREGS(level
, regs
->sr
, "sr", RFMT
, i
);
143 print_fr(level
, regs
);
147 printk("%s\n", level
);
148 printk("%sIASQ: " RFMT
" " RFMT
" IAOQ: " RFMT
" " RFMT
"\n",
149 level
, regs
->iasq
[0], regs
->iasq
[1], regs
->iaoq
[0], regs
->iaoq
[1]);
150 printk("%s IIR: %08lx ISR: " RFMT
" IOR: " RFMT
"\n",
151 level
, regs
->iir
, regs
->isr
, regs
->ior
);
152 printk("%s CPU: %8d CR30: " RFMT
" CR31: " RFMT
"\n",
153 level
, task_cpu(current
), cr30
, cr31
);
154 printk("%s ORIG_R28: " RFMT
"\n", level
, regs
->orig_r28
);
157 printk("%s IAOQ[0]: " RFMT
"\n", level
, regs
->iaoq
[0]);
158 printk("%s IAOQ[1]: " RFMT
"\n", level
, regs
->iaoq
[1]);
159 printk("%s RP(r2): " RFMT
"\n", level
, regs
->gr
[2]);
161 printk("%s IAOQ[0]: %pS\n", level
, (void *) regs
->iaoq
[0]);
162 printk("%s IAOQ[1]: %pS\n", level
, (void *) regs
->iaoq
[1]);
163 printk("%s RP(r2): %pS\n", level
, (void *) regs
->gr
[2]);
165 parisc_show_stack(current
, regs
, KERN_DEFAULT
);
169 static DEFINE_RATELIMIT_STATE(_hppa_rs
,
170 DEFAULT_RATELIMIT_INTERVAL
, DEFAULT_RATELIMIT_BURST
);
172 #define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
173 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
174 printk(fmt, ##__VA_ARGS__); \
180 static void do_show_stack(struct unwind_frame_info
*info
, const char *loglvl
)
184 printk("%sBacktrace:\n", loglvl
);
185 while (i
<= MAX_UNWIND_ENTRIES
) {
186 if (unwind_once(info
) < 0 || info
->ip
== 0)
189 if (__kernel_text_address(info
->ip
)) {
190 printk("%s [<" RFMT
">] %pS\n",
191 loglvl
, info
->ip
, (void *) info
->ip
);
195 printk("%s\n", loglvl
);
198 static void parisc_show_stack(struct task_struct
*task
,
199 struct pt_regs
*regs
, const char *loglvl
)
201 struct unwind_frame_info info
;
203 unwind_frame_init_task(&info
, task
, regs
);
205 do_show_stack(&info
, loglvl
);
208 void show_stack(struct task_struct
*t
, unsigned long *sp
, const char *loglvl
)
210 parisc_show_stack(t
, NULL
, loglvl
);
213 int is_valid_bugaddr(unsigned long iaoq
)
218 void die_if_kernel(char *str
, struct pt_regs
*regs
, long err
)
220 if (user_mode(regs
)) {
224 parisc_printk_ratelimited(1, regs
,
225 KERN_CRIT
"%s (pid %d): %s (code %ld) at " RFMT
"\n",
226 current
->comm
, task_pid_nr(current
), str
, err
, regs
->iaoq
[0]);
235 /* Amuse the user in a SPARC fashion */
236 if (err
) printk(KERN_CRIT
237 " _______________________________ \n"
238 " < Your System ate a SPARC! Gah! >\n"
239 " ------------------------------- \n"
245 /* unlock the pdc lock if necessary */
246 pdc_emergency_unlock();
249 printk(KERN_CRIT
"%s (pid %d): %s (code %ld)\n",
250 current
->comm
, task_pid_nr(current
), str
, err
);
252 /* Wot's wrong wif bein' racy? */
253 if (current
->thread
.flags
& PARISC_KERNEL_DEATH
) {
254 printk(KERN_CRIT
"%s() recursion detected.\n", __func__
);
258 current
->thread
.flags
|= PARISC_KERNEL_DEATH
;
262 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
265 panic("Fatal exception in interrupt");
268 panic("Fatal exception");
271 make_task_dead(SIGSEGV
);
274 /* gdb uses break 4,8 */
275 #define GDB_BREAK_INSN 0x10004
276 static void handle_gdb_break(struct pt_regs
*regs
, int wot
)
278 force_sig_fault(SIGTRAP
, wot
,
279 (void __user
*) (regs
->iaoq
[0] & ~3));
282 static void handle_break(struct pt_regs
*regs
)
284 unsigned iir
= regs
->iir
;
286 if (unlikely(iir
== PARISC_BUG_BREAK_INSN
&& !user_mode(regs
))) {
287 /* check if a BUG() or WARN() trapped here. */
288 enum bug_trap_type tt
;
289 tt
= report_bug(regs
->iaoq
[0] & ~3, regs
);
290 if (tt
== BUG_TRAP_TYPE_WARN
) {
293 return; /* return to next instruction when WARN_ON(). */
295 die_if_kernel("Unknown kernel breakpoint", regs
,
296 (tt
== BUG_TRAP_TYPE_NONE
) ? 9 : 0);
299 #ifdef CONFIG_KPROBES
300 if (unlikely(iir
== PARISC_KPROBES_BREAK_INSN
&& !user_mode(regs
))) {
301 parisc_kprobe_break_handler(regs
);
304 if (unlikely(iir
== PARISC_KPROBES_BREAK_INSN2
&& !user_mode(regs
))) {
305 parisc_kprobe_ss_handler(regs
);
311 if (unlikely((iir
== PARISC_KGDB_COMPILED_BREAK_INSN
||
312 iir
== PARISC_KGDB_BREAK_INSN
)) && !user_mode(regs
)) {
313 kgdb_handle_exception(9, SIGTRAP
, 0, regs
);
318 #ifdef CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK
319 if ((iir
== SPINLOCK_BREAK_INSN
) && !user_mode(regs
)) {
320 die_if_kernel("Spinlock was trashed", regs
, 1);
324 if (unlikely(iir
!= GDB_BREAK_INSN
))
325 parisc_printk_ratelimited(0, regs
,
326 KERN_DEBUG
"break %d,%d: pid=%d command='%s'\n",
327 iir
& 31, (iir
>>13) & ((1<<13)-1),
328 task_pid_nr(current
), current
->comm
);
330 /* send standard GDB signal */
331 handle_gdb_break(regs
, TRAP_BRKPT
);
334 static void default_trap(int code
, struct pt_regs
*regs
)
336 printk(KERN_ERR
"Trap %d on CPU %d\n", code
, smp_processor_id());
340 static void transfer_pim_to_trap_frame(struct pt_regs
*regs
)
343 extern unsigned int hpmc_pim_data
[];
344 struct pdc_hpmc_pim_11
*pim_narrow
;
345 struct pdc_hpmc_pim_20
*pim_wide
;
347 if (boot_cpu_data
.cpu_type
>= pcxu
) {
349 pim_wide
= (struct pdc_hpmc_pim_20
*)hpmc_pim_data
;
352 * Note: The following code will probably generate a
353 * bunch of truncation error warnings from the compiler.
354 * Could be handled with an ifdef, but perhaps there
358 regs
->gr
[0] = pim_wide
->cr
[22];
360 for (i
= 1; i
< 32; i
++)
361 regs
->gr
[i
] = pim_wide
->gr
[i
];
363 for (i
= 0; i
< 32; i
++)
364 regs
->fr
[i
] = pim_wide
->fr
[i
];
366 for (i
= 0; i
< 8; i
++)
367 regs
->sr
[i
] = pim_wide
->sr
[i
];
369 regs
->iasq
[0] = pim_wide
->cr
[17];
370 regs
->iasq
[1] = pim_wide
->iasq_back
;
371 regs
->iaoq
[0] = pim_wide
->cr
[18];
372 regs
->iaoq
[1] = pim_wide
->iaoq_back
;
374 regs
->sar
= pim_wide
->cr
[11];
375 regs
->iir
= pim_wide
->cr
[19];
376 regs
->isr
= pim_wide
->cr
[20];
377 regs
->ior
= pim_wide
->cr
[21];
380 pim_narrow
= (struct pdc_hpmc_pim_11
*)hpmc_pim_data
;
382 regs
->gr
[0] = pim_narrow
->cr
[22];
384 for (i
= 1; i
< 32; i
++)
385 regs
->gr
[i
] = pim_narrow
->gr
[i
];
387 for (i
= 0; i
< 32; i
++)
388 regs
->fr
[i
] = pim_narrow
->fr
[i
];
390 for (i
= 0; i
< 8; i
++)
391 regs
->sr
[i
] = pim_narrow
->sr
[i
];
393 regs
->iasq
[0] = pim_narrow
->cr
[17];
394 regs
->iasq
[1] = pim_narrow
->iasq_back
;
395 regs
->iaoq
[0] = pim_narrow
->cr
[18];
396 regs
->iaoq
[1] = pim_narrow
->iaoq_back
;
398 regs
->sar
= pim_narrow
->cr
[11];
399 regs
->iir
= pim_narrow
->cr
[19];
400 regs
->isr
= pim_narrow
->cr
[20];
401 regs
->ior
= pim_narrow
->cr
[21];
405 * The following fields only have meaning if we came through
406 * another path. So just zero them here.
416 * This routine is called as a last resort when everything else
417 * has gone clearly wrong. We get called for faults in kernel space,
420 void parisc_terminate(char *msg
, struct pt_regs
*regs
, int code
, unsigned long offset
)
422 static DEFINE_SPINLOCK(terminate_lock
);
424 (void)notify_die(DIE_OOPS
, msg
, regs
, 0, code
, SIGTRAP
);
429 spin_lock(&terminate_lock
);
431 /* unlock the pdc lock if necessary */
432 pdc_emergency_unlock();
434 /* Not all paths will gutter the processor... */
438 transfer_pim_to_trap_frame(regs
);
447 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
448 struct unwind_frame_info info
;
449 unwind_frame_init(&info
, current
, regs
);
450 do_show_stack(&info
, KERN_CRIT
);
454 pr_crit("%s: Code=%d (%s) at addr " RFMT
"\n",
455 msg
, code
, trap_name(code
), offset
);
458 spin_unlock(&terminate_lock
);
460 /* put soft power button back under hardware control;
461 * if the user had pressed it once at any time, the
462 * system will shut down immediately right here. */
463 pdc_soft_power_button(0);
465 /* Call kernel panic() so reboot timeouts work properly
466 * FIXME: This function should be on the list of
467 * panic notifiers, and we should call panic
468 * directly from the location that we wish.
469 * e.g. We should not call panic from
470 * parisc_terminate, but rather the other way around.
471 * This hack works, prints the panic message twice,
472 * and it enables reboot timers!
477 void notrace
handle_interruption(int code
, struct pt_regs
*regs
)
479 unsigned long fault_address
= 0;
480 unsigned long fault_space
= 0;
483 if (!irqs_disabled_flags(regs
->gr
[0]))
487 * If the priority level is still user, and the
488 * faulting space is not equal to the active space
489 * then the user is attempting something in a space
490 * that does not belong to them. Kill the process.
492 * This is normally the situation when the user
493 * attempts to jump into the kernel space at the
494 * wrong offset, be it at the gateway page or a
497 * We cannot normally signal the process because it
498 * could *be* on the gateway page, and processes
499 * executing on the gateway page can't have signals
502 * We merely readjust the address into the users
503 * space, at a destination address of zero, and
504 * allow processing to continue.
506 if (((unsigned long)regs
->iaoq
[0] & 3) &&
507 ((unsigned long)regs
->iasq
[0] != (unsigned long)regs
->sr
[7])) {
508 /* Kill the user process later */
509 regs
->iaoq
[0] = 0 | PRIV_USER
;
510 regs
->iaoq
[1] = regs
->iaoq
[0] + 4;
511 regs
->iasq
[0] = regs
->iasq
[1] = regs
->sr
[7];
512 regs
->gr
[0] &= ~PSW_B
;
517 printk(KERN_CRIT
"Interruption # %d\n", code
);
523 /* High-priority machine check (HPMC) */
525 /* set up a new led state on systems shipped with a LED State panel */
526 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC
);
528 parisc_terminate("High Priority Machine Check (HPMC)",
533 /* Power failure interrupt */
534 printk(KERN_CRIT
"Power failure interrupt !\n");
538 /* Recovery counter trap */
539 regs
->gr
[0] &= ~PSW_R
;
542 if (kgdb_single_step
) {
543 kgdb_handle_exception(0, SIGTRAP
, 0, regs
);
548 if (user_space(regs
))
549 handle_gdb_break(regs
, TRAP_TRACE
);
550 /* else this must be the start of a syscall - just let it run */
554 /* Low-priority machine check */
555 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC
);
559 default_trap(code
, regs
);
562 case PARISC_ITLB_TRAP
:
563 /* Instruction TLB miss fault/Instruction page fault */
564 fault_address
= regs
->iaoq
[0];
565 fault_space
= regs
->iasq
[0];
569 /* Illegal instruction trap */
570 die_if_kernel("Illegal instruction", regs
, code
);
571 si_code
= ILL_ILLOPC
;
575 /* Break instruction trap */
580 /* Privileged operation trap */
581 die_if_kernel("Privileged operation", regs
, code
);
582 si_code
= ILL_PRVOPC
;
586 /* Privileged register trap */
587 if ((regs
->iir
& 0xffdfffe0) == 0x034008a0) {
589 /* This is a MFCTL cr26/cr27 to gr instruction.
590 * PCXS traps on this, so we need to emulate it.
593 if (regs
->iir
& 0x00200000)
594 regs
->gr
[regs
->iir
& 0x1f] = mfctl(27);
596 regs
->gr
[regs
->iir
& 0x1f] = mfctl(26);
598 regs
->iaoq
[0] = regs
->iaoq
[1];
600 regs
->iasq
[0] = regs
->iasq
[1];
604 die_if_kernel("Privileged register usage", regs
, code
);
605 si_code
= ILL_PRVREG
;
607 force_sig_fault(SIGILL
, si_code
,
608 (void __user
*) regs
->iaoq
[0]);
612 /* Overflow Trap, let the userland signal handler do the cleanup */
613 force_sig_fault(SIGFPE
, FPE_INTOVF
,
614 (void __user
*) regs
->iaoq
[0]);
619 The condition succeeds in an instruction which traps
622 /* Let userspace app figure it out from the insn pointed
625 force_sig_fault(SIGFPE
, FPE_CONDTRAP
,
626 (void __user
*) regs
->iaoq
[0]);
629 /* The kernel doesn't want to handle condition codes */
633 /* Assist Exception Trap, i.e. floating point exception. */
634 die_if_kernel("Floating point exception", regs
, 0); /* quiet */
635 __inc_irq_stat(irq_fpassist_count
);
640 /* Data TLB miss fault/Data page fault */
643 /* Non-access instruction TLB miss fault */
644 /* The instruction TLB entry needed for the target address of the FIC
645 is absent, and hardware can't find it, so we get to cleanup */
648 /* Non-access data TLB miss fault/Non-access data page fault */
650 Still need to add slow path emulation code here!
651 If the insn used a non-shadow register, then the tlb
652 handlers could not have their side-effect (e.g. probe
653 writing to a target register) emulated since rfir would
654 erase the changes to said register. Instead we have to
655 setup everything, call this function we are in, and emulate
656 by hand. Technically we need to emulate:
657 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
659 if (code
== 17 && handle_nadtlb_fault(regs
))
661 fault_address
= regs
->ior
;
662 fault_space
= regs
->isr
;
666 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
667 /* Check for unaligned access */
668 if (check_unaligned(regs
)) {
669 handle_unaligned(regs
);
674 /* PCXL: Data memory access rights trap */
675 fault_address
= regs
->ior
;
676 fault_space
= regs
->isr
;
680 /* Data memory break trap */
681 regs
->gr
[0] |= PSW_X
; /* So we can single-step over the trap */
684 /* Page reference trap */
685 handle_gdb_break(regs
, TRAP_HWBKPT
);
689 /* Taken branch trap */
690 regs
->gr
[0] &= ~PSW_T
;
691 if (user_space(regs
))
692 handle_gdb_break(regs
, TRAP_BRANCH
);
693 /* else this must be the start of a syscall - just let it
699 /* Instruction access rights */
700 /* PCXL: Instruction memory protection trap */
703 * This could be caused by either: 1) a process attempting
704 * to execute within a vma that does not have execute
705 * permission, or 2) an access rights violation caused by a
706 * flush only translation set up by ptep_get_and_clear().
707 * So we check the vma permissions to differentiate the two.
708 * If the vma indicates we have execute permission, then
709 * the cause is the latter one. In this case, we need to
710 * call do_page_fault() to fix the problem.
713 if (user_mode(regs
)) {
714 struct vm_area_struct
*vma
;
716 mmap_read_lock(current
->mm
);
717 vma
= find_vma(current
->mm
,regs
->iaoq
[0]);
718 if (vma
&& (regs
->iaoq
[0] >= vma
->vm_start
)
719 && (vma
->vm_flags
& VM_EXEC
)) {
721 fault_address
= regs
->iaoq
[0];
722 fault_space
= regs
->iasq
[0];
724 mmap_read_unlock(current
->mm
);
725 break; /* call do_page_fault() */
727 mmap_read_unlock(current
->mm
);
729 /* CPU could not fetch instruction, so clear stale IIR value. */
730 regs
->iir
= 0xbaadf00d;
733 /* Data memory protection ID trap */
734 if (code
== 27 && !user_mode(regs
) &&
735 fixup_exception(regs
))
738 die_if_kernel("Protection id trap", regs
, code
);
739 force_sig_fault(SIGSEGV
, SEGV_MAPERR
,
741 ((void __user
*) regs
->iaoq
[0]) :
742 ((void __user
*) regs
->ior
));
746 /* Unaligned data reference trap */
747 handle_unaligned(regs
);
751 if (user_mode(regs
)) {
752 parisc_printk_ratelimited(0, regs
, KERN_DEBUG
753 "handle_interruption() pid=%d command='%s'\n",
754 task_pid_nr(current
), current
->comm
);
755 /* SIGBUS, for lack of a better one. */
756 force_sig_fault(SIGBUS
, BUS_OBJERR
,
757 (void __user
*)regs
->ior
);
760 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC
);
762 parisc_terminate("Unexpected interruption", regs
, code
, 0);
766 if (user_mode(regs
)) {
767 if ((fault_space
>> SPACEID_SHIFT
) != (regs
->sr
[7] >> SPACEID_SHIFT
)) {
768 parisc_printk_ratelimited(0, regs
, KERN_DEBUG
769 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
771 task_pid_nr(current
), current
->comm
);
772 force_sig_fault(SIGSEGV
, SEGV_MAPERR
,
773 (void __user
*)regs
->ior
);
780 * The kernel should never fault on its own address space,
781 * unless pagefault_disable() was called before.
784 if (faulthandler_disabled() || fault_space
== 0)
786 /* Clean up and return if in exception table. */
787 if (fixup_exception(regs
))
789 /* Clean up and return if handled by kfence. */
790 if (kfence_handle_page_fault(fault_address
,
791 parisc_acctyp(code
, regs
->iir
) == VM_WRITE
, regs
))
793 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC
);
794 parisc_terminate("Kernel Fault", regs
, code
, fault_address
);
798 do_page_fault(regs
, code
, fault_address
);
802 static void __init
initialize_ivt(const void *iva
)
804 extern const u32 os_hpmc
[];
811 if (strcmp((const char *)iva
, "cows can fly"))
812 panic("IVT invalid");
816 for (i
= 0; i
< 8; i
++)
820 * Use PDC_INSTR firmware function to get instruction that invokes
821 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of
822 * the PA 1.1 Firmware Architecture document.
824 if (pdc_instr(&instr
) == PDC_OK
)
828 * Rules for the checksum of the HPMC handler:
829 * 1. The IVA does not point to PDC/PDH space (ie: the OS has installed
831 * 2. The word at IVA + 32 is nonzero.
832 * 3. If Length (IVA + 60) is not zero, then Length (IVA + 60) and
833 * Address (IVA + 56) are word-aligned.
834 * 4. The checksum of the 8 words starting at IVA + 32 plus the sum of
835 * the Length/4 words starting at Address is zero.
838 /* Setup IVA and compute checksum for HPMC handler */
839 ivap
[6] = (u32
)__pa(os_hpmc
);
845 pr_debug("initialize_ivt: IVA[6] = 0x%08x\n", ivap
[6]);
849 /* early_trap_init() is called before we set up kernel mappings and
850 * write-protect the kernel */
851 void __init
early_trap_init(void)
853 extern const void fault_vector_20
;
856 extern const void fault_vector_11
;
857 initialize_ivt(&fault_vector_11
);
860 initialize_ivt(&fault_vector_20
);