1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for powerpc
5 * Copyright IBM Corporation, 2007-2012
7 * Adapted from the x86 port by Ananth N Mavinakayanahalli <ananth@in.ibm.com>
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/ptrace.h>
12 #include <linux/uprobes.h>
13 #include <linux/uaccess.h>
14 #include <linux/kdebug.h>
16 #include <asm/sstep.h>
19 #define UPROBE_TRAP_NR UINT_MAX
22 * is_trap_insn - check if the instruction is a trap variant
23 * @insn: instruction to be checked.
24 * Returns true if @insn is a trap variant.
26 bool is_trap_insn(uprobe_opcode_t
*insn
)
28 return (is_trap(*insn
));
32 * arch_uprobe_analyze_insn
33 * @mm: the probed address space.
34 * @arch_uprobe: the probepoint information.
35 * @addr: vaddr to probe.
36 * Return 0 on success or a -ve number on error.
38 int arch_uprobe_analyze_insn(struct arch_uprobe
*auprobe
,
39 struct mm_struct
*mm
, unsigned long addr
)
44 if (cpu_has_feature(CPU_FTR_ARCH_31
) &&
45 ppc_inst_prefixed(ppc_inst_read(auprobe
->insn
)) &&
46 (addr
& 0x3f) == 60) {
47 pr_info_ratelimited("Cannot register a uprobe on 64 byte unaligned prefixed instruction\n");
51 if (!can_single_step(ppc_inst_val(ppc_inst_read(auprobe
->insn
)))) {
52 pr_info_ratelimited("Cannot register a uprobe on instructions that can't be single stepped\n");
60 * arch_uprobe_pre_xol - prepare to execute out of line.
61 * @auprobe: the probepoint information.
62 * @regs: reflects the saved user state of current task.
64 int arch_uprobe_pre_xol(struct arch_uprobe
*auprobe
, struct pt_regs
*regs
)
66 struct arch_uprobe_task
*autask
= ¤t
->utask
->autask
;
68 autask
->saved_trap_nr
= current
->thread
.trap_nr
;
69 current
->thread
.trap_nr
= UPROBE_TRAP_NR
;
70 regs_set_return_ip(regs
, current
->utask
->xol_vaddr
);
72 user_enable_single_step(current
);
77 * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
78 * @regs: Reflects the saved state of the task after it has hit a breakpoint
80 * Return the address of the breakpoint instruction.
82 unsigned long uprobe_get_swbp_addr(struct pt_regs
*regs
)
84 return instruction_pointer(regs
);
88 * If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
89 * then detect the case where a singlestepped instruction jumps back to its
90 * own address. It is assumed that anything like do_page_fault/do_trap/etc
91 * sets thread.trap_nr != UINT_MAX.
93 * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
94 * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
95 * UPROBE_TRAP_NR == UINT_MAX set by arch_uprobe_pre_xol().
97 bool arch_uprobe_xol_was_trapped(struct task_struct
*t
)
99 if (t
->thread
.trap_nr
!= UPROBE_TRAP_NR
)
106 * Called after single-stepping. To avoid the SMP problems that can
107 * occur when we temporarily put back the original opcode to
108 * single-step, we single-stepped a copy of the instruction.
110 * This function prepares to resume execution after the single-step.
112 int arch_uprobe_post_xol(struct arch_uprobe
*auprobe
, struct pt_regs
*regs
)
114 struct uprobe_task
*utask
= current
->utask
;
116 WARN_ON_ONCE(current
->thread
.trap_nr
!= UPROBE_TRAP_NR
);
118 current
->thread
.trap_nr
= utask
->autask
.saved_trap_nr
;
121 * On powerpc, except for loads and stores, most instructions
122 * including ones that alter code flow (branches, calls, returns)
123 * are emulated in the kernel. We get here only if the emulation
124 * support doesn't exist and have to fix-up the next instruction
127 regs_set_return_ip(regs
, (unsigned long)ppc_inst_next((void *)utask
->vaddr
, auprobe
->insn
));
129 user_disable_single_step(current
);
133 /* callback routine for handling exceptions. */
134 int arch_uprobe_exception_notify(struct notifier_block
*self
,
135 unsigned long val
, void *data
)
137 struct die_args
*args
= data
;
138 struct pt_regs
*regs
= args
->regs
;
140 /* regs == NULL is a kernel bug */
144 /* We are only interested in userspace traps */
145 if (!user_mode(regs
))
150 if (uprobe_pre_sstep_notifier(regs
))
154 if (uprobe_post_sstep_notifier(regs
))
164 * This function gets called when XOL instruction either gets trapped or
165 * the thread has a fatal signal, so reset the instruction pointer to its
168 void arch_uprobe_abort_xol(struct arch_uprobe
*auprobe
, struct pt_regs
*regs
)
170 struct uprobe_task
*utask
= current
->utask
;
172 current
->thread
.trap_nr
= utask
->autask
.saved_trap_nr
;
173 instruction_pointer_set(regs
, utask
->vaddr
);
175 user_disable_single_step(current
);
179 * See if the instruction can be emulated.
180 * Returns true if instruction was emulated, false otherwise.
182 bool arch_uprobe_skip_sstep(struct arch_uprobe
*auprobe
, struct pt_regs
*regs
)
187 * emulate_step() returns 1 if the insn was successfully emulated.
188 * For all other cases, we need to single-step in hardware.
190 ret
= emulate_step(regs
, ppc_inst_read(auprobe
->insn
));
198 arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr
, struct pt_regs
*regs
)
200 unsigned long orig_ret_vaddr
;
202 orig_ret_vaddr
= regs
->link
;
204 /* Replace the return addr with trampoline addr */
205 regs
->link
= trampoline_vaddr
;
207 return orig_ret_vaddr
;
210 bool arch_uretprobe_is_alive(struct return_instance
*ret
, enum rp_check ctx
,
211 struct pt_regs
*regs
)
213 if (ctx
== RP_CHECK_CHAIN_CALL
)
214 return regs
->gpr
[1] <= ret
->stack
;
216 return regs
->gpr
[1] < ret
->stack
;