arch/powerpc/platforms/52xx/mpc52xx_common.c

   1 /*
   2  *
   3  * Utility functions for the Freescale MPC52xx.
   4  *
   5  * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2. This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  *
  11  */
  12
  13 #undef DEBUG
  14
  15 #include <linux/kernel.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/export.h>
  20 #include <asm/io.h>
  21 #include <asm/mpc52xx.h>
  22
  23 /* MPC5200 device tree match tables */
  24 static const struct of_device_id mpc52xx_xlb_ids[] __initconst = {
  25         { .compatible = "fsl,mpc5200-xlb", },
  26         { .compatible = "mpc5200-xlb", },
  27         {}
  28 };
  29 static const struct of_device_id mpc52xx_bus_ids[] __initconst = {
  30         { .compatible = "fsl,mpc5200-immr", },
  31         { .compatible = "fsl,mpc5200b-immr", },
  32         { .compatible = "simple-bus", },
  33
  34         /* depreciated matches; shouldn't be used in new device trees */
  35         { .compatible = "fsl,lpb", },
  36         { .type = "builtin", .compatible = "mpc5200", }, /* efika */
  37         { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
  38         {}
  39 };
  40
  41 /*
  42  * This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
  43  * Permanent mapping is required because mpc52xx_restart() can be called
  44  * from interrupt context while node mapping (which calls ioremap())
  45  * cannot be used at such point.
  46  */
  47 static DEFINE_SPINLOCK(mpc52xx_lock);
  48 static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
  49 static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
  50
  51 /*
  52  * Configure the XLB arbiter settings to match what Linux expects.
  53  */
  54 void __init
  55 mpc5200_setup_xlb_arbiter(void)
  56 {
  57         struct device_node *np;
  58         struct mpc52xx_xlb  __iomem *xlb;
  59
  60         np = of_find_matching_node(NULL, mpc52xx_xlb_ids);
  61         xlb = of_iomap(np, 0);
  62         of_node_put(np);
  63         if (!xlb) {
  64                 printk(KERN_ERR __FILE__ ": "
  65                         "Error mapping XLB in mpc52xx_setup_cpu(). "
  66                         "Expect some abnormal behavior\n");
  67                 return;
  68         }
  69
  70         /* Configure the XLB Arbiter priorities */
  71         out_be32(&xlb->master_pri_enable, 0xff);
  72         out_be32(&xlb->master_priority, 0x11111111);
  73
  74         /*
  75          * Disable XLB pipelining
  76          * (cfr errate 292. We could do this only just before ATA PIO
  77          *  transaction and re-enable it afterwards ...)
  78          * Not needed on MPC5200B.
  79          */
  80         if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
  81                 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
  82
  83         iounmap(xlb);
  84 }
  85
  86 /*
  87  * This variable is mapped in mpc52xx_map_common_devices and
  88  * used in mpc5200_psc_ac97_gpio_reset().
  89  */
  90 static DEFINE_SPINLOCK(gpio_lock);
  91 struct mpc52xx_gpio __iomem *simple_gpio;
  92 struct mpc52xx_gpio_wkup __iomem *wkup_gpio;
  93
  94 /**
  95  * mpc52xx_declare_of_platform_devices: register internal devices and children
  96  *                                      of the localplus bus to the of_platform
  97  *                                      bus.
  98  */
  99 void __init mpc52xx_declare_of_platform_devices(void)
 100 {
 101         /* Find all the 'platform' devices and register them. */
 102         if (of_platform_populate(NULL, mpc52xx_bus_ids, NULL, NULL))
 103                 pr_err(__FILE__ ": Error while populating devices from DT\n");
 104 }
 105
 106 /*
 107  * match tables used by mpc52xx_map_common_devices()
 108  */
 109 static const struct of_device_id mpc52xx_gpt_ids[] __initconst = {
 110         { .compatible = "fsl,mpc5200-gpt", },
 111         { .compatible = "mpc5200-gpt", }, /* old */
 112         {}
 113 };
 114 static const struct of_device_id mpc52xx_cdm_ids[] __initconst = {
 115         { .compatible = "fsl,mpc5200-cdm", },
 116         { .compatible = "mpc5200-cdm", }, /* old */
 117         {}
 118 };
 119 static const struct of_device_id mpc52xx_gpio_simple[] __initconst = {
 120         { .compatible = "fsl,mpc5200-gpio", },
 121         {}
 122 };
 123 static const struct of_device_id mpc52xx_gpio_wkup[] __initconst = {
 124         { .compatible = "fsl,mpc5200-gpio-wkup", },
 125         {}
 126 };
 127
 128
 129 /**
 130  * mpc52xx_map_common_devices: iomap devices required by common code
 131  */
 132 void __init
 133 mpc52xx_map_common_devices(void)
 134 {
 135         struct device_node *np;
 136
 137         /* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
 138          * possibly from a interrupt context. wdt is only implement
 139          * on a gpt0, so check has-wdt property before mapping.
 140          */
 141         for_each_matching_node(np, mpc52xx_gpt_ids) {
 142                 if (of_property_read_bool(np, "fsl,has-wdt") ||
 143                     of_property_read_bool(np, "has-wdt")) {
 144                         mpc52xx_wdt = of_iomap(np, 0);
 145                         of_node_put(np);
 146                         break;
 147                 }
 148         }
 149
 150         /* Clock Distribution Module, used by PSC clock setting function */
 151         np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
 152         mpc52xx_cdm = of_iomap(np, 0);
 153         of_node_put(np);
 154
 155         /* simple_gpio registers */
 156         np = of_find_matching_node(NULL, mpc52xx_gpio_simple);
 157         simple_gpio = of_iomap(np, 0);
 158         of_node_put(np);
 159
 160         /* wkup_gpio registers */
 161         np = of_find_matching_node(NULL, mpc52xx_gpio_wkup);
 162         wkup_gpio = of_iomap(np, 0);
 163         of_node_put(np);
 164 }
 165
 166 /**
 167  * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports
 168  *
 169  * @psc_id: id of psc port; must be 1,2,3 or 6
 170  * @clkdiv: clock divider value to put into CDM PSC register.
 171  */
 172 int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
 173 {
 174         unsigned long flags;
 175         u16 __iomem *reg;
 176         u32 val;
 177         u32 mask;
 178         u32 mclken_div;
 179
 180         if (!mpc52xx_cdm)
 181                 return -ENODEV;
 182
 183         mclken_div = 0x8000 | (clkdiv & 0x1FF);
 184         switch (psc_id) {
 185         case 1: reg = &mpc52xx_cdm->mclken_div_psc1; mask = 0x20; break;
 186         case 2: reg = &mpc52xx_cdm->mclken_div_psc2; mask = 0x40; break;
 187         case 3: reg = &mpc52xx_cdm->mclken_div_psc3; mask = 0x80; break;
 188         case 6: reg = &mpc52xx_cdm->mclken_div_psc6; mask = 0x10; break;
 189         default:
 190                 return -ENODEV;
 191         }
 192
 193         /* Set the rate and enable the clock */
 194         spin_lock_irqsave(&mpc52xx_lock, flags);
 195         out_be16(reg, mclken_div);
 196         val = in_be32(&mpc52xx_cdm->clk_enables);
 197         out_be32(&mpc52xx_cdm->clk_enables, val | mask);
 198         spin_unlock_irqrestore(&mpc52xx_lock, flags);
 199
 200         return 0;
 201 }
 202 EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv);
 203
 204 /**
 205  * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
 206  */
 207 void __noreturn mpc52xx_restart(char *cmd)
 208 {
 209         local_irq_disable();
 210
 211         /* Turn on the watchdog and wait for it to expire.
 212          * It effectively does a reset. */
 213         if (mpc52xx_wdt) {
 214                 out_be32(&mpc52xx_wdt->mode, 0x00000000);
 215                 out_be32(&mpc52xx_wdt->count, 0x000000ff);
 216                 out_be32(&mpc52xx_wdt->mode, 0x00009004);
 217         } else
 218                 printk(KERN_ERR __FILE__ ": "
 219                         "mpc52xx_restart: Can't access wdt. "
 220                         "Restart impossible, system halted.\n");
 221
 222         while (1);
 223 }
 224
 225 #define PSC1_RESET     0x1
 226 #define PSC1_SYNC      0x4
 227 #define PSC1_SDATA_OUT 0x1
 228 #define PSC2_RESET     0x2
 229 #define PSC2_SYNC      (0x4<<4)
 230 #define PSC2_SDATA_OUT (0x1<<4)
 231 #define MPC52xx_GPIO_PSC1_MASK 0x7
 232 #define MPC52xx_GPIO_PSC2_MASK (0x7<<4)
 233
 234 /**
 235  * mpc5200_psc_ac97_gpio_reset: Use gpio pins to reset the ac97 bus
 236  *
 237  * @psc: psc number to reset (only psc 1 and 2 support ac97)
 238  */
 239 int mpc5200_psc_ac97_gpio_reset(int psc_number)
 240 {
 241         unsigned long flags;
 242         u32 gpio;
 243         u32 mux;
 244         int out;
 245         int reset;
 246         int sync;
 247
 248         if ((!simple_gpio) || (!wkup_gpio))
 249                 return -ENODEV;
 250
 251         switch (psc_number) {
 252         case 0:
 253                 reset   = PSC1_RESET;           /* AC97_1_RES */
 254                 sync    = PSC1_SYNC;            /* AC97_1_SYNC */
 255                 out     = PSC1_SDATA_OUT;       /* AC97_1_SDATA_OUT */
 256                 gpio    = MPC52xx_GPIO_PSC1_MASK;
 257                 break;
 258         case 1:
 259                 reset   = PSC2_RESET;           /* AC97_2_RES */
 260                 sync    = PSC2_SYNC;            /* AC97_2_SYNC */
 261                 out     = PSC2_SDATA_OUT;       /* AC97_2_SDATA_OUT */
 262                 gpio    = MPC52xx_GPIO_PSC2_MASK;
 263                 break;
 264         default:
 265                 pr_err(__FILE__ ": Unable to determine PSC, no ac97 "
 266                        "cold-reset will be performed\n");
 267                 return -ENODEV;
 268         }
 269
 270         spin_lock_irqsave(&gpio_lock, flags);
 271
 272         /* Reconfigure pin-muxing to gpio */
 273         mux = in_be32(&simple_gpio->port_config);
 274         out_be32(&simple_gpio->port_config, mux & (~gpio));
 275
 276         /* enable gpio pins for output */
 277         setbits8(&wkup_gpio->wkup_gpioe, reset);
 278         setbits32(&simple_gpio->simple_gpioe, sync | out);
 279
 280         setbits8(&wkup_gpio->wkup_ddr, reset);
 281         setbits32(&simple_gpio->simple_ddr, sync | out);
 282
 283         /* Assert cold reset */
 284         clrbits32(&simple_gpio->simple_dvo, sync | out);
 285         clrbits8(&wkup_gpio->wkup_dvo, reset);
 286
 287         /* wait for 1 us */
 288         udelay(1);
 289
 290         /* Deassert reset */
 291         setbits8(&wkup_gpio->wkup_dvo, reset);
 292
 293         /* wait at least 200ns */
 294         /* 7 ~= (200ns * timebase) / ns2sec */
 295         __delay(7);
 296
 297         /* Restore pin-muxing */
 298         out_be32(&simple_gpio->port_config, mux);
 299
 300         spin_unlock_irqrestore(&gpio_lock, flags);
 301
 302         return 0;
 303 }
 304 EXPORT_SYMBOL(mpc5200_psc_ac97_gpio_reset);