1 # SPDX-License-Identifier: GPL-2.0-only
3 # For a description of the syntax of this configuration file,
4 # see Documentation/kbuild/kconfig-language.rst.
15 select ACPI_GENERIC_GSI if ACPI
16 select ACPI_MCFG if (ACPI && PCI)
17 select ACPI_PPTT if ACPI
18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
19 select ACPI_SPCR_TABLE if ACPI
20 select ARCH_DMA_DEFAULT_COHERENT
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
22 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
25 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
26 select ARCH_HAS_BINFMT_FLAT
27 select ARCH_HAS_CURRENT_STACK_POINTER
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU
29 select ARCH_HAS_DEBUG_VM_PGTABLE
30 select ARCH_HAS_DEBUG_WX
31 select ARCH_HAS_FAST_MULTIPLIER
32 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL
34 select ARCH_HAS_GIGANTIC_PAGE
35 select ARCH_HAS_HW_PTE_YOUNG
37 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU
38 select ARCH_HAS_MEMBARRIER_CALLBACKS
39 select ARCH_HAS_MEMBARRIER_SYNC_CORE
40 select ARCH_HAS_MMIOWB
41 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
42 select ARCH_HAS_PMEM_API
43 select ARCH_HAS_PREEMPT_LAZY
44 select ARCH_HAS_PREPARE_SYNC_CORE_CMD
45 select ARCH_HAS_PTE_DEVMAP if 64BIT && MMU
46 select ARCH_HAS_PTE_SPECIAL
47 select ARCH_HAS_SET_DIRECT_MAP if MMU
48 select ARCH_HAS_SET_MEMORY if MMU
49 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
50 select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL
51 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
52 select ARCH_HAS_SYSCALL_WRAPPER
53 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
55 select ARCH_HAS_VDSO_TIME_DATA
56 select ARCH_KEEP_MEMBLOCK if ACPI
57 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU
58 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
59 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
61 select ARCH_SUPPORTS_ATOMIC_RMW
62 select ARCH_SUPPORTS_CFI_CLANG
63 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
64 select ARCH_SUPPORTS_HUGETLBFS if MMU
65 # LLD >= 14: https://github.com/llvm/llvm-project/issues/50505
66 select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000
67 select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
68 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
69 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
70 select ARCH_SUPPORTS_RT
71 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK
72 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
73 select ARCH_USE_MEMTEST
74 select ARCH_USE_QUEUED_RWLOCKS
75 select ARCH_USE_SYM_ANNOTATIONS
76 select ARCH_USES_CFI_TRAPS if CFI_CLANG
77 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU
78 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
79 select ARCH_WANT_FRAME_POINTERS
80 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT
81 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
82 select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL
83 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP
84 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
85 select ARCH_WANTS_NO_INSTR
86 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
87 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS
88 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
89 select BUILDTIME_TABLE_SORT if MMU
90 select CLINT_TIMER if RISCV_M_MODE
91 select CLONE_BACKWARDS
93 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
95 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE)
96 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE
97 select GENERIC_ARCH_TOPOLOGY
98 select GENERIC_ATOMIC64 if !64BIT
99 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
100 select GENERIC_CPU_DEVICES
101 select GENERIC_CPU_VULNERABILITIES
102 select GENERIC_EARLY_IOREMAP
104 select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
105 select GENERIC_IDLE_POLL_SETUP
106 select GENERIC_IOREMAP if MMU
107 select GENERIC_IRQ_IPI if SMP
108 select GENERIC_IRQ_IPI_MUX if SMP
109 select GENERIC_IRQ_MULTI_HANDLER
110 select GENERIC_IRQ_SHOW
111 select GENERIC_IRQ_SHOW_LEVEL
112 select GENERIC_LIB_DEVMEM_IS_ALLOWED
113 select GENERIC_PCI_IOMAP
114 select GENERIC_PTDUMP if MMU
115 select GENERIC_SCHED_CLOCK
116 select GENERIC_SMP_IDLE_THREAD
117 select GENERIC_TIME_VSYSCALL if MMU && 64BIT
118 select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
119 select HARDIRQS_SW_RESEND
120 select HAS_IOPORT if MMU
121 select HAVE_ALIGNED_STRUCT_PAGE
122 select HAVE_ARCH_AUDITSYSCALL
123 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP
124 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT
125 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
126 select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
127 select HAVE_ARCH_KASAN if MMU && 64BIT
128 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
129 select HAVE_ARCH_KFENCE if MMU && 64BIT
130 select HAVE_ARCH_KGDB if !XIP_KERNEL
131 select HAVE_ARCH_KGDB_QXFER_PKT
132 select HAVE_ARCH_MMAP_RND_BITS if MMU
133 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
134 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
135 select HAVE_ARCH_SECCOMP_FILTER
136 select HAVE_ARCH_STACKLEAK
137 select HAVE_ARCH_THREAD_STRUCT_WHITELIST
138 select HAVE_ARCH_TRACEHOOK
139 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
140 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD
141 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT
142 select HAVE_ASM_MODVERSIONS
143 select HAVE_CONTEXT_TRACKING_USER
144 select HAVE_DEBUG_KMEMLEAK
145 select HAVE_DMA_CONTIGUOUS if MMU
146 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)
147 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
148 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE
149 select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
150 select HAVE_FUNCTION_GRAPH_TRACER
151 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
152 select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !PREEMPTION
153 select HAVE_EBPF_JIT if MMU
154 select HAVE_GUP_FAST if MMU
155 select HAVE_FUNCTION_ARG_ACCESS_API
156 select HAVE_FUNCTION_ERROR_INJECTION
157 select HAVE_GCC_PLUGINS
158 select HAVE_GENERIC_VDSO if MMU && 64BIT
159 select HAVE_IRQ_TIME_ACCOUNTING
160 select HAVE_KERNEL_BZIP2 if !XIP_KERNEL && !EFI_ZBOOT
161 select HAVE_KERNEL_GZIP if !XIP_KERNEL && !EFI_ZBOOT
162 select HAVE_KERNEL_LZ4 if !XIP_KERNEL && !EFI_ZBOOT
163 select HAVE_KERNEL_LZMA if !XIP_KERNEL && !EFI_ZBOOT
164 select HAVE_KERNEL_LZO if !XIP_KERNEL && !EFI_ZBOOT
165 select HAVE_KERNEL_UNCOMPRESSED if !XIP_KERNEL && !EFI_ZBOOT
166 select HAVE_KERNEL_ZSTD if !XIP_KERNEL && !EFI_ZBOOT
167 select HAVE_KERNEL_XZ if !XIP_KERNEL && !EFI_ZBOOT
168 select HAVE_KPROBES if !XIP_KERNEL
169 select HAVE_KRETPROBES if !XIP_KERNEL
170 # https://github.com/ClangBuiltLinux/linux/issues/1881
171 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD
174 select HAVE_PAGE_SIZE_4KB
176 select HAVE_PERF_EVENTS
177 select HAVE_PERF_REGS
178 select HAVE_PERF_USER_STACK_DUMP
179 select HAVE_POSIX_CPU_TIMERS_TASK_WORK
180 select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL
181 select HAVE_REGS_AND_STACK_ACCESS_API
182 select HAVE_RETHOOK if !XIP_KERNEL
184 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG
185 select HAVE_SAMPLE_FTRACE_DIRECT
186 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
187 select HAVE_STACKPROTECTOR
188 select HAVE_SYSCALL_TRACEPOINTS
189 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
191 select IRQ_FORCED_THREADING
192 select KASAN_VMALLOC if KASAN
193 select LOCK_MM_AND_FIND_VMA
194 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU
195 select MODULES_USE_ELF_RELA if MODULES
197 select OF_EARLY_FLATTREE
199 select PCI_DOMAINS_GENERIC if PCI
200 select PCI_ECAM if (ACPI && PCI)
201 select PCI_MSI if PCI
202 select RISCV_ALTERNATIVE if !XIP_KERNEL
206 select RISCV_TIMER if RISCV_SBI
209 select SYSCTL_EXCEPTION_TRACE
210 select THREAD_INFO_IN_TASK
211 select TRACE_IRQFLAGS_SUPPORT
212 select UACCESS_MEMCPY if !MMU
213 select USER_STACKTRACE_SUPPORT
214 select ZONE_DMA32 if 64BIT
216 config RUSTC_SUPPORTS_RISCV
219 # Shadow call stack requires rustc version 1.82+ due to use of the
220 # -Zsanitizer=shadow-call-stack flag.
221 depends on !SHADOW_CALL_STACK || RUSTC_VERSION >= 108200
223 config CLANG_SUPPORTS_DYNAMIC_FTRACE
225 # https://github.com/ClangBuiltLinux/linux/issues/1817
226 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600))
228 config GCC_SUPPORTS_DYNAMIC_FTRACE
230 depends on $(cc-option,-fpatchable-function-entry=8)
232 config HAVE_SHADOW_CALL_STACK
233 def_bool $(cc-option,-fsanitize=shadow-call-stack)
234 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769
235 depends on $(ld-option,--no-relax-gp)
237 config RISCV_USE_LINKER_RELAXATION
239 # https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985
240 depends on !LD_IS_LLD || LLD_VERSION >= 150000
242 # https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6
243 config ARCH_HAS_BROKEN_DWARF5
245 depends on RISCV_USE_LINKER_RELAXATION
246 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a
247 depends on AS_IS_LLVM && AS_VERSION < 180000
248 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77
249 depends on LD_IS_LLD && LLD_VERSION < 180000
251 config ARCH_MMAP_RND_BITS_MIN
255 config ARCH_MMAP_RND_COMPAT_BITS_MIN
258 # max bits determined by the following formula:
259 # VA_BITS - PAGE_SHIFT - 3
260 config ARCH_MMAP_RND_BITS_MAX
261 default 24 if 64BIT # SV39 based
264 config ARCH_MMAP_RND_COMPAT_BITS_MAX
267 # set if we run in machine mode, cleared if we run in supervisor mode
269 bool "Build a kernel that runs in machine mode"
273 Select this option if you want to run the kernel in M-mode,
274 without the assistance of any other firmware.
276 # set if we are running in S-mode and can use SBI calls
279 depends on !RISCV_M_MODE
283 bool "MMU-based Paged Memory Management Support"
286 Select if you want MMU-based virtualised addressing space
287 support by paged memory management. If unsure, say 'Y'.
291 default 0x80000000 if !MMU && RISCV_M_MODE
292 default 0x80200000 if !MMU
293 default 0xc0000000 if 32BIT
294 default 0xff60000000000000 if 64BIT
296 config KASAN_SHADOW_OFFSET
298 depends on KASAN_GENERIC
299 default 0xdfffffff00000000 if 64BIT
300 default 0xffffffff if 32BIT
302 config ARCH_FLATMEM_ENABLE
305 config ARCH_SPARSEMEM_ENABLE
308 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM
309 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT
311 config ARCH_SELECT_MEMORY_MODEL
312 def_bool ARCH_SPARSEMEM_ENABLE
314 config ARCH_SUPPORTS_UPROBES
317 config STACKTRACE_SUPPORT
323 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
325 config GENERIC_BUG_RELATIVE_POINTERS
328 config GENERIC_CALIBRATE_DELAY
334 config GENERIC_HWEIGHT
337 config FIX_EARLYCON_MEM
340 config ILLEGAL_POINTER_VALUE
343 default 0xdead000000000000 if 64BIT
345 config PGTABLE_LEVELS
350 config LOCKDEP_SUPPORT
353 config RISCV_DMA_NONCOHERENT
355 select ARCH_HAS_DMA_PREP_COHERENT
356 select ARCH_HAS_SETUP_DMA_OPS
357 select ARCH_HAS_SYNC_DMA_FOR_CPU
358 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
359 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
361 config RISCV_NONSTANDARD_CACHE_OPS
364 This enables function pointer support for non-standard noncoherent
365 systems to handle cache management.
368 def_bool $(as-instr,.insn r 51$(comma) 0$(comma) 0$(comma) t0$(comma) t0$(comma) zero)
370 config AS_HAS_OPTION_ARCH
371 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4
373 depends on $(as-instr, .option arch$(comma) +m)
375 source "arch/riscv/Kconfig.socs"
376 source "arch/riscv/Kconfig.errata"
381 bool "Allow configurations that result in non-portable kernels"
383 RISC-V kernel binaries are compatible between all known systems
384 whenever possible, but there are some use cases that can only be
385 satisfied by configurations that result in kernel binaries that are
386 not portable between systems.
388 Selecting N does not guarantee kernels will be portable to all known
389 systems. Selecting any of the options guarded by NONPORTABLE will
390 result in kernel binaries that are unlikely to be portable between
399 This selects the base ISA that this kernel will target and must match
404 depends on NONPORTABLE
406 select GENERIC_LIB_ASHLDI3
407 select GENERIC_LIB_ASHRDI3
408 select GENERIC_LIB_LSHRDI3
409 select GENERIC_LIB_UCMPDI2
414 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
415 select SWIOTLB if MMU
419 # We must be able to map all physical memory into the kernel, but the compiler
420 # is still a bit more efficient when generating code if it's setup in a manner
421 # such that it can only map 2GiB of memory.
423 prompt "Kernel Code Model"
424 default CMODEL_MEDLOW if 32BIT
425 default CMODEL_MEDANY if 64BIT
428 bool "medium low code model"
430 bool "medium any code model"
433 config MODULE_SECTIONS
435 select HAVE_MOD_ARCH_SPECIFIC
438 bool "Symmetric Multi-Processing"
440 This enables support for systems with more than one CPU. If
441 you say N here, the kernel will run on single and
442 multiprocessor machines, but will use only one CPU of a
443 multiprocessor machine. If you say Y here, the kernel will run
444 on many, but not all, single processor machines. On a single
445 processor machine, the kernel will run faster if you say N
448 If you don't know what to do here, say N.
451 bool "Multi-core scheduler support"
454 Multi-core scheduler support improves the CPU scheduler's decision
455 making when dealing with multi-core CPU chips at a cost of slightly
456 increased overhead in some places. If unsure say N here.
459 int "Maximum number of CPUs (2-512)"
461 range 2 512 if !RISCV_SBI_V01
462 range 2 32 if RISCV_SBI_V01 && 32BIT
463 range 2 64 if RISCV_SBI_V01 && 64BIT
464 default "32" if 32BIT
465 default "64" if 64BIT
468 bool "Support for hot-pluggable CPUs"
470 select GENERIC_IRQ_MIGRATION
473 Say Y here to experiment with turning CPUs off and on. CPUs
474 can be controlled through /sys/devices/system/cpu.
476 Say N if you want to disable CPU hotplug.
487 # Common NUMA Features
489 bool "NUMA Memory Allocation and Scheduler Support"
490 depends on SMP && MMU
491 select ARCH_SUPPORTS_NUMA_BALANCING
492 select GENERIC_ARCH_NUMA
493 select HAVE_SETUP_PER_CPU_AREA
494 select NEED_PER_CPU_EMBED_FIRST_CHUNK
495 select NEED_PER_CPU_PAGE_FIRST_CHUNK
497 select USE_PERCPU_NUMA_NODE_ID
499 Enable NUMA (Non-Uniform Memory Access) support.
501 The kernel will try to allocate memory used by a CPU on the
502 local memory of the CPU and add some more NUMA awareness to the kernel.
505 int "Maximum NUMA Nodes (as a power of 2)"
510 Specify the maximum number of NUMA Nodes available on the target
511 system. Increases memory reserved to accommodate various tables.
514 prompt "RISC-V spinlock type"
515 default RISCV_COMBO_SPINLOCKS
517 config RISCV_TICKET_SPINLOCKS
518 bool "Using ticket spinlock"
520 config RISCV_QUEUED_SPINLOCKS
521 bool "Using queued spinlock"
522 depends on SMP && MMU && NONPORTABLE
523 select ARCH_USE_QUEUED_SPINLOCKS
525 The queued spinlock implementation requires the forward progress
526 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or
527 LR/SC with Ziccrse provide such guarantee.
529 Select this if and only if Zabha or Ziccrse is available on your
530 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms
531 without one of those extensions.
533 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks
534 when supported and otherwise ticket spinlocks.
536 config RISCV_COMBO_SPINLOCKS
537 bool "Using combo spinlock"
538 depends on SMP && MMU
539 select ARCH_USE_QUEUED_SPINLOCKS
541 Embed both queued spinlock and ticket lock so that the spinlock
542 implementation can be chosen at runtime.
546 config RISCV_ALTERNATIVE
548 depends on !XIP_KERNEL
550 This Kconfig allows the kernel to automatically patch the
551 erratum or cpufeature required by the execution platform at run
552 time. The code patching overhead is minimal, as it's only done
553 once at boot and once on each module load.
555 config RISCV_ALTERNATIVE_EARLY
557 depends on RISCV_ALTERNATIVE
559 Allows early patching of the kernel for special errata
562 bool "Emit compressed instructions when building Linux"
565 Adds "C" to the ISA subsets that the toolchain is allowed to emit
566 when building Linux, which results in compressed instructions in the
569 If you don't know what to do here, say Y.
571 config RISCV_ISA_SUPM
572 bool "Supm extension for userspace pointer masking"
576 Add support for pointer masking in userspace (Supm) when the
577 underlying hardware extension (Smnpm or Ssnpm) is detected at boot.
579 If this option is disabled, userspace will be unable to use
580 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API.
582 config RISCV_ISA_SVNAPOT
583 bool "Svnapot extension support for supervisor mode NAPOT pages"
584 depends on 64BIT && MMU
585 depends on RISCV_ALTERNATIVE
588 Allow kernel to detect the Svnapot ISA-extension dynamically at boot
589 time and enable its usage.
591 The Svnapot extension is used to mark contiguous PTEs as a range
592 of contiguous virtual-to-physical translations for a naturally
593 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page
594 size. When HUGETLBFS is also selected this option unconditionally
595 allocates some memory for each NAPOT page size supported by the kernel.
596 When optimizing for low memory consumption and for platforms without
597 the Svnapot extension, it may be better to say N here.
599 If you don't know what to do here, say Y.
601 config RISCV_ISA_SVPBMT
602 bool "Svpbmt extension support for supervisor mode page-based memory types"
603 depends on 64BIT && MMU
604 depends on RISCV_ALTERNATIVE
607 Adds support to dynamically detect the presence of the Svpbmt
608 ISA-extension (Supervisor-mode: page-based memory types) and
611 The memory type for a page contains a combination of attributes
612 that indicate the cacheability, idempotency, and ordering
613 properties for access to that page.
615 The Svpbmt extension is only available on 64-bit cpus.
617 If you don't know what to do here, say Y.
619 config TOOLCHAIN_HAS_V
622 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv)
623 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv)
624 depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800
625 depends on AS_HAS_OPTION_ARCH
628 bool "VECTOR extension support"
629 depends on TOOLCHAIN_HAS_V
631 select DYNAMIC_SIGFRAME
634 Say N here if you want to disable all vector related procedure
637 If you don't know what to do here, say Y.
639 config RISCV_ISA_V_DEFAULT_ENABLE
640 bool "Enable userspace Vector by default"
641 depends on RISCV_ISA_V
644 Say Y here if you want to enable Vector in userspace by default.
645 Otherwise, userspace has to make explicit prctl() call to enable
646 Vector, or enable it via the sysctl interface.
648 If you don't know what to do here, say Y.
650 config RISCV_ISA_V_UCOPY_THRESHOLD
651 int "Threshold size for vectorized user copies"
652 depends on RISCV_ISA_V
655 Prefer using vectorized copy_to_user()/copy_from_user() when the
656 workload size exceeds this value.
658 config RISCV_ISA_V_PREEMPTIVE
659 bool "Run kernel-mode Vector with kernel preemption"
660 depends on PREEMPTION
661 depends on RISCV_ISA_V
664 Usually, in-kernel SIMD routines are run with preemption disabled.
665 Functions which envoke long running SIMD thus must yield core's
666 vector unit to prevent blocking other tasks for too long.
668 This config allows kernel to run SIMD without explicitly disable
669 preemption. Enabling this config will result in higher memory
670 consumption due to the allocation of per-task's kernel Vector context.
672 config RISCV_ISA_ZAWRS
673 bool "Zawrs extension support for more efficient busy waiting"
674 depends on RISCV_ALTERNATIVE
677 The Zawrs extension defines instructions to be used in polling loops
678 which allow a hart to enter a low-power state or to trap to the
679 hypervisor while waiting on a store to a memory location. Enable the
680 use of these instructions in the kernel when the Zawrs extension is
683 config TOOLCHAIN_HAS_ZABHA
686 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha)
687 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha)
688 depends on AS_HAS_OPTION_ARCH
690 config RISCV_ISA_ZABHA
691 bool "Zabha extension support for atomic byte/halfword operations"
692 depends on TOOLCHAIN_HAS_ZABHA
693 depends on RISCV_ALTERNATIVE
696 Enable the use of the Zabha ISA-extension to implement kernel
697 byte/halfword atomic memory operations when it is detected at boot.
699 If you don't know what to do here, say Y.
701 config TOOLCHAIN_HAS_ZACAS
704 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas)
705 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas)
706 depends on AS_HAS_OPTION_ARCH
708 config RISCV_ISA_ZACAS
709 bool "Zacas extension support for atomic CAS"
710 depends on TOOLCHAIN_HAS_ZACAS
711 depends on RISCV_ALTERNATIVE
714 Enable the use of the Zacas ISA-extension to implement kernel atomic
715 cmpxchg operations when it is detected at boot.
717 If you don't know what to do here, say Y.
719 config TOOLCHAIN_HAS_ZBB
722 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb)
723 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb)
724 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
725 depends on AS_HAS_OPTION_ARCH
727 # This symbol indicates that the toolchain supports all v1.0 vector crypto
728 # extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once.
729 # binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb.
730 config TOOLCHAIN_HAS_VECTOR_CRYPTO
731 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb)
732 depends on AS_HAS_OPTION_ARCH
735 bool "Zba extension support for bit manipulation instructions"
738 Add support for enabling optimisations in the kernel when the Zba
739 extension is detected at boot.
741 The Zba extension provides instructions to accelerate the generation
742 of addresses that index into arrays of basic data types.
744 If you don't know what to do here, say Y.
747 bool "Zbb extension support for bit manipulation instructions"
748 depends on TOOLCHAIN_HAS_ZBB
749 depends on RISCV_ALTERNATIVE
752 Adds support to dynamically detect the presence of the ZBB
753 extension (basic bit manipulation) and enable its usage.
755 The Zbb extension provides instructions to accelerate a number
756 of bit-specific operations (count bit population, sign extending,
759 If you don't know what to do here, say Y.
761 config TOOLCHAIN_HAS_ZBC
764 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)
765 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)
766 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
767 depends on AS_HAS_OPTION_ARCH
770 bool "Zbc extension support for carry-less multiplication instructions"
771 depends on TOOLCHAIN_HAS_ZBC
773 depends on RISCV_ALTERNATIVE
776 Adds support to dynamically detect the presence of the Zbc
777 extension (carry-less multiplication) and enable its usage.
779 The Zbc extension could accelerate CRC (cyclic redundancy check)
782 If you don't know what to do here, say Y.
784 config RISCV_ISA_ZICBOM
785 bool "Zicbom extension support for non-coherent DMA operation"
787 depends on RISCV_ALTERNATIVE
789 select RISCV_DMA_NONCOHERENT
790 select DMA_DIRECT_REMAP
792 Adds support to dynamically detect the presence of the ZICBOM
793 extension (Cache Block Management Operations) and enable its
796 The Zicbom extension can be used to handle for example
797 non-coherent DMA support on devices that need it.
799 If you don't know what to do here, say Y.
801 config RISCV_ISA_ZICBOZ
802 bool "Zicboz extension support for faster zeroing of memory"
803 depends on RISCV_ALTERNATIVE
806 Enable the use of the Zicboz extension (cbo.zero instruction)
809 The Zicboz extension is used for faster zeroing of memory.
811 If you don't know what to do here, say Y.
813 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
815 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc
816 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd
817 depends on AS_IS_GNU && AS_VERSION >= 23600
819 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer
820 20191213 version, which moves some instructions from the I extension to
821 the Zicsr and Zifencei extensions. This requires explicitly specifying
822 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr
823 and Zifencei are supported in binutils from version 2.36 onwards.
824 To make life easier, and avoid forcing toolchains that default to a
825 newer ISA spec to version 2.2, relax the check to binutils >= 2.36.
826 For clang < 17 or GCC < 11.3.0, for which this is not possible or need
827 special treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC.
829 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC
831 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
832 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16
833 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671
834 depends on (CC_IS_CLANG && CLANG_VERSION < 170000) || (CC_IS_GCC && GCC_VERSION < 110300)
836 Certain versions of clang and GCC do not support zicsr and zifencei via
837 -march. This option causes an older ISA spec compatible with these older
838 versions of clang and GCC to be passed to GAS, which has the same result
839 as passing zicsr and zifencei to -march.
845 Say N here if you want to disable all floating-point related procedure
848 If you don't know what to do here, say Y.
851 bool "Independent irq & softirq stacks" if EXPERT
853 select HAVE_IRQ_EXIT_ON_IRQ_STACK
854 select HAVE_SOFTIRQ_ON_OWN_STACK
856 Add independent irq & softirq stacks for percpu to prevent kernel stack
857 overflows. We may save some memory footprint by disabling IRQ_STACKS.
859 config THREAD_SIZE_ORDER
860 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT
865 Specify the Pages of thread stack size (from 4KB to 64KB), which also
866 affects irq stack size, which is equal to thread stack size.
868 config RISCV_MISALIGNED
871 Embed support for detecting and emulating misaligned
872 scalar or vector loads and stores.
874 config RISCV_SCALAR_MISALIGNED
876 select RISCV_MISALIGNED
877 select SYSCTL_ARCH_UNALIGN_ALLOW
879 Embed support for emulating misaligned loads and stores.
881 config RISCV_VECTOR_MISALIGNED
883 select RISCV_MISALIGNED
884 depends on RISCV_ISA_V
886 Enable detecting support for vector misaligned loads and stores.
889 prompt "Unaligned Accesses Support"
890 default RISCV_PROBE_UNALIGNED_ACCESS
892 This determines the level of support for unaligned accesses. This
893 information is used by the kernel to perform optimizations. It is also
894 exposed to user space via the hwprobe syscall. The hardware will be
895 probed at boot by default.
897 config RISCV_PROBE_UNALIGNED_ACCESS
898 bool "Probe for hardware unaligned access support"
899 select RISCV_SCALAR_MISALIGNED
901 During boot, the kernel will run a series of tests to determine the
902 speed of unaligned accesses. This probing will dynamically determine
903 the speed of unaligned accesses on the underlying system. If unaligned
904 memory accesses trap into the kernel as they are not supported by the
905 system, the kernel will emulate the unaligned accesses to preserve the
908 config RISCV_EMULATED_UNALIGNED_ACCESS
909 bool "Emulate unaligned access where system support is missing"
910 select RISCV_SCALAR_MISALIGNED
912 If unaligned memory accesses trap into the kernel as they are not
913 supported by the system, the kernel will emulate the unaligned
914 accesses to preserve the UABI. When the underlying system does support
915 unaligned accesses, the unaligned accesses are assumed to be slow.
917 config RISCV_SLOW_UNALIGNED_ACCESS
918 bool "Assume the system supports slow unaligned memory accesses"
919 depends on NONPORTABLE
921 Assume that the system supports slow unaligned memory accesses. The
922 kernel and userspace programs may not be able to run at all on systems
923 that do not support unaligned memory accesses.
925 config RISCV_EFFICIENT_UNALIGNED_ACCESS
926 bool "Assume the system supports fast unaligned memory accesses"
927 depends on NONPORTABLE
928 select DCACHE_WORD_ACCESS if MMU
929 select HAVE_EFFICIENT_UNALIGNED_ACCESS
931 Assume that the system supports fast unaligned memory accesses. When
932 enabled, this option improves the performance of the kernel on such
933 systems. However, the kernel and userspace programs will run much more
934 slowly, or will not be able to run at all, on systems that do not
935 support efficient unaligned memory accesses.
940 prompt "Vector unaligned Accesses Support"
941 depends on RISCV_ISA_V
942 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
944 This determines the level of support for vector unaligned accesses. This
945 information is used by the kernel to perform optimizations. It is also
946 exposed to user space via the hwprobe syscall. The hardware will be
947 probed at boot by default.
949 config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
950 bool "Probe speed of vector unaligned accesses"
951 select RISCV_VECTOR_MISALIGNED
952 depends on RISCV_ISA_V
954 During boot, the kernel will run a series of tests to determine the
955 speed of vector unaligned accesses if they are supported. This probing
956 will dynamically determine the speed of vector unaligned accesses on
957 the underlying system if they are supported.
959 config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS
960 bool "Assume the system supports slow vector unaligned memory accesses"
961 depends on NONPORTABLE
963 Assume that the system supports slow vector unaligned memory accesses. The
964 kernel and userspace programs may not be able to run at all on systems
965 that do not support unaligned memory accesses.
967 config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS
968 bool "Assume the system supports fast vector unaligned memory accesses"
969 depends on NONPORTABLE
971 Assume that the system supports fast vector unaligned memory accesses. When
972 enabled, this option improves the performance of the kernel on such
973 systems. However, the kernel and userspace programs will run much more
974 slowly, or will not be able to run at all, on systems that do not
975 support efficient unaligned memory accesses.
979 source "arch/riscv/Kconfig.vendor"
981 endmenu # "Platform type"
983 menu "Kernel features"
985 source "kernel/Kconfig.hz"
988 bool "SBI v0.1 support"
991 This config allows kernel to use SBI v0.1 APIs. This will be
992 deprecated in future once legacy M-mode software are no longer in use.
994 config RISCV_BOOT_SPINWAIT
995 bool "Spinwait booting method"
997 default y if RISCV_SBI_V01 || RISCV_M_MODE
999 This enables support for booting Linux via spinwait method. In the
1000 spinwait method, all cores randomly jump to Linux. One of the cores
1001 gets chosen via lottery and all other keep spinning on a percpu
1002 variable. This method cannot support CPU hotplug and sparse hartid
1003 scheme. It should be only enabled for M-mode Linux or platforms relying
1004 on older firmware without SBI HSM extension. All other platforms should
1005 rely on ordered booting via SBI HSM extension which gets chosen
1006 dynamically at runtime if the firmware supports it.
1008 Since spinwait is incompatible with sparse hart IDs, it requires
1009 NR_CPUS be large enough to contain the physical hart ID of the first
1010 hart to enter Linux.
1012 If unsure what to do here, say N.
1014 config ARCH_SUPPORTS_KEXEC
1017 config ARCH_SELECTS_KEXEC
1020 select HOTPLUG_CPU if SMP
1022 config ARCH_SUPPORTS_KEXEC_FILE
1025 config ARCH_SELECTS_KEXEC_FILE
1027 depends on KEXEC_FILE
1028 select HAVE_IMA_KEXEC if IMA
1031 config ARCH_SUPPORTS_KEXEC_PURGATORY
1032 def_bool ARCH_SUPPORTS_KEXEC_FILE
1034 config ARCH_SUPPORTS_CRASH_DUMP
1037 config ARCH_DEFAULT_CRASH_DUMP
1040 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
1041 def_bool CRASH_RESERVE
1044 bool "Kernel support for 32-bit U-mode"
1046 depends on 64BIT && MMU
1048 This option enables support for a 32-bit U-mode running under a 64-bit
1049 kernel at S-mode. riscv32-specific components such as system calls,
1050 the user helper functions (vdso), signal rt_frame functions and the
1051 ptrace interface are handled appropriately by the kernel.
1053 If you want to execute 32-bit userspace applications, say Y.
1056 bool "Enable paravirtualization code"
1057 depends on RISCV_SBI
1059 This changes the kernel so it can modify itself when it is run
1060 under a hypervisor, potentially improving performance significantly
1061 over full virtualization.
1063 config PARAVIRT_TIME_ACCOUNTING
1064 bool "Paravirtual steal time accounting"
1067 Select this option to enable fine granularity task steal time
1068 accounting. Time spent executing other tasks in parallel with
1069 the current vCPU is discounted from the vCPU power. To account for
1070 that, there can be a small performance impact.
1072 If in doubt, say N here.
1075 bool "Build a relocatable kernel"
1076 depends on MMU && 64BIT && !XIP_KERNEL
1077 select MODULE_SECTIONS if MODULES
1079 This builds a kernel as a Position Independent Executable (PIE),
1080 which retains all relocation metadata required to relocate the
1081 kernel binary at runtime to a different virtual address than the
1082 address it was linked at.
1083 Since RISCV uses the RELA relocation format, this requires a
1084 relocation pass at runtime even if the kernel is loaded at the
1085 same address it was linked at.
1089 config RANDOMIZE_BASE
1090 bool "Randomize the address of the kernel image"
1092 depends on MMU && 64BIT && !XIP_KERNEL
1094 Randomizes the virtual address at which the kernel image is
1095 loaded, as a security feature that deters exploit attempts
1096 relying on knowledge of the location of kernel internals.
1098 It is the bootloader's job to provide entropy, by passing a
1099 random u64 value in /chosen/kaslr-seed at kernel entry.
1101 When booting via the UEFI stub, it will invoke the firmware's
1102 EFI_RNG_PROTOCOL implementation (if available) to supply entropy
1103 to the kernel proper. In addition, it will randomise the physical
1104 location of the kernel Image as well.
1108 endmenu # "Kernel features"
1113 string "Built-in kernel command line"
1115 For most platforms, the arguments for the kernel's command line
1116 are provided at run-time, during boot. However, there are cases
1117 where either no arguments are being provided or the provided
1118 arguments are insufficient or even invalid.
1120 When that occurs, it is possible to define a built-in command
1121 line here and choose how the kernel should use it later on.
1124 prompt "Built-in command line usage"
1125 depends on CMDLINE != ""
1126 default CMDLINE_FALLBACK
1128 Choose how the kernel will handle the provided built-in command
1131 config CMDLINE_FALLBACK
1132 bool "Use bootloader kernel arguments if available"
1134 Use the built-in command line as fallback in case we get nothing
1135 during boot. This is the default behaviour.
1137 config CMDLINE_EXTEND
1138 bool "Extend bootloader kernel arguments"
1140 The command-line arguments provided during boot will be
1141 appended to the built-in command line. This is useful in
1142 cases where the provided arguments are insufficient and
1143 you don't want to or cannot modify them.
1145 config CMDLINE_FORCE
1146 bool "Always use the default kernel command string"
1148 Always use the built-in command line, even if we get one during
1149 boot. This is useful in case you need to override the provided
1150 command line on systems where you don't have or want control
1159 bool "UEFI runtime support"
1160 depends on OF && !XIP_KERNEL
1163 select ARCH_SUPPORTS_ACPI if 64BIT
1164 select EFI_GENERIC_STUB
1165 select EFI_PARAMS_FROM_FDT
1166 select EFI_RUNTIME_WRAPPERS
1172 This option provides support for runtime services provided
1173 by UEFI firmware (such as non-volatile variables, realtime
1174 clock, and platform reset). A UEFI stub is also provided to
1175 allow the kernel to be booted as an EFI application. This
1176 is only useful on systems that have UEFI firmware.
1179 bool "Enable support for SMBIOS (DMI) tables"
1183 This enables SMBIOS/DMI feature for systems.
1185 This option is only useful on systems that have UEFI firmware.
1186 However, even with this option, the resultant kernel should
1187 continue to boot on existing non-UEFI platforms.
1189 config CC_HAVE_STACKPROTECTOR_TLS
1190 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0)
1192 config STACKPROTECTOR_PER_TASK
1194 depends on !RANDSTRUCT
1195 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
1197 config PHYS_RAM_BASE_FIXED
1198 bool "Explicitly specified physical RAM address"
1199 depends on NONPORTABLE
1202 config PHYS_RAM_BASE
1203 hex "Platform Physical RAM address"
1204 depends on PHYS_RAM_BASE_FIXED
1205 default "0x80000000"
1207 This is the physical address of RAM in the system. It has to be
1208 explicitly specified to run early relocations of read-write data
1212 bool "Kernel Execute-In-Place from ROM"
1213 depends on MMU && SPARSEMEM && NONPORTABLE
1214 # This prevents XIP from being enabled by all{yes,mod}config, which
1215 # fail to build since XIP doesn't support large kernels.
1216 depends on !COMPILE_TEST
1217 select PHYS_RAM_BASE_FIXED
1219 Execute-In-Place allows the kernel to run from non-volatile storage
1220 directly addressable by the CPU, such as NOR flash. This saves RAM
1221 space since the text section of the kernel is not loaded from flash
1222 to RAM. Read-write sections, such as the data section and stack,
1223 are still copied to RAM. The XIP kernel is not compressed since
1224 it has to run directly from flash, so it will take more space to
1225 store it. The flash address used to link the kernel object files,
1226 and for storing it, is configuration dependent. Therefore, if you
1227 say Y here, you must know the proper physical address where to
1228 store the kernel image depending on your own flash memory usage.
1230 Also note that the make target becomes "make xipImage" rather than
1231 "make zImage" or "make Image". The final kernel binary to put in
1232 ROM memory will be arch/riscv/boot/xipImage.
1234 SPARSEMEM is required because the kernel text and rodata that are
1235 flash resident are not backed by memmap, then any attempt to get
1236 a struct page on those regions will trigger a fault.
1240 config XIP_PHYS_ADDR
1241 hex "XIP Kernel Physical Location"
1242 depends on XIP_KERNEL
1243 default "0x21000000"
1245 This is the physical address in your flash memory the kernel will
1246 be linked for and stored to. This address is dependent on your
1249 config RISCV_ISA_FALLBACK
1250 bool "Permit falling back to parsing riscv,isa for extension support by default"
1253 Parsing the "riscv,isa" devicetree property has been deprecated and
1254 replaced by a list of explicitly defined strings. For compatibility
1255 with existing platforms, the kernel will fall back to parsing the
1256 "riscv,isa" property if the replacements are not found.
1258 Selecting N here will result in a kernel that does not use the
1259 fallback, unless the commandline "riscv_isa_fallback" parameter is
1262 Please see the dt-binding, located at
1263 Documentation/devicetree/bindings/riscv/extensions.yaml for details
1264 on the replacement properties, "riscv,isa-base" and
1265 "riscv,isa-extensions".
1268 bool "Built-in device tree"
1269 depends on OF && NONPORTABLE
1271 Build a device tree into the Linux image.
1272 This option should be selected if no bootloader is being used.
1276 config BUILTIN_DTB_SOURCE
1277 string "Built-in device tree source"
1278 depends on BUILTIN_DTB
1280 DTS file path (without suffix, relative to arch/riscv/boot/dts)
1281 for the DTS file that will be used to produce the DTB linked into the
1284 endmenu # "Boot options"
1288 default !NONPORTABLE
1293 config ARCH_PROC_KCORE_TEXT
1296 menu "Power management options"
1298 source "kernel/power/Kconfig"
1300 config ARCH_HIBERNATION_POSSIBLE
1303 config ARCH_HIBERNATION_HEADER
1304 def_bool HIBERNATION
1306 config ARCH_SUSPEND_POSSIBLE
1309 endmenu # "Power management options"
1311 menu "CPU Power Management"
1313 source "drivers/cpuidle/Kconfig"
1315 source "drivers/cpufreq/Kconfig"
1317 endmenu # "CPU Power Management"
1319 source "arch/riscv/kvm/Kconfig"
1321 source "drivers/acpi/Kconfig"