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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / acpi / arm64 / iort.c
blob1f7e4c691d9ee35235bec82a9d394c7db5c10648
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2016, Semihalf
4 * Author: Tomasz Nowicki <tn@semihalf.com>
5 *
6 * This file implements early detection/parsing of I/O mapping
7 * reported to OS through firmware via I/O Remapping Table (IORT)
8 * IORT document number: ARM DEN 0049A
9 */
10
11 #define pr_fmt(fmt) "ACPI: IORT: " fmt
12
13 #include <linux/acpi_iort.h>
14 #include <linux/bitfield.h>
15 #include <linux/iommu.h>
16 #include <linux/kernel.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/platform_device.h>
20 #include <linux/slab.h>
21 #include <linux/dma-map-ops.h>
22 #include "init.h"
23
24 #define IORT_TYPE_MASK(type) (1 << (type))
25 #define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP)
26 #define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \
27 (1 << ACPI_IORT_NODE_SMMU_V3))
28
29 struct iort_its_msi_chip {
30 struct list_head list;
31 struct fwnode_handle *fw_node;
32 phys_addr_t base_addr;
33 u32 translation_id;
34 };
35
36 struct iort_fwnode {
37 struct list_head list;
38 struct acpi_iort_node *iort_node;
39 struct fwnode_handle *fwnode;
40 };
41 static LIST_HEAD(iort_fwnode_list);
42 static DEFINE_SPINLOCK(iort_fwnode_lock);
43
44 /**
45 * iort_set_fwnode() - Create iort_fwnode and use it to register
46 * iommu data in the iort_fwnode_list
47 *
48 * @iort_node: IORT table node associated with the IOMMU
49 * @fwnode: fwnode associated with the IORT node
50 *
51 * Returns: 0 on success
52 * <0 on failure
53 */
54 static inline int iort_set_fwnode(struct acpi_iort_node *iort_node,
55 struct fwnode_handle *fwnode)
56 {
57 struct iort_fwnode *np;
58
59 np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC);
60
61 if (WARN_ON(!np))
62 return -ENOMEM;
63
64 INIT_LIST_HEAD(&np->list);
65 np->iort_node = iort_node;
66 np->fwnode = fwnode;
67
68 spin_lock(&iort_fwnode_lock);
69 list_add_tail(&np->list, &iort_fwnode_list);
70 spin_unlock(&iort_fwnode_lock);
71
72 return 0;
73 }
74
75 /**
76 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node
77 *
78 * @node: IORT table node to be looked-up
79 *
80 * Returns: fwnode_handle pointer on success, NULL on failure
81 */
82 static inline struct fwnode_handle *iort_get_fwnode(
83 struct acpi_iort_node *node)
84 {
85 struct iort_fwnode *curr;
86 struct fwnode_handle *fwnode = NULL;
87
88 spin_lock(&iort_fwnode_lock);
89 list_for_each_entry(curr, &iort_fwnode_list, list) {
90 if (curr->iort_node == node) {
91 fwnode = curr->fwnode;
92 break;
93 }
94 }
95 spin_unlock(&iort_fwnode_lock);
96
97 return fwnode;
98 }
99
100 /**
101 * iort_delete_fwnode() - Delete fwnode associated with an IORT node
102 *
103 * @node: IORT table node associated with fwnode to delete
104 */
105 static inline void iort_delete_fwnode(struct acpi_iort_node *node)
106 {
107 struct iort_fwnode *curr, *tmp;
108
109 spin_lock(&iort_fwnode_lock);
110 list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) {
111 if (curr->iort_node == node) {
112 list_del(&curr->list);
113 kfree(curr);
114 break;
115 }
116 }
117 spin_unlock(&iort_fwnode_lock);
118 }
119
120 /**
121 * iort_get_iort_node() - Retrieve iort_node associated with an fwnode
122 *
123 * @fwnode: fwnode associated with device to be looked-up
124 *
125 * Returns: iort_node pointer on success, NULL on failure
126 */
127 static inline struct acpi_iort_node *iort_get_iort_node(
128 struct fwnode_handle *fwnode)
129 {
130 struct iort_fwnode *curr;
131 struct acpi_iort_node *iort_node = NULL;
132
133 spin_lock(&iort_fwnode_lock);
134 list_for_each_entry(curr, &iort_fwnode_list, list) {
135 if (curr->fwnode == fwnode) {
136 iort_node = curr->iort_node;
137 break;
138 }
139 }
140 spin_unlock(&iort_fwnode_lock);
141
142 return iort_node;
143 }
144
145 typedef acpi_status (*iort_find_node_callback)
146 (struct acpi_iort_node *node, void *context);
147
148 /* Root pointer to the mapped IORT table */
149 static struct acpi_table_header *iort_table;
150
151 static LIST_HEAD(iort_msi_chip_list);
152 static DEFINE_SPINLOCK(iort_msi_chip_lock);
153
154 /**
155 * iort_register_domain_token() - register domain token along with related
156 * ITS ID and base address to the list from where we can get it back later on.
157 * @trans_id: ITS ID.
158 * @base: ITS base address.
159 * @fw_node: Domain token.
160 *
161 * Returns: 0 on success, -ENOMEM if no memory when allocating list element
162 */
163 int iort_register_domain_token(int trans_id, phys_addr_t base,
164 struct fwnode_handle *fw_node)
165 {
166 struct iort_its_msi_chip *its_msi_chip;
167
168 its_msi_chip = kzalloc(sizeof(*its_msi_chip), GFP_KERNEL);
169 if (!its_msi_chip)
170 return -ENOMEM;
171
172 its_msi_chip->fw_node = fw_node;
173 its_msi_chip->translation_id = trans_id;
174 its_msi_chip->base_addr = base;
175
176 spin_lock(&iort_msi_chip_lock);
177 list_add(&its_msi_chip->list, &iort_msi_chip_list);
178 spin_unlock(&iort_msi_chip_lock);
179
180 return 0;
181 }
182
183 /**
184 * iort_deregister_domain_token() - Deregister domain token based on ITS ID
185 * @trans_id: ITS ID.
186 *
187 * Returns: none.
188 */
189 void iort_deregister_domain_token(int trans_id)
190 {
191 struct iort_its_msi_chip *its_msi_chip, *t;
192
193 spin_lock(&iort_msi_chip_lock);
194 list_for_each_entry_safe(its_msi_chip, t, &iort_msi_chip_list, list) {
195 if (its_msi_chip->translation_id == trans_id) {
196 list_del(&its_msi_chip->list);
197 kfree(its_msi_chip);
198 break;
199 }
200 }
201 spin_unlock(&iort_msi_chip_lock);
202 }
203
204 /**
205 * iort_find_domain_token() - Find domain token based on given ITS ID
206 * @trans_id: ITS ID.
207 *
208 * Returns: domain token when find on the list, NULL otherwise
209 */
210 struct fwnode_handle *iort_find_domain_token(int trans_id)
211 {
212 struct fwnode_handle *fw_node = NULL;
213 struct iort_its_msi_chip *its_msi_chip;
214
215 spin_lock(&iort_msi_chip_lock);
216 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
217 if (its_msi_chip->translation_id == trans_id) {
218 fw_node = its_msi_chip->fw_node;
219 break;
220 }
221 }
222 spin_unlock(&iort_msi_chip_lock);
223
224 return fw_node;
225 }
226
227 static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
228 iort_find_node_callback callback,
229 void *context)
230 {
231 struct acpi_iort_node *iort_node, *iort_end;
232 struct acpi_table_iort *iort;
233 int i;
234
235 if (!iort_table)
236 return NULL;
237
238 /* Get the first IORT node */
239 iort = (struct acpi_table_iort *)iort_table;
240 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
241 iort->node_offset);
242 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
243 iort_table->length);
244
245 for (i = 0; i < iort->node_count; i++) {
246 if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
247 "IORT node pointer overflows, bad table!\n"))
248 return NULL;
249
250 if (iort_node->type == type &&
251 ACPI_SUCCESS(callback(iort_node, context)))
252 return iort_node;
253
254 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
255 iort_node->length);
256 }
257
258 return NULL;
259 }
260
261 static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
262 void *context)
263 {
264 struct device *dev = context;
265 acpi_status status = AE_NOT_FOUND;
266
267 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
268 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
269 struct acpi_device *adev;
270 struct acpi_iort_named_component *ncomp;
271 struct device *nc_dev = dev;
272
273 /*
274 * Walk the device tree to find a device with an
275 * ACPI companion; there is no point in scanning
276 * IORT for a device matching a named component if
277 * the device does not have an ACPI companion to
278 * start with.
279 */
280 do {
281 adev = ACPI_COMPANION(nc_dev);
282 if (adev)
283 break;
284
285 nc_dev = nc_dev->parent;
286 } while (nc_dev);
287
288 if (!adev)
289 goto out;
290
291 status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf);
292 if (ACPI_FAILURE(status)) {
293 dev_warn(nc_dev, "Can't get device full path name\n");
294 goto out;
295 }
296
297 ncomp = (struct acpi_iort_named_component *)node->node_data;
298 status = !strcmp(ncomp->device_name, buf.pointer) ?
299 AE_OK : AE_NOT_FOUND;
300 acpi_os_free(buf.pointer);
301 } else if (node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
302 struct acpi_iort_root_complex *pci_rc;
303 struct pci_bus *bus;
304
305 bus = to_pci_bus(dev);
306 pci_rc = (struct acpi_iort_root_complex *)node->node_data;
307
308 /*
309 * It is assumed that PCI segment numbers maps one-to-one
310 * with root complexes. Each segment number can represent only
311 * one root complex.
312 */
313 status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
314 AE_OK : AE_NOT_FOUND;
315 }
316 out:
317 return status;
318 }
319
320 static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
321 u32 *rid_out, bool check_overlap)
322 {
323 /* Single mapping does not care for input id */
324 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
325 if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
326 type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
327 *rid_out = map->output_base;
328 return 0;
329 }
330
331 pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
332 map, type);
333 return -ENXIO;
334 }
335
336 if (rid_in < map->input_base ||
337 (rid_in > map->input_base + map->id_count))
338 return -ENXIO;
339
340 if (check_overlap) {
341 /*
342 * We already found a mapping for this input ID at the end of
343 * another region. If it coincides with the start of this
344 * region, we assume the prior match was due to the off-by-1
345 * issue mentioned below, and allow it to be superseded.
346 * Otherwise, things are *really* broken, and we just disregard
347 * duplicate matches entirely to retain compatibility.
348 */
349 pr_err(FW_BUG "[map %p] conflicting mapping for input ID 0x%x\n",
350 map, rid_in);
351 if (rid_in != map->input_base)
352 return -ENXIO;
353
354 pr_err(FW_BUG "applying workaround.\n");
355 }
356
357 *rid_out = map->output_base + (rid_in - map->input_base);
358
359 /*
360 * Due to confusion regarding the meaning of the id_count field (which
361 * carries the number of IDs *minus 1*), we may have to disregard this
362 * match if it is at the end of the range, and overlaps with the start
363 * of another one.
364 */
365 if (map->id_count > 0 && rid_in == map->input_base + map->id_count)
366 return -EAGAIN;
367 return 0;
368 }
369
370 static struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node,
371 u32 *id_out, int index)
372 {
373 struct acpi_iort_node *parent;
374 struct acpi_iort_id_mapping *map;
375
376 if (!node->mapping_offset || !node->mapping_count ||
377 index >= node->mapping_count)
378 return NULL;
379
380 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
381 node->mapping_offset + index * sizeof(*map));
382
383 /* Firmware bug! */
384 if (!map->output_reference) {
385 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
386 node, node->type);
387 return NULL;
388 }
389
390 parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
391 map->output_reference);
392
393 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
394 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
395 node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX ||
396 node->type == ACPI_IORT_NODE_SMMU_V3 ||
397 node->type == ACPI_IORT_NODE_PMCG) {
398 *id_out = map->output_base;
399 return parent;
400 }
401 }
402
403 return NULL;
404 }
405
406 #ifndef ACPI_IORT_SMMU_V3_DEVICEID_VALID
407 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1 << 4)
408 #endif
409
410 static int iort_get_id_mapping_index(struct acpi_iort_node *node)
411 {
412 struct acpi_iort_smmu_v3 *smmu;
413 struct acpi_iort_pmcg *pmcg;
414
415 switch (node->type) {
416 case ACPI_IORT_NODE_SMMU_V3:
417 /*
418 * SMMUv3 dev ID mapping index was introduced in revision 1
419 * table, not available in revision 0
420 */
421 if (node->revision < 1)
422 return -EINVAL;
423
424 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
425 /*
426 * Until IORT E.e (node rev. 5), the ID mapping index was
427 * defined to be valid unless all interrupts are GSIV-based.
428 */
429 if (node->revision < 5) {
430 if (smmu->event_gsiv && smmu->pri_gsiv &&
431 smmu->gerr_gsiv && smmu->sync_gsiv)
432 return -EINVAL;
433 } else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) {
434 return -EINVAL;
435 }
436
437 if (smmu->id_mapping_index >= node->mapping_count) {
438 pr_err(FW_BUG "[node %p type %d] ID mapping index overflows valid mappings\n",
439 node, node->type);
440 return -EINVAL;
441 }
442
443 return smmu->id_mapping_index;
444 case ACPI_IORT_NODE_PMCG:
445 pmcg = (struct acpi_iort_pmcg *)node->node_data;
446 if (pmcg->overflow_gsiv || node->mapping_count == 0)
447 return -EINVAL;
448
449 return 0;
450 default:
451 return -EINVAL;
452 }
453 }
454
455 static struct acpi_iort_node *iort_node_map_id(struct acpi_iort_node *node,
456 u32 id_in, u32 *id_out,
457 u8 type_mask)
458 {
459 u32 id = id_in;
460
461 /* Parse the ID mapping tree to find specified node type */
462 while (node) {
463 struct acpi_iort_id_mapping *map;
464 int i, index, rc = 0;
465 u32 out_ref = 0, map_id = id;
466
467 if (IORT_TYPE_MASK(node->type) & type_mask) {
468 if (id_out)
469 *id_out = id;
470 return node;
471 }
472
473 if (!node->mapping_offset || !node->mapping_count)
474 goto fail_map;
475
476 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
477 node->mapping_offset);
478
479 /* Firmware bug! */
480 if (!map->output_reference) {
481 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
482 node, node->type);
483 goto fail_map;
484 }
485
486 /*
487 * Get the special ID mapping index (if any) and skip its
488 * associated ID map to prevent erroneous multi-stage
489 * IORT ID translations.
490 */
491 index = iort_get_id_mapping_index(node);
492
493 /* Do the ID translation */
494 for (i = 0; i < node->mapping_count; i++, map++) {
495 /* if it is special mapping index, skip it */
496 if (i == index)
497 continue;
498
499 rc = iort_id_map(map, node->type, map_id, &id, out_ref);
500 if (!rc)
501 break;
502 if (rc == -EAGAIN)
503 out_ref = map->output_reference;
504 }
505
506 if (i == node->mapping_count && !out_ref)
507 goto fail_map;
508
509 node = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
510 rc ? out_ref : map->output_reference);
511 }
512
513 fail_map:
514 /* Map input ID to output ID unchanged on mapping failure */
515 if (id_out)
516 *id_out = id_in;
517
518 return NULL;
519 }
520
521 static struct acpi_iort_node *iort_node_map_platform_id(
522 struct acpi_iort_node *node, u32 *id_out, u8 type_mask,
523 int index)
524 {
525 struct acpi_iort_node *parent;
526 u32 id;
527
528 /* step 1: retrieve the initial dev id */
529 parent = iort_node_get_id(node, &id, index);
530 if (!parent)
531 return NULL;
532
533 /*
534 * optional step 2: map the initial dev id if its parent is not
535 * the target type we want, map it again for the use cases such
536 * as NC (named component) -> SMMU -> ITS. If the type is matched,
537 * return the initial dev id and its parent pointer directly.
538 */
539 if (!(IORT_TYPE_MASK(parent->type) & type_mask))
540 parent = iort_node_map_id(parent, id, id_out, type_mask);
541 else
542 if (id_out)
543 *id_out = id;
544
545 return parent;
546 }
547
548 static struct acpi_iort_node *iort_find_dev_node(struct device *dev)
549 {
550 struct pci_bus *pbus;
551
552 if (!dev_is_pci(dev)) {
553 struct acpi_iort_node *node;
554 /*
555 * scan iort_fwnode_list to see if it's an iort platform
556 * device (such as SMMU, PMCG),its iort node already cached
557 * and associated with fwnode when iort platform devices
558 * were initialized.
559 */
560 node = iort_get_iort_node(dev->fwnode);
561 if (node)
562 return node;
563 /*
564 * if not, then it should be a platform device defined in
565 * DSDT/SSDT (with Named Component node in IORT)
566 */
567 return iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
568 iort_match_node_callback, dev);
569 }
570
571 pbus = to_pci_dev(dev)->bus;
572
573 return iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
574 iort_match_node_callback, &pbus->dev);
575 }
576
577 /**
578 * iort_msi_map_id() - Map a MSI input ID for a device
579 * @dev: The device for which the mapping is to be done.
580 * @input_id: The device input ID.
581 *
582 * Returns: mapped MSI ID on success, input ID otherwise
583 */
584 u32 iort_msi_map_id(struct device *dev, u32 input_id)
585 {
586 struct acpi_iort_node *node;
587 u32 dev_id;
588
589 node = iort_find_dev_node(dev);
590 if (!node)
591 return input_id;
592
593 iort_node_map_id(node, input_id, &dev_id, IORT_MSI_TYPE);
594 return dev_id;
595 }
596
597 /**
598 * iort_pmsi_get_dev_id() - Get the device id for a device
599 * @dev: The device for which the mapping is to be done.
600 * @dev_id: The device ID found.
601 *
602 * Returns: 0 for successful find a dev id, -ENODEV on error
603 */
604 int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
605 {
606 int i, index;
607 struct acpi_iort_node *node;
608
609 node = iort_find_dev_node(dev);
610 if (!node)
611 return -ENODEV;
612
613 index = iort_get_id_mapping_index(node);
614 /* if there is a valid index, go get the dev_id directly */
615 if (index >= 0) {
616 if (iort_node_get_id(node, dev_id, index))
617 return 0;
618 } else {
619 for (i = 0; i < node->mapping_count; i++) {
620 if (iort_node_map_platform_id(node, dev_id,
621 IORT_MSI_TYPE, i))
622 return 0;
623 }
624 }
625
626 return -ENODEV;
627 }
628
629 static int __maybe_unused iort_find_its_base(u32 its_id, phys_addr_t *base)
630 {
631 struct iort_its_msi_chip *its_msi_chip;
632 int ret = -ENODEV;
633
634 spin_lock(&iort_msi_chip_lock);
635 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
636 if (its_msi_chip->translation_id == its_id) {
637 *base = its_msi_chip->base_addr;
638 ret = 0;
639 break;
640 }
641 }
642 spin_unlock(&iort_msi_chip_lock);
643
644 return ret;
645 }
646
647 /**
648 * iort_dev_find_its_id() - Find the ITS identifier for a device
649 * @dev: The device.
650 * @id: Device's ID
651 * @idx: Index of the ITS identifier list.
652 * @its_id: ITS identifier.
653 *
654 * Returns: 0 on success, appropriate error value otherwise
655 */
656 static int iort_dev_find_its_id(struct device *dev, u32 id,
657 unsigned int idx, int *its_id)
658 {
659 struct acpi_iort_its_group *its;
660 struct acpi_iort_node *node;
661
662 node = iort_find_dev_node(dev);
663 if (!node)
664 return -ENXIO;
665
666 node = iort_node_map_id(node, id, NULL, IORT_MSI_TYPE);
667 if (!node)
668 return -ENXIO;
669
670 /* Move to ITS specific data */
671 its = (struct acpi_iort_its_group *)node->node_data;
672 if (idx >= its->its_count) {
673 dev_err(dev, "requested ITS ID index [%d] overruns ITS entries [%d]\n",
674 idx, its->its_count);
675 return -ENXIO;
676 }
677
678 *its_id = its->identifiers[idx];
679 return 0;
680 }
681
682 /**
683 * iort_get_device_domain() - Find MSI domain related to a device
684 * @dev: The device.
685 * @id: Requester ID for the device.
686 * @bus_token: irq domain bus token.
687 *
688 * Returns: the MSI domain for this device, NULL otherwise
689 */
690 struct irq_domain *iort_get_device_domain(struct device *dev, u32 id,
691 enum irq_domain_bus_token bus_token)
692 {
693 struct fwnode_handle *handle;
694 int its_id;
695
696 if (iort_dev_find_its_id(dev, id, 0, &its_id))
697 return NULL;
698
699 handle = iort_find_domain_token(its_id);
700 if (!handle)
701 return NULL;
702
703 return irq_find_matching_fwnode(handle, bus_token);
704 }
705
706 static void iort_set_device_domain(struct device *dev,
707 struct acpi_iort_node *node)
708 {
709 struct acpi_iort_its_group *its;
710 struct acpi_iort_node *msi_parent;
711 struct acpi_iort_id_mapping *map;
712 struct fwnode_handle *iort_fwnode;
713 struct irq_domain *domain;
714 int index;
715
716 index = iort_get_id_mapping_index(node);
717 if (index < 0)
718 return;
719
720 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
721 node->mapping_offset + index * sizeof(*map));
722
723 /* Firmware bug! */
724 if (!map->output_reference ||
725 !(map->flags & ACPI_IORT_ID_SINGLE_MAPPING)) {
726 pr_err(FW_BUG "[node %p type %d] Invalid MSI mapping\n",
727 node, node->type);
728 return;
729 }
730
731 msi_parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
732 map->output_reference);
733
734 if (!msi_parent || msi_parent->type != ACPI_IORT_NODE_ITS_GROUP)
735 return;
736
737 /* Move to ITS specific data */
738 its = (struct acpi_iort_its_group *)msi_parent->node_data;
739
740 iort_fwnode = iort_find_domain_token(its->identifiers[0]);
741 if (!iort_fwnode)
742 return;
743
744 domain = irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
745 if (domain)
746 dev_set_msi_domain(dev, domain);
747 }
748
749 /**
750 * iort_get_platform_device_domain() - Find MSI domain related to a
751 * platform device
752 * @dev: the dev pointer associated with the platform device
753 *
754 * Returns: the MSI domain for this device, NULL otherwise
755 */
756 static struct irq_domain *iort_get_platform_device_domain(struct device *dev)
757 {
758 struct acpi_iort_node *node, *msi_parent = NULL;
759 struct fwnode_handle *iort_fwnode;
760 struct acpi_iort_its_group *its;
761 int i;
762
763 /* find its associated iort node */
764 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
765 iort_match_node_callback, dev);
766 if (!node)
767 return NULL;
768
769 /* then find its msi parent node */
770 for (i = 0; i < node->mapping_count; i++) {
771 msi_parent = iort_node_map_platform_id(node, NULL,
772 IORT_MSI_TYPE, i);
773 if (msi_parent)
774 break;
775 }
776
777 if (!msi_parent)
778 return NULL;
779
780 /* Move to ITS specific data */
781 its = (struct acpi_iort_its_group *)msi_parent->node_data;
782
783 iort_fwnode = iort_find_domain_token(its->identifiers[0]);
784 if (!iort_fwnode)
785 return NULL;
786
787 return irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
788 }
789
790 void acpi_configure_pmsi_domain(struct device *dev)
791 {
792 struct irq_domain *msi_domain;
793
794 msi_domain = iort_get_platform_device_domain(dev);
795 if (msi_domain)
796 dev_set_msi_domain(dev, msi_domain);
797 }
798
799 #ifdef CONFIG_IOMMU_API
800 static void iort_rmr_free(struct device *dev,
801 struct iommu_resv_region *region)
802 {
803 struct iommu_iort_rmr_data *rmr_data;
804
805 rmr_data = container_of(region, struct iommu_iort_rmr_data, rr);
806 kfree(rmr_data->sids);
807 kfree(rmr_data);
808 }
809
810 static struct iommu_iort_rmr_data *iort_rmr_alloc(
811 struct acpi_iort_rmr_desc *rmr_desc,
812 int prot, enum iommu_resv_type type,
813 u32 *sids, u32 num_sids)
814 {
815 struct iommu_iort_rmr_data *rmr_data;
816 struct iommu_resv_region *region;
817 u32 *sids_copy;
818 u64 addr = rmr_desc->base_address, size = rmr_desc->length;
819
820 rmr_data = kmalloc(sizeof(*rmr_data), GFP_KERNEL);
821 if (!rmr_data)
822 return NULL;
823
824 /* Create a copy of SIDs array to associate with this rmr_data */
825 sids_copy = kmemdup_array(sids, num_sids, sizeof(*sids), GFP_KERNEL);
826 if (!sids_copy) {
827 kfree(rmr_data);
828 return NULL;
829 }
830 rmr_data->sids = sids_copy;
831 rmr_data->num_sids = num_sids;
832
833 if (!IS_ALIGNED(addr, SZ_64K) || !IS_ALIGNED(size, SZ_64K)) {
834 /* PAGE align base addr and size */
835 addr &= PAGE_MASK;
836 size = PAGE_ALIGN(size + offset_in_page(rmr_desc->base_address));
837
838 pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] not aligned to 64K, continue with [0x%llx - 0x%llx]\n",
839 rmr_desc->base_address,
840 rmr_desc->base_address + rmr_desc->length - 1,
841 addr, addr + size - 1);
842 }
843
844 region = &rmr_data->rr;
845 INIT_LIST_HEAD(&region->list);
846 region->start = addr;
847 region->length = size;
848 region->prot = prot;
849 region->type = type;
850 region->free = iort_rmr_free;
851
852 return rmr_data;
853 }
854
855 static void iort_rmr_desc_check_overlap(struct acpi_iort_rmr_desc *desc,
856 u32 count)
857 {
858 int i, j;
859
860 for (i = 0; i < count; i++) {
861 u64 end, start = desc[i].base_address, length = desc[i].length;
862
863 if (!length) {
864 pr_err(FW_BUG "RMR descriptor[0x%llx] with zero length, continue anyway\n",
865 start);
866 continue;
867 }
868
869 end = start + length - 1;
870
871 /* Check for address overlap */
872 for (j = i + 1; j < count; j++) {
873 u64 e_start = desc[j].base_address;
874 u64 e_end = e_start + desc[j].length - 1;
875
876 if (start <= e_end && end >= e_start)
877 pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] overlaps, continue anyway\n",
878 start, end);
879 }
880 }
881 }
882
883 /*
884 * Please note, we will keep the already allocated RMR reserve
885 * regions in case of a memory allocation failure.
886 */
887 static void iort_get_rmrs(struct acpi_iort_node *node,
888 struct acpi_iort_node *smmu,
889 u32 *sids, u32 num_sids,
890 struct list_head *head)
891 {
892 struct acpi_iort_rmr *rmr = (struct acpi_iort_rmr *)node->node_data;
893 struct acpi_iort_rmr_desc *rmr_desc;
894 int i;
895
896 rmr_desc = ACPI_ADD_PTR(struct acpi_iort_rmr_desc, node,
897 rmr->rmr_offset);
898
899 iort_rmr_desc_check_overlap(rmr_desc, rmr->rmr_count);
900
901 for (i = 0; i < rmr->rmr_count; i++, rmr_desc++) {
902 struct iommu_iort_rmr_data *rmr_data;
903 enum iommu_resv_type type;
904 int prot = IOMMU_READ | IOMMU_WRITE;
905
906 if (rmr->flags & ACPI_IORT_RMR_REMAP_PERMITTED)
907 type = IOMMU_RESV_DIRECT_RELAXABLE;
908 else
909 type = IOMMU_RESV_DIRECT;
910
911 if (rmr->flags & ACPI_IORT_RMR_ACCESS_PRIVILEGE)
912 prot |= IOMMU_PRIV;
913
914 /* Attributes 0x00 - 0x03 represents device memory */
915 if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) <=
916 ACPI_IORT_RMR_ATTR_DEVICE_GRE)
917 prot |= IOMMU_MMIO;
918 else if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) ==
919 ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB)
920 prot |= IOMMU_CACHE;
921
922 rmr_data = iort_rmr_alloc(rmr_desc, prot, type,
923 sids, num_sids);
924 if (!rmr_data)
925 return;
926
927 list_add_tail(&rmr_data->rr.list, head);
928 }
929 }
930
931 static u32 *iort_rmr_alloc_sids(u32 *sids, u32 count, u32 id_start,
932 u32 new_count)
933 {
934 u32 *new_sids;
935 u32 total_count = count + new_count;
936 int i;
937
938 new_sids = krealloc_array(sids, count + new_count,
939 sizeof(*new_sids), GFP_KERNEL);
940 if (!new_sids)
941 return NULL;
942
943 for (i = count; i < total_count; i++)
944 new_sids[i] = id_start++;
945
946 return new_sids;
947 }
948
949 static bool iort_rmr_has_dev(struct device *dev, u32 id_start,
950 u32 id_count)
951 {
952 int i;
953 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
954
955 /*
956 * Make sure the kernel has preserved the boot firmware PCIe
957 * configuration. This is required to ensure that the RMR PCIe
958 * StreamIDs are still valid (Refer: ARM DEN 0049E.d Section 3.1.1.5).
959 */
960 if (dev_is_pci(dev)) {
961 struct pci_dev *pdev = to_pci_dev(dev);
962 struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
963
964 if (!host->preserve_config)
965 return false;
966 }
967
968 for (i = 0; i < fwspec->num_ids; i++) {
969 if (fwspec->ids[i] >= id_start &&
970 fwspec->ids[i] <= id_start + id_count)
971 return true;
972 }
973
974 return false;
975 }
976
977 static void iort_node_get_rmr_info(struct acpi_iort_node *node,
978 struct acpi_iort_node *iommu,
979 struct device *dev, struct list_head *head)
980 {
981 struct acpi_iort_node *smmu = NULL;
982 struct acpi_iort_rmr *rmr;
983 struct acpi_iort_id_mapping *map;
984 u32 *sids = NULL;
985 u32 num_sids = 0;
986 int i;
987
988 if (!node->mapping_offset || !node->mapping_count) {
989 pr_err(FW_BUG "Invalid ID mapping, skipping RMR node %p\n",
990 node);
991 return;
992 }
993
994 rmr = (struct acpi_iort_rmr *)node->node_data;
995 if (!rmr->rmr_offset || !rmr->rmr_count)
996 return;
997
998 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
999 node->mapping_offset);
1000
1001 /*
1002 * Go through the ID mappings and see if we have a match for SMMU
1003 * and dev(if !NULL). If found, get the sids for the Node.
1004 * Please note, id_count is equal to the number of IDs in the
1005 * range minus one.
1006 */
1007 for (i = 0; i < node->mapping_count; i++, map++) {
1008 struct acpi_iort_node *parent;
1009
1010 parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
1011 map->output_reference);
1012 if (parent != iommu)
1013 continue;
1014
1015 /* If dev is valid, check RMR node corresponds to the dev SID */
1016 if (dev && !iort_rmr_has_dev(dev, map->output_base,
1017 map->id_count))
1018 continue;
1019
1020 /* Retrieve SIDs associated with the Node. */
1021 sids = iort_rmr_alloc_sids(sids, num_sids, map->output_base,
1022 map->id_count + 1);
1023 if (!sids)
1024 return;
1025
1026 num_sids += map->id_count + 1;
1027 }
1028
1029 if (!sids)
1030 return;
1031
1032 iort_get_rmrs(node, smmu, sids, num_sids, head);
1033 kfree(sids);
1034 }
1035
1036 static void iort_find_rmrs(struct acpi_iort_node *iommu, struct device *dev,
1037 struct list_head *head)
1038 {
1039 struct acpi_table_iort *iort;
1040 struct acpi_iort_node *iort_node, *iort_end;
1041 int i;
1042
1043 /* Only supports ARM DEN 0049E.d onwards */
1044 if (iort_table->revision < 5)
1045 return;
1046
1047 iort = (struct acpi_table_iort *)iort_table;
1048
1049 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1050 iort->node_offset);
1051 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1052 iort_table->length);
1053
1054 for (i = 0; i < iort->node_count; i++) {
1055 if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
1056 "IORT node pointer overflows, bad table!\n"))
1057 return;
1058
1059 if (iort_node->type == ACPI_IORT_NODE_RMR)
1060 iort_node_get_rmr_info(iort_node, iommu, dev, head);
1061
1062 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
1063 iort_node->length);
1064 }
1065 }
1066
1067 /*
1068 * Populate the RMR list associated with a given IOMMU and dev(if provided).
1069 * If dev is NULL, the function populates all the RMRs associated with the
1070 * given IOMMU.
1071 */
1072 static void iort_iommu_rmr_get_resv_regions(struct fwnode_handle *iommu_fwnode,
1073 struct device *dev,
1074 struct list_head *head)
1075 {
1076 struct acpi_iort_node *iommu;
1077
1078 iommu = iort_get_iort_node(iommu_fwnode);
1079 if (!iommu)
1080 return;
1081
1082 iort_find_rmrs(iommu, dev, head);
1083 }
1084
1085 static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev)
1086 {
1087 struct acpi_iort_node *iommu;
1088 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1089
1090 iommu = iort_get_iort_node(fwspec->iommu_fwnode);
1091
1092 if (iommu && (iommu->type == ACPI_IORT_NODE_SMMU_V3)) {
1093 struct acpi_iort_smmu_v3 *smmu;
1094
1095 smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
1096 if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
1097 return iommu;
1098 }
1099
1100 return NULL;
1101 }
1102
1103 /*
1104 * Retrieve platform specific HW MSI reserve regions.
1105 * The ITS interrupt translation spaces (ITS_base + SZ_64K, SZ_64K)
1106 * associated with the device are the HW MSI reserved regions.
1107 */
1108 static void iort_iommu_msi_get_resv_regions(struct device *dev,
1109 struct list_head *head)
1110 {
1111 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1112 struct acpi_iort_its_group *its;
1113 struct acpi_iort_node *iommu_node, *its_node = NULL;
1114 int i;
1115
1116 iommu_node = iort_get_msi_resv_iommu(dev);
1117 if (!iommu_node)
1118 return;
1119
1120 /*
1121 * Current logic to reserve ITS regions relies on HW topologies
1122 * where a given PCI or named component maps its IDs to only one
1123 * ITS group; if a PCI or named component can map its IDs to
1124 * different ITS groups through IORT mappings this function has
1125 * to be reworked to ensure we reserve regions for all ITS groups
1126 * a given PCI or named component may map IDs to.
1127 */
1128
1129 for (i = 0; i < fwspec->num_ids; i++) {
1130 its_node = iort_node_map_id(iommu_node,
1131 fwspec->ids[i],
1132 NULL, IORT_MSI_TYPE);
1133 if (its_node)
1134 break;
1135 }
1136
1137 if (!its_node)
1138 return;
1139
1140 /* Move to ITS specific data */
1141 its = (struct acpi_iort_its_group *)its_node->node_data;
1142
1143 for (i = 0; i < its->its_count; i++) {
1144 phys_addr_t base;
1145
1146 if (!iort_find_its_base(its->identifiers[i], &base)) {
1147 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
1148 struct iommu_resv_region *region;
1149
1150 region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K,
1151 prot, IOMMU_RESV_MSI,
1152 GFP_KERNEL);
1153 if (region)
1154 list_add_tail(&region->list, head);
1155 }
1156 }
1157 }
1158
1159 /**
1160 * iort_iommu_get_resv_regions - Generic helper to retrieve reserved regions.
1161 * @dev: Device from iommu_get_resv_regions()
1162 * @head: Reserved region list from iommu_get_resv_regions()
1163 */
1164 void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head)
1165 {
1166 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
1167
1168 iort_iommu_msi_get_resv_regions(dev, head);
1169 iort_iommu_rmr_get_resv_regions(fwspec->iommu_fwnode, dev, head);
1170 }
1171
1172 /**
1173 * iort_get_rmr_sids - Retrieve IORT RMR node reserved regions with
1174 * associated StreamIDs information.
1175 * @iommu_fwnode: fwnode associated with IOMMU
1176 * @head: Resereved region list
1177 */
1178 void iort_get_rmr_sids(struct fwnode_handle *iommu_fwnode,
1179 struct list_head *head)
1180 {
1181 iort_iommu_rmr_get_resv_regions(iommu_fwnode, NULL, head);
1182 }
1183 EXPORT_SYMBOL_GPL(iort_get_rmr_sids);
1184
1185 /**
1186 * iort_put_rmr_sids - Free memory allocated for RMR reserved regions.
1187 * @iommu_fwnode: fwnode associated with IOMMU
1188 * @head: Resereved region list
1189 */
1190 void iort_put_rmr_sids(struct fwnode_handle *iommu_fwnode,
1191 struct list_head *head)
1192 {
1193 struct iommu_resv_region *entry, *next;
1194
1195 list_for_each_entry_safe(entry, next, head, list)
1196 entry->free(NULL, entry);
1197 }
1198 EXPORT_SYMBOL_GPL(iort_put_rmr_sids);
1199
1200 static inline bool iort_iommu_driver_enabled(u8 type)
1201 {
1202 switch (type) {
1203 case ACPI_IORT_NODE_SMMU_V3:
1204 return IS_ENABLED(CONFIG_ARM_SMMU_V3);
1205 case ACPI_IORT_NODE_SMMU:
1206 return IS_ENABLED(CONFIG_ARM_SMMU);
1207 default:
1208 pr_warn("IORT node type %u does not describe an SMMU\n", type);
1209 return false;
1210 }
1211 }
1212
1213 static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
1214 {
1215 struct acpi_iort_root_complex *pci_rc;
1216
1217 pci_rc = (struct acpi_iort_root_complex *)node->node_data;
1218 return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
1219 }
1220
1221 static bool iort_pci_rc_supports_canwbs(struct acpi_iort_node *node)
1222 {
1223 struct acpi_iort_memory_access *memory_access;
1224 struct acpi_iort_root_complex *pci_rc;
1225
1226 pci_rc = (struct acpi_iort_root_complex *)node->node_data;
1227 memory_access =
1228 (struct acpi_iort_memory_access *)&pci_rc->memory_properties;
1229 return memory_access->memory_flags & ACPI_IORT_MF_CANWBS;
1230 }
1231
1232 static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node,
1233 u32 streamid)
1234 {
1235 struct fwnode_handle *iort_fwnode;
1236
1237 /* If there's no SMMU driver at all, give up now */
1238 if (!node || !iort_iommu_driver_enabled(node->type))
1239 return -ENODEV;
1240
1241 iort_fwnode = iort_get_fwnode(node);
1242 if (!iort_fwnode)
1243 return -ENODEV;
1244
1245 /*
1246 * If the SMMU drivers are enabled but not loaded/probed
1247 * yet, this will defer.
1248 */
1249 return acpi_iommu_fwspec_init(dev, streamid, iort_fwnode);
1250 }
1251
1252 struct iort_pci_alias_info {
1253 struct device *dev;
1254 struct acpi_iort_node *node;
1255 };
1256
1257 static int iort_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
1258 {
1259 struct iort_pci_alias_info *info = data;
1260 struct acpi_iort_node *parent;
1261 u32 streamid;
1262
1263 parent = iort_node_map_id(info->node, alias, &streamid,
1264 IORT_IOMMU_TYPE);
1265 return iort_iommu_xlate(info->dev, parent, streamid);
1266 }
1267
1268 static void iort_named_component_init(struct device *dev,
1269 struct acpi_iort_node *node)
1270 {
1271 struct property_entry props[3] = {};
1272 struct acpi_iort_named_component *nc;
1273
1274 nc = (struct acpi_iort_named_component *)node->node_data;
1275 props[0] = PROPERTY_ENTRY_U32("pasid-num-bits",
1276 FIELD_GET(ACPI_IORT_NC_PASID_BITS,
1277 nc->node_flags));
1278 if (nc->node_flags & ACPI_IORT_NC_STALL_SUPPORTED)
1279 props[1] = PROPERTY_ENTRY_BOOL("dma-can-stall");
1280
1281 if (device_create_managed_software_node(dev, props, NULL))
1282 dev_warn(dev, "Could not add device properties\n");
1283 }
1284
1285 static int iort_nc_iommu_map(struct device *dev, struct acpi_iort_node *node)
1286 {
1287 struct acpi_iort_node *parent;
1288 int err = -ENODEV, i = 0;
1289 u32 streamid = 0;
1290
1291 do {
1292
1293 parent = iort_node_map_platform_id(node, &streamid,
1294 IORT_IOMMU_TYPE,
1295 i++);
1296
1297 if (parent)
1298 err = iort_iommu_xlate(dev, parent, streamid);
1299 } while (parent && !err);
1300
1301 return err;
1302 }
1303
1304 static int iort_nc_iommu_map_id(struct device *dev,
1305 struct acpi_iort_node *node,
1306 const u32 *in_id)
1307 {
1308 struct acpi_iort_node *parent;
1309 u32 streamid;
1310
1311 parent = iort_node_map_id(node, *in_id, &streamid, IORT_IOMMU_TYPE);
1312 if (parent)
1313 return iort_iommu_xlate(dev, parent, streamid);
1314
1315 return -ENODEV;
1316 }
1317
1318
1319 /**
1320 * iort_iommu_configure_id - Set-up IOMMU configuration for a device.
1321 *
1322 * @dev: device to configure
1323 * @id_in: optional input id const value pointer
1324 *
1325 * Returns: 0 on success, <0 on failure
1326 */
1327 int iort_iommu_configure_id(struct device *dev, const u32 *id_in)
1328 {
1329 struct acpi_iort_node *node;
1330 int err = -ENODEV;
1331
1332 if (dev_is_pci(dev)) {
1333 struct iommu_fwspec *fwspec;
1334 struct pci_bus *bus = to_pci_dev(dev)->bus;
1335 struct iort_pci_alias_info info = { .dev = dev };
1336
1337 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1338 iort_match_node_callback, &bus->dev);
1339 if (!node)
1340 return -ENODEV;
1341
1342 info.node = node;
1343 err = pci_for_each_dma_alias(to_pci_dev(dev),
1344 iort_pci_iommu_init, &info);
1345
1346 fwspec = dev_iommu_fwspec_get(dev);
1347 if (fwspec && iort_pci_rc_supports_ats(node))
1348 fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
1349 if (fwspec && iort_pci_rc_supports_canwbs(node))
1350 fwspec->flags |= IOMMU_FWSPEC_PCI_RC_CANWBS;
1351 } else {
1352 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1353 iort_match_node_callback, dev);
1354 if (!node)
1355 return -ENODEV;
1356
1357 err = id_in ? iort_nc_iommu_map_id(dev, node, id_in) :
1358 iort_nc_iommu_map(dev, node);
1359
1360 if (!err)
1361 iort_named_component_init(dev, node);
1362 }
1363
1364 return err;
1365 }
1366
1367 #else
1368 void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head)
1369 { }
1370 int iort_iommu_configure_id(struct device *dev, const u32 *input_id)
1371 { return -ENODEV; }
1372 #endif
1373
1374 static int nc_dma_get_range(struct device *dev, u64 *limit)
1375 {
1376 struct acpi_iort_node *node;
1377 struct acpi_iort_named_component *ncomp;
1378
1379 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1380 iort_match_node_callback, dev);
1381 if (!node)
1382 return -ENODEV;
1383
1384 ncomp = (struct acpi_iort_named_component *)node->node_data;
1385
1386 if (!ncomp->memory_address_limit) {
1387 pr_warn(FW_BUG "Named component missing memory address limit\n");
1388 return -EINVAL;
1389 }
1390
1391 *limit = ncomp->memory_address_limit >= 64 ? U64_MAX :
1392 (1ULL << ncomp->memory_address_limit) - 1;
1393
1394 return 0;
1395 }
1396
1397 static int rc_dma_get_range(struct device *dev, u64 *limit)
1398 {
1399 struct acpi_iort_node *node;
1400 struct acpi_iort_root_complex *rc;
1401 struct pci_bus *pbus = to_pci_dev(dev)->bus;
1402
1403 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1404 iort_match_node_callback, &pbus->dev);
1405 if (!node || node->revision < 1)
1406 return -ENODEV;
1407
1408 rc = (struct acpi_iort_root_complex *)node->node_data;
1409
1410 if (!rc->memory_address_limit) {
1411 pr_warn(FW_BUG "Root complex missing memory address limit\n");
1412 return -EINVAL;
1413 }
1414
1415 *limit = rc->memory_address_limit >= 64 ? U64_MAX :
1416 (1ULL << rc->memory_address_limit) - 1;
1417
1418 return 0;
1419 }
1420
1421 /**
1422 * iort_dma_get_ranges() - Look up DMA addressing limit for the device
1423 * @dev: device to lookup
1424 * @limit: DMA limit result pointer
1425 *
1426 * Return: 0 on success, an error otherwise.
1427 */
1428 int iort_dma_get_ranges(struct device *dev, u64 *limit)
1429 {
1430 if (dev_is_pci(dev))
1431 return rc_dma_get_range(dev, limit);
1432 else
1433 return nc_dma_get_range(dev, limit);
1434 }
1435
1436 static void __init acpi_iort_register_irq(int hwirq, const char *name,
1437 int trigger,
1438 struct resource *res)
1439 {
1440 int irq = acpi_register_gsi(NULL, hwirq, trigger,
1441 ACPI_ACTIVE_HIGH);
1442
1443 if (irq <= 0) {
1444 pr_err("could not register gsi hwirq %d name [%s]\n", hwirq,
1445 name);
1446 return;
1447 }
1448
1449 res->start = irq;
1450 res->end = irq;
1451 res->flags = IORESOURCE_IRQ;
1452 res->name = name;
1453 }
1454
1455 static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
1456 {
1457 struct acpi_iort_smmu_v3 *smmu;
1458 /* Always present mem resource */
1459 int num_res = 1;
1460
1461 /* Retrieve SMMUv3 specific data */
1462 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1463
1464 if (smmu->event_gsiv)
1465 num_res++;
1466
1467 if (smmu->pri_gsiv)
1468 num_res++;
1469
1470 if (smmu->gerr_gsiv)
1471 num_res++;
1472
1473 if (smmu->sync_gsiv)
1474 num_res++;
1475
1476 return num_res;
1477 }
1478
1479 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
1480 {
1481 /*
1482 * Cavium ThunderX2 implementation doesn't not support unique
1483 * irq line. Use single irq line for all the SMMUv3 interrupts.
1484 */
1485 if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1486 return false;
1487
1488 /*
1489 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking
1490 * SPI numbers here.
1491 */
1492 return smmu->event_gsiv == smmu->pri_gsiv &&
1493 smmu->event_gsiv == smmu->gerr_gsiv &&
1494 smmu->event_gsiv == smmu->sync_gsiv;
1495 }
1496
1497 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
1498 {
1499 /*
1500 * Override the size, for Cavium ThunderX2 implementation
1501 * which doesn't support the page 1 SMMU register space.
1502 */
1503 if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1504 return SZ_64K;
1505
1506 return SZ_128K;
1507 }
1508
1509 static void __init arm_smmu_v3_init_resources(struct resource *res,
1510 struct acpi_iort_node *node)
1511 {
1512 struct acpi_iort_smmu_v3 *smmu;
1513 int num_res = 0;
1514
1515 /* Retrieve SMMUv3 specific data */
1516 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1517
1518 res[num_res].start = smmu->base_address;
1519 res[num_res].end = smmu->base_address +
1520 arm_smmu_v3_resource_size(smmu) - 1;
1521 res[num_res].flags = IORESOURCE_MEM;
1522
1523 num_res++;
1524 if (arm_smmu_v3_is_combined_irq(smmu)) {
1525 if (smmu->event_gsiv)
1526 acpi_iort_register_irq(smmu->event_gsiv, "combined",
1527 ACPI_EDGE_SENSITIVE,
1528 &res[num_res++]);
1529 } else {
1530
1531 if (smmu->event_gsiv)
1532 acpi_iort_register_irq(smmu->event_gsiv, "eventq",
1533 ACPI_EDGE_SENSITIVE,
1534 &res[num_res++]);
1535
1536 if (smmu->pri_gsiv)
1537 acpi_iort_register_irq(smmu->pri_gsiv, "priq",
1538 ACPI_EDGE_SENSITIVE,
1539 &res[num_res++]);
1540
1541 if (smmu->gerr_gsiv)
1542 acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
1543 ACPI_EDGE_SENSITIVE,
1544 &res[num_res++]);
1545
1546 if (smmu->sync_gsiv)
1547 acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
1548 ACPI_EDGE_SENSITIVE,
1549 &res[num_res++]);
1550 }
1551 }
1552
1553 static void __init arm_smmu_v3_dma_configure(struct device *dev,
1554 struct acpi_iort_node *node)
1555 {
1556 struct acpi_iort_smmu_v3 *smmu;
1557 enum dev_dma_attr attr;
1558
1559 /* Retrieve SMMUv3 specific data */
1560 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1561
1562 attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?
1563 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1564
1565 /* We expect the dma masks to be equivalent for all SMMUv3 set-ups */
1566 dev->dma_mask = &dev->coherent_dma_mask;
1567
1568 /* Configure DMA for the page table walker */
1569 acpi_dma_configure(dev, attr);
1570 }
1571
1572 #if defined(CONFIG_ACPI_NUMA)
1573 /*
1574 * set numa proximity domain for smmuv3 device
1575 */
1576 static int __init arm_smmu_v3_set_proximity(struct device *dev,
1577 struct acpi_iort_node *node)
1578 {
1579 struct acpi_iort_smmu_v3 *smmu;
1580
1581 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1582 if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {
1583 int dev_node = pxm_to_node(smmu->pxm);
1584
1585 if (dev_node != NUMA_NO_NODE && !node_online(dev_node))
1586 return -EINVAL;
1587
1588 set_dev_node(dev, dev_node);
1589 pr_info("SMMU-v3[%llx] Mapped to Proximity domain %d\n",
1590 smmu->base_address,
1591 smmu->pxm);
1592 }
1593 return 0;
1594 }
1595 #else
1596 #define arm_smmu_v3_set_proximity NULL
1597 #endif
1598
1599 static int __init arm_smmu_count_resources(struct acpi_iort_node *node)
1600 {
1601 struct acpi_iort_smmu *smmu;
1602
1603 /* Retrieve SMMU specific data */
1604 smmu = (struct acpi_iort_smmu *)node->node_data;
1605
1606 /*
1607 * Only consider the global fault interrupt and ignore the
1608 * configuration access interrupt.
1609 *
1610 * MMIO address and global fault interrupt resources are always
1611 * present so add them to the context interrupt count as a static
1612 * value.
1613 */
1614 return smmu->context_interrupt_count + 2;
1615 }
1616
1617 static void __init arm_smmu_init_resources(struct resource *res,
1618 struct acpi_iort_node *node)
1619 {
1620 struct acpi_iort_smmu *smmu;
1621 int i, hw_irq, trigger, num_res = 0;
1622 u64 *ctx_irq, *glb_irq;
1623
1624 /* Retrieve SMMU specific data */
1625 smmu = (struct acpi_iort_smmu *)node->node_data;
1626
1627 res[num_res].start = smmu->base_address;
1628 res[num_res].end = smmu->base_address + smmu->span - 1;
1629 res[num_res].flags = IORESOURCE_MEM;
1630 num_res++;
1631
1632 glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
1633 /* Global IRQs */
1634 hw_irq = IORT_IRQ_MASK(glb_irq[0]);
1635 trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]);
1636
1637 acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
1638 &res[num_res++]);
1639
1640 /* Context IRQs */
1641 ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
1642 for (i = 0; i < smmu->context_interrupt_count; i++) {
1643 hw_irq = IORT_IRQ_MASK(ctx_irq[i]);
1644 trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]);
1645
1646 acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
1647 &res[num_res++]);
1648 }
1649 }
1650
1651 static void __init arm_smmu_dma_configure(struct device *dev,
1652 struct acpi_iort_node *node)
1653 {
1654 struct acpi_iort_smmu *smmu;
1655 enum dev_dma_attr attr;
1656
1657 /* Retrieve SMMU specific data */
1658 smmu = (struct acpi_iort_smmu *)node->node_data;
1659
1660 attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?
1661 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1662
1663 /* We expect the dma masks to be equivalent for SMMU set-ups */
1664 dev->dma_mask = &dev->coherent_dma_mask;
1665
1666 /* Configure DMA for the page table walker */
1667 acpi_dma_configure(dev, attr);
1668 }
1669
1670 static int __init arm_smmu_v3_pmcg_count_resources(struct acpi_iort_node *node)
1671 {
1672 struct acpi_iort_pmcg *pmcg;
1673
1674 /* Retrieve PMCG specific data */
1675 pmcg = (struct acpi_iort_pmcg *)node->node_data;
1676
1677 /*
1678 * There are always 2 memory resources.
1679 * If the overflow_gsiv is present then add that for a total of 3.
1680 */
1681 return pmcg->overflow_gsiv ? 3 : 2;
1682 }
1683
1684 static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res,
1685 struct acpi_iort_node *node)
1686 {
1687 struct acpi_iort_pmcg *pmcg;
1688
1689 /* Retrieve PMCG specific data */
1690 pmcg = (struct acpi_iort_pmcg *)node->node_data;
1691
1692 res[0].start = pmcg->page0_base_address;
1693 res[0].end = pmcg->page0_base_address + SZ_4K - 1;
1694 res[0].flags = IORESOURCE_MEM;
1695 /*
1696 * The initial version in DEN0049C lacked a way to describe register
1697 * page 1, which makes it broken for most PMCG implementations; in
1698 * that case, just let the driver fail gracefully if it expects to
1699 * find a second memory resource.
1700 */
1701 if (node->revision > 0) {
1702 res[1].start = pmcg->page1_base_address;
1703 res[1].end = pmcg->page1_base_address + SZ_4K - 1;
1704 res[1].flags = IORESOURCE_MEM;
1705 }
1706
1707 if (pmcg->overflow_gsiv)
1708 acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow",
1709 ACPI_EDGE_SENSITIVE, &res[2]);
1710 }
1711
1712 static struct acpi_platform_list pmcg_plat_info[] __initdata = {
1713 /* HiSilicon Hip08 Platform */
1714 {"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1715 "Erratum #162001800, Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP08},
1716 /* HiSilicon Hip09 Platform */
1717 {"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1718 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1719 /* HiSilicon Hip10/11 Platform uses the same SMMU IP with Hip09 */
1720 {"HISI ", "HIP10 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1721 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1722 {"HISI ", "HIP10C ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1723 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1724 {"HISI ", "HIP11 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1725 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
1726 { }
1727 };
1728
1729 static int __init arm_smmu_v3_pmcg_add_platdata(struct platform_device *pdev)
1730 {
1731 u32 model;
1732 int idx;
1733
1734 idx = acpi_match_platform_list(pmcg_plat_info);
1735 if (idx >= 0)
1736 model = pmcg_plat_info[idx].data;
1737 else
1738 model = IORT_SMMU_V3_PMCG_GENERIC;
1739
1740 return platform_device_add_data(pdev, &model, sizeof(model));
1741 }
1742
1743 struct iort_dev_config {
1744 const char *name;
1745 int (*dev_init)(struct acpi_iort_node *node);
1746 void (*dev_dma_configure)(struct device *dev,
1747 struct acpi_iort_node *node);
1748 int (*dev_count_resources)(struct acpi_iort_node *node);
1749 void (*dev_init_resources)(struct resource *res,
1750 struct acpi_iort_node *node);
1751 int (*dev_set_proximity)(struct device *dev,
1752 struct acpi_iort_node *node);
1753 int (*dev_add_platdata)(struct platform_device *pdev);
1754 };
1755
1756 static const struct iort_dev_config iort_arm_smmu_v3_cfg __initconst = {
1757 .name = "arm-smmu-v3",
1758 .dev_dma_configure = arm_smmu_v3_dma_configure,
1759 .dev_count_resources = arm_smmu_v3_count_resources,
1760 .dev_init_resources = arm_smmu_v3_init_resources,
1761 .dev_set_proximity = arm_smmu_v3_set_proximity,
1762 };
1763
1764 static const struct iort_dev_config iort_arm_smmu_cfg __initconst = {
1765 .name = "arm-smmu",
1766 .dev_dma_configure = arm_smmu_dma_configure,
1767 .dev_count_resources = arm_smmu_count_resources,
1768 .dev_init_resources = arm_smmu_init_resources,
1769 };
1770
1771 static const struct iort_dev_config iort_arm_smmu_v3_pmcg_cfg __initconst = {
1772 .name = "arm-smmu-v3-pmcg",
1773 .dev_count_resources = arm_smmu_v3_pmcg_count_resources,
1774 .dev_init_resources = arm_smmu_v3_pmcg_init_resources,
1775 .dev_add_platdata = arm_smmu_v3_pmcg_add_platdata,
1776 };
1777
1778 static __init const struct iort_dev_config *iort_get_dev_cfg(
1779 struct acpi_iort_node *node)
1780 {
1781 switch (node->type) {
1782 case ACPI_IORT_NODE_SMMU_V3:
1783 return &iort_arm_smmu_v3_cfg;
1784 case ACPI_IORT_NODE_SMMU:
1785 return &iort_arm_smmu_cfg;
1786 case ACPI_IORT_NODE_PMCG:
1787 return &iort_arm_smmu_v3_pmcg_cfg;
1788 default:
1789 return NULL;
1790 }
1791 }
1792
1793 /**
1794 * iort_add_platform_device() - Allocate a platform device for IORT node
1795 * @node: Pointer to device ACPI IORT node
1796 * @ops: Pointer to IORT device config struct
1797 *
1798 * Returns: 0 on success, <0 failure
1799 */
1800 static int __init iort_add_platform_device(struct acpi_iort_node *node,
1801 const struct iort_dev_config *ops)
1802 {
1803 struct fwnode_handle *fwnode;
1804 struct platform_device *pdev;
1805 struct resource *r;
1806 int ret, count;
1807
1808 pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO);
1809 if (!pdev)
1810 return -ENOMEM;
1811
1812 if (ops->dev_set_proximity) {
1813 ret = ops->dev_set_proximity(&pdev->dev, node);
1814 if (ret)
1815 goto dev_put;
1816 }
1817
1818 count = ops->dev_count_resources(node);
1819
1820 r = kcalloc(count, sizeof(*r), GFP_KERNEL);
1821 if (!r) {
1822 ret = -ENOMEM;
1823 goto dev_put;
1824 }
1825
1826 ops->dev_init_resources(r, node);
1827
1828 ret = platform_device_add_resources(pdev, r, count);
1829 /*
1830 * Resources are duplicated in platform_device_add_resources,
1831 * free their allocated memory
1832 */
1833 kfree(r);
1834
1835 if (ret)
1836 goto dev_put;
1837
1838 /*
1839 * Platform devices based on PMCG nodes uses platform_data to
1840 * pass the hardware model info to the driver. For others, add
1841 * a copy of IORT node pointer to platform_data to be used to
1842 * retrieve IORT data information.
1843 */
1844 if (ops->dev_add_platdata)
1845 ret = ops->dev_add_platdata(pdev);
1846 else
1847 ret = platform_device_add_data(pdev, &node, sizeof(node));
1848
1849 if (ret)
1850 goto dev_put;
1851
1852 fwnode = iort_get_fwnode(node);
1853
1854 if (!fwnode) {
1855 ret = -ENODEV;
1856 goto dev_put;
1857 }
1858
1859 pdev->dev.fwnode = fwnode;
1860
1861 if (ops->dev_dma_configure)
1862 ops->dev_dma_configure(&pdev->dev, node);
1863
1864 iort_set_device_domain(&pdev->dev, node);
1865
1866 ret = platform_device_add(pdev);
1867 if (ret)
1868 goto dma_deconfigure;
1869
1870 return 0;
1871
1872 dma_deconfigure:
1873 arch_teardown_dma_ops(&pdev->dev);
1874 dev_put:
1875 platform_device_put(pdev);
1876
1877 return ret;
1878 }
1879
1880 #ifdef CONFIG_PCI
1881 static void __init iort_enable_acs(struct acpi_iort_node *iort_node)
1882 {
1883 static bool acs_enabled __initdata;
1884
1885 if (acs_enabled)
1886 return;
1887
1888 if (iort_node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
1889 struct acpi_iort_node *parent;
1890 struct acpi_iort_id_mapping *map;
1891 int i;
1892
1893 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, iort_node,
1894 iort_node->mapping_offset);
1895
1896 for (i = 0; i < iort_node->mapping_count; i++, map++) {
1897 if (!map->output_reference)
1898 continue;
1899
1900 parent = ACPI_ADD_PTR(struct acpi_iort_node,
1901 iort_table, map->output_reference);
1902 /*
1903 * If we detect a RC->SMMU mapping, make sure
1904 * we enable ACS on the system.
1905 */
1906 if ((parent->type == ACPI_IORT_NODE_SMMU) ||
1907 (parent->type == ACPI_IORT_NODE_SMMU_V3)) {
1908 pci_request_acs();
1909 acs_enabled = true;
1910 return;
1911 }
1912 }
1913 }
1914 }
1915 #else
1916 static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { }
1917 #endif
1918
1919 static void __init iort_init_platform_devices(void)
1920 {
1921 struct acpi_iort_node *iort_node, *iort_end;
1922 struct acpi_table_iort *iort;
1923 struct fwnode_handle *fwnode;
1924 int i, ret;
1925 const struct iort_dev_config *ops;
1926
1927 /*
1928 * iort_table and iort both point to the start of IORT table, but
1929 * have different struct types
1930 */
1931 iort = (struct acpi_table_iort *)iort_table;
1932
1933 /* Get the first IORT node */
1934 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1935 iort->node_offset);
1936 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1937 iort_table->length);
1938
1939 for (i = 0; i < iort->node_count; i++) {
1940 if (iort_node >= iort_end) {
1941 pr_err("iort node pointer overflows, bad table\n");
1942 return;
1943 }
1944
1945 iort_enable_acs(iort_node);
1946
1947 ops = iort_get_dev_cfg(iort_node);
1948 if (ops) {
1949 fwnode = acpi_alloc_fwnode_static();
1950 if (!fwnode)
1951 return;
1952
1953 iort_set_fwnode(iort_node, fwnode);
1954
1955 ret = iort_add_platform_device(iort_node, ops);
1956 if (ret) {
1957 iort_delete_fwnode(iort_node);
1958 acpi_free_fwnode_static(fwnode);
1959 return;
1960 }
1961 }
1962
1963 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
1964 iort_node->length);
1965 }
1966 }
1967
1968 void __init acpi_iort_init(void)
1969 {
1970 acpi_status status;
1971
1972 /* iort_table will be used at runtime after the iort init,
1973 * so we don't need to call acpi_put_table() to release
1974 * the IORT table mapping.
1975 */
1976 status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table);
1977 if (ACPI_FAILURE(status)) {
1978 if (status != AE_NOT_FOUND) {
1979 const char *msg = acpi_format_exception(status);
1980
1981 pr_err("Failed to get table, %s\n", msg);
1982 }
1983
1984 return;
1985 }
1986
1987 iort_init_platform_devices();
1988 }
1989
1990 #ifdef CONFIG_ZONE_DMA
1991 /*
1992 * Extract the highest CPU physical address accessible to all DMA masters in
1993 * the system. PHYS_ADDR_MAX is returned when no constrained device is found.
1994 */
1995 phys_addr_t __init acpi_iort_dma_get_max_cpu_address(void)
1996 {
1997 phys_addr_t limit = PHYS_ADDR_MAX;
1998 struct acpi_iort_node *node, *end;
1999 struct acpi_table_iort *iort;
2000 acpi_status status;
2001 int i;
2002
2003 if (acpi_disabled)
2004 return limit;
2005
2006 status = acpi_get_table(ACPI_SIG_IORT, 0,
2007 (struct acpi_table_header **)&iort);
2008 if (ACPI_FAILURE(status))
2009 return limit;
2010
2011 node = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->node_offset);
2012 end = ACPI_ADD_PTR(struct acpi_iort_node, iort, iort->header.length);
2013
2014 for (i = 0; i < iort->node_count; i++) {
2015 if (node >= end)
2016 break;
2017
2018 switch (node->type) {
2019 struct acpi_iort_named_component *ncomp;
2020 struct acpi_iort_root_complex *rc;
2021 phys_addr_t local_limit;
2022
2023 case ACPI_IORT_NODE_NAMED_COMPONENT:
2024 ncomp = (struct acpi_iort_named_component *)node->node_data;
2025 local_limit = DMA_BIT_MASK(ncomp->memory_address_limit);
2026 limit = min_not_zero(limit, local_limit);
2027 break;
2028
2029 case ACPI_IORT_NODE_PCI_ROOT_COMPLEX:
2030 if (node->revision < 1)
2031 break;
2032
2033 rc = (struct acpi_iort_root_complex *)node->node_data;
2034 local_limit = DMA_BIT_MASK(rc->memory_address_limit);
2035 limit = min_not_zero(limit, local_limit);
2036 break;
2037 }
2038 node = ACPI_ADD_PTR(struct acpi_iort_node, node, node->length);
2039 }
2040 acpi_put_table(&iort->header);
2041 return limit;
2042 }
2043 #endif
Kernel DRM miscellaneous fixes and cross-tree changes