1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel & MS High Precision Event Timer Implementation.
5 * Copyright (C) 2003 Intel Corporation
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/miscdevice.h>
15 #include <linux/major.h>
16 #include <linux/ioport.h>
17 #include <linux/fcntl.h>
18 #include <linux/init.h>
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/poll.h>
22 #include <linux/proc_fs.h>
23 #include <linux/spinlock.h>
24 #include <linux/sysctl.h>
25 #include <linux/wait.h>
26 #include <linux/sched/signal.h>
27 #include <linux/bcd.h>
28 #include <linux/seq_file.h>
29 #include <linux/bitops.h>
30 #include <linux/compat.h>
31 #include <linux/clocksource.h>
32 #include <linux/uaccess.h>
33 #include <linux/slab.h>
35 #include <linux/acpi.h>
36 #include <linux/hpet.h>
37 #include <asm/current.h>
39 #include <asm/div64.h>
42 * The High Precision Event Timer driver.
43 * This driver is closely modelled after the rtc.c driver.
44 * See HPET spec revision 1.
46 #define HPET_USER_FREQ (64)
47 #define HPET_DRIFT (500)
49 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
52 /* WARNING -- don't get confused. These macros are never used
53 * to write the (single) counter, and rarely to read it.
54 * They're badly named; to fix, someday.
56 #if BITS_PER_LONG == 64
57 #define write_counter(V, MC) writeq(V, MC)
58 #define read_counter(MC) readq(MC)
60 #define write_counter(V, MC) writel(V, MC)
61 #define read_counter(MC) readl(MC)
64 static DEFINE_MUTEX(hpet_mutex
); /* replaces BKL */
65 static u32 hpet_nhpet
, hpet_max_freq
= HPET_USER_FREQ
;
67 /* A lock for concurrent access by app and isr hpet activity. */
68 static DEFINE_SPINLOCK(hpet_lock
);
70 #define HPET_DEV_NAME (7)
73 struct hpets
*hd_hpets
;
74 struct hpet __iomem
*hd_hpet
;
75 struct hpet_timer __iomem
*hd_timer
;
76 unsigned long hd_ireqfreq
;
77 unsigned long hd_irqdata
;
78 wait_queue_head_t hd_waitqueue
;
79 struct fasync_struct
*hd_async_queue
;
80 unsigned int hd_flags
;
82 unsigned int hd_hdwirq
;
83 char hd_name
[HPET_DEV_NAME
];
87 struct hpets
*hp_next
;
88 struct hpet __iomem
*hp_hpet
;
89 unsigned long hp_hpet_phys
;
90 unsigned long long hp_tick_freq
;
91 unsigned long hp_delta
;
92 unsigned int hp_ntimer
;
93 unsigned int hp_which
;
94 struct hpet_dev hp_dev
[] __counted_by(hp_ntimer
);
97 static struct hpets
*hpets
;
99 #define HPET_OPEN 0x0001
100 #define HPET_IE 0x0002 /* interrupt enabled */
101 #define HPET_PERIODIC 0x0004
102 #define HPET_SHARED_IRQ 0x0008
104 static irqreturn_t
hpet_interrupt(int irq
, void *data
)
106 struct hpet_dev
*devp
;
110 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
112 if ((devp
->hd_flags
& HPET_SHARED_IRQ
) &&
113 !(isr
& readl(&devp
->hd_hpet
->hpet_isr
)))
116 spin_lock(&hpet_lock
);
120 * For non-periodic timers, increment the accumulator.
121 * This has the effect of treating non-periodic like periodic.
123 if ((devp
->hd_flags
& (HPET_IE
| HPET_PERIODIC
)) == HPET_IE
) {
124 unsigned long t
, mc
, base
, k
;
125 struct hpet __iomem
*hpet
= devp
->hd_hpet
;
126 struct hpets
*hpetp
= devp
->hd_hpets
;
128 t
= devp
->hd_ireqfreq
;
129 read_counter(&devp
->hd_timer
->hpet_compare
);
130 mc
= read_counter(&hpet
->hpet_mc
);
131 /* The time for the next interrupt would logically be t + m,
132 * however, if we are very unlucky and the interrupt is delayed
133 * for longer than t then we will completely miss the next
134 * interrupt if we set t + m and an application will hang.
135 * Therefore we need to make a more complex computation assuming
136 * that there exists a k for which the following is true:
137 * k * t + base < mc + delta
138 * (k + 1) * t + base > mc + delta
139 * where t is the interval in hpet ticks for the given freq,
140 * base is the theoretical start value 0 < base < t,
141 * mc is the main counter value at the time of the interrupt,
142 * delta is the time it takes to write the a value to the
144 * k may then be computed as (mc - base + delta) / t .
147 k
= (mc
- base
+ hpetp
->hp_delta
) / t
;
148 write_counter(t
* (k
+ 1) + base
,
149 &devp
->hd_timer
->hpet_compare
);
152 if (devp
->hd_flags
& HPET_SHARED_IRQ
)
153 writel(isr
, &devp
->hd_hpet
->hpet_isr
);
154 spin_unlock(&hpet_lock
);
156 wake_up_interruptible(&devp
->hd_waitqueue
);
158 kill_fasync(&devp
->hd_async_queue
, SIGIO
, POLL_IN
);
163 static void hpet_timer_set_irq(struct hpet_dev
*devp
)
165 const unsigned int nr_irqs
= irq_get_nr_irqs();
168 struct hpet_timer __iomem
*timer
;
170 spin_lock_irq(&hpet_lock
);
171 if (devp
->hd_hdwirq
) {
172 spin_unlock_irq(&hpet_lock
);
176 timer
= devp
->hd_timer
;
178 /* we prefer level triggered mode */
179 v
= readl(&timer
->hpet_config
);
180 if (!(v
& Tn_INT_TYPE_CNF_MASK
)) {
181 v
|= Tn_INT_TYPE_CNF_MASK
;
182 writel(v
, &timer
->hpet_config
);
184 spin_unlock_irq(&hpet_lock
);
186 v
= (readq(&timer
->hpet_config
) & Tn_INT_ROUTE_CAP_MASK
) >>
187 Tn_INT_ROUTE_CAP_SHIFT
;
190 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
191 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
193 if (acpi_irq_model
== ACPI_IRQ_MODEL_PIC
)
198 for_each_set_bit(irq
, &v
, HPET_MAX_IRQ
) {
199 if (irq
>= nr_irqs
) {
204 gsi
= acpi_register_gsi(NULL
, irq
, ACPI_LEVEL_SENSITIVE
,
209 /* FIXME: Setup interrupt source table */
212 if (irq
< HPET_MAX_IRQ
) {
213 spin_lock_irq(&hpet_lock
);
214 v
= readl(&timer
->hpet_config
);
215 v
|= irq
<< Tn_INT_ROUTE_CNF_SHIFT
;
216 writel(v
, &timer
->hpet_config
);
217 devp
->hd_hdwirq
= gsi
;
218 spin_unlock_irq(&hpet_lock
);
223 static int hpet_open(struct inode
*inode
, struct file
*file
)
225 struct hpet_dev
*devp
;
229 if (file
->f_mode
& FMODE_WRITE
)
232 mutex_lock(&hpet_mutex
);
233 spin_lock_irq(&hpet_lock
);
235 for (devp
= NULL
, hpetp
= hpets
; hpetp
&& !devp
; hpetp
= hpetp
->hp_next
)
236 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
237 if (hpetp
->hp_dev
[i
].hd_flags
& HPET_OPEN
) {
240 devp
= &hpetp
->hp_dev
[i
];
245 spin_unlock_irq(&hpet_lock
);
246 mutex_unlock(&hpet_mutex
);
250 file
->private_data
= devp
;
251 devp
->hd_irqdata
= 0;
252 devp
->hd_flags
|= HPET_OPEN
;
253 spin_unlock_irq(&hpet_lock
);
254 mutex_unlock(&hpet_mutex
);
256 hpet_timer_set_irq(devp
);
262 hpet_read(struct file
*file
, char __user
*buf
, size_t count
, loff_t
* ppos
)
264 DECLARE_WAITQUEUE(wait
, current
);
267 struct hpet_dev
*devp
;
269 devp
= file
->private_data
;
270 if (!devp
->hd_ireqfreq
)
273 if (in_compat_syscall()) {
274 if (count
< sizeof(compat_ulong_t
))
277 if (count
< sizeof(unsigned long))
281 add_wait_queue(&devp
->hd_waitqueue
, &wait
);
284 set_current_state(TASK_INTERRUPTIBLE
);
286 spin_lock_irq(&hpet_lock
);
287 data
= devp
->hd_irqdata
;
288 devp
->hd_irqdata
= 0;
289 spin_unlock_irq(&hpet_lock
);
293 } else if (file
->f_flags
& O_NONBLOCK
) {
296 } else if (signal_pending(current
)) {
297 retval
= -ERESTARTSYS
;
303 if (in_compat_syscall()) {
304 retval
= put_user(data
, (compat_ulong_t __user
*)buf
);
306 retval
= sizeof(compat_ulong_t
);
308 retval
= put_user(data
, (unsigned long __user
*)buf
);
310 retval
= sizeof(unsigned long);
314 __set_current_state(TASK_RUNNING
);
315 remove_wait_queue(&devp
->hd_waitqueue
, &wait
);
320 static __poll_t
hpet_poll(struct file
*file
, poll_table
* wait
)
323 struct hpet_dev
*devp
;
325 devp
= file
->private_data
;
327 if (!devp
->hd_ireqfreq
)
330 poll_wait(file
, &devp
->hd_waitqueue
, wait
);
332 spin_lock_irq(&hpet_lock
);
333 v
= devp
->hd_irqdata
;
334 spin_unlock_irq(&hpet_lock
);
337 return EPOLLIN
| EPOLLRDNORM
;
342 #ifdef CONFIG_HPET_MMAP
343 #ifdef CONFIG_HPET_MMAP_DEFAULT
344 static int hpet_mmap_enabled
= 1;
346 static int hpet_mmap_enabled
= 0;
349 static __init
int hpet_mmap_enable(char *str
)
351 get_option(&str
, &hpet_mmap_enabled
);
352 pr_info("HPET mmap %s\n", hpet_mmap_enabled
? "enabled" : "disabled");
355 __setup("hpet_mmap=", hpet_mmap_enable
);
357 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
359 struct hpet_dev
*devp
;
362 if (!hpet_mmap_enabled
)
365 devp
= file
->private_data
;
366 addr
= devp
->hd_hpets
->hp_hpet_phys
;
368 if (addr
& (PAGE_SIZE
- 1))
371 vma
->vm_page_prot
= pgprot_noncached(vma
->vm_page_prot
);
372 return vm_iomap_memory(vma
, addr
, PAGE_SIZE
);
375 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
381 static int hpet_fasync(int fd
, struct file
*file
, int on
)
383 struct hpet_dev
*devp
;
385 devp
= file
->private_data
;
387 if (fasync_helper(fd
, file
, on
, &devp
->hd_async_queue
) >= 0)
393 static int hpet_release(struct inode
*inode
, struct file
*file
)
395 struct hpet_dev
*devp
;
396 struct hpet_timer __iomem
*timer
;
399 devp
= file
->private_data
;
400 timer
= devp
->hd_timer
;
402 spin_lock_irq(&hpet_lock
);
404 writeq((readq(&timer
->hpet_config
) & ~Tn_INT_ENB_CNF_MASK
),
405 &timer
->hpet_config
);
410 devp
->hd_ireqfreq
= 0;
412 if (devp
->hd_flags
& HPET_PERIODIC
413 && readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
416 v
= readq(&timer
->hpet_config
);
417 v
^= Tn_TYPE_CNF_MASK
;
418 writeq(v
, &timer
->hpet_config
);
421 devp
->hd_flags
&= ~(HPET_OPEN
| HPET_IE
| HPET_PERIODIC
);
422 spin_unlock_irq(&hpet_lock
);
427 file
->private_data
= NULL
;
431 static int hpet_ioctl_ieon(struct hpet_dev
*devp
)
433 struct hpet_timer __iomem
*timer
;
434 struct hpet __iomem
*hpet
;
437 unsigned long g
, v
, t
, m
;
438 unsigned long flags
, isr
;
440 timer
= devp
->hd_timer
;
441 hpet
= devp
->hd_hpet
;
442 hpetp
= devp
->hd_hpets
;
444 if (!devp
->hd_ireqfreq
)
447 spin_lock_irq(&hpet_lock
);
449 if (devp
->hd_flags
& HPET_IE
) {
450 spin_unlock_irq(&hpet_lock
);
454 devp
->hd_flags
|= HPET_IE
;
456 if (readl(&timer
->hpet_config
) & Tn_INT_TYPE_CNF_MASK
)
457 devp
->hd_flags
|= HPET_SHARED_IRQ
;
458 spin_unlock_irq(&hpet_lock
);
460 irq
= devp
->hd_hdwirq
;
463 unsigned long irq_flags
;
465 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
467 * To prevent the interrupt handler from seeing an
468 * unwanted interrupt status bit, program the timer
469 * so that it will not fire in the near future ...
471 writel(readl(&timer
->hpet_config
) & ~Tn_TYPE_CNF_MASK
,
472 &timer
->hpet_config
);
473 write_counter(read_counter(&hpet
->hpet_mc
),
474 &timer
->hpet_compare
);
475 /* ... and clear any left-over status. */
476 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
477 writel(isr
, &hpet
->hpet_isr
);
480 sprintf(devp
->hd_name
, "hpet%d", (int)(devp
- hpetp
->hp_dev
));
481 irq_flags
= devp
->hd_flags
& HPET_SHARED_IRQ
? IRQF_SHARED
: 0;
482 if (request_irq(irq
, hpet_interrupt
, irq_flags
,
483 devp
->hd_name
, (void *)devp
)) {
484 printk(KERN_ERR
"hpet: IRQ %d is not free\n", irq
);
490 spin_lock_irq(&hpet_lock
);
491 devp
->hd_flags
^= HPET_IE
;
492 spin_unlock_irq(&hpet_lock
);
497 t
= devp
->hd_ireqfreq
;
498 v
= readq(&timer
->hpet_config
);
500 /* 64-bit comparators are not yet supported through the ioctls,
501 * so force this into 32-bit mode if it supports both modes
503 g
= v
| Tn_32MODE_CNF_MASK
| Tn_INT_ENB_CNF_MASK
;
505 if (devp
->hd_flags
& HPET_PERIODIC
) {
506 g
|= Tn_TYPE_CNF_MASK
;
507 v
|= Tn_TYPE_CNF_MASK
| Tn_VAL_SET_CNF_MASK
;
508 writeq(v
, &timer
->hpet_config
);
509 local_irq_save(flags
);
512 * NOTE: First we modify the hidden accumulator
513 * register supported by periodic-capable comparators.
514 * We never want to modify the (single) counter; that
515 * would affect all the comparators. The value written
516 * is the counter value when the first interrupt is due.
518 m
= read_counter(&hpet
->hpet_mc
);
519 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
521 * Then we modify the comparator, indicating the period
522 * for subsequent interrupt.
524 write_counter(t
, &timer
->hpet_compare
);
526 local_irq_save(flags
);
527 m
= read_counter(&hpet
->hpet_mc
);
528 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
531 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
532 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
533 writel(isr
, &hpet
->hpet_isr
);
535 writeq(g
, &timer
->hpet_config
);
536 local_irq_restore(flags
);
541 /* converts Hz to number of timer ticks */
542 static inline unsigned long hpet_time_div(struct hpets
*hpets
,
545 unsigned long long m
;
547 m
= hpets
->hp_tick_freq
+ (dis
>> 1);
548 return div64_ul(m
, dis
);
552 hpet_ioctl_common(struct hpet_dev
*devp
, unsigned int cmd
, unsigned long arg
,
553 struct hpet_info
*info
)
555 struct hpet_timer __iomem
*timer
;
566 timer
= devp
->hd_timer
;
567 hpetp
= devp
->hd_hpets
;
570 return hpet_ioctl_ieon(devp
);
579 if ((devp
->hd_flags
& HPET_IE
) == 0)
581 v
= readq(&timer
->hpet_config
);
582 v
&= ~Tn_INT_ENB_CNF_MASK
;
583 writeq(v
, &timer
->hpet_config
);
585 free_irq(devp
->hd_irq
, devp
);
588 devp
->hd_flags
^= HPET_IE
;
592 memset(info
, 0, sizeof(*info
));
593 if (devp
->hd_ireqfreq
)
595 hpet_time_div(hpetp
, devp
->hd_ireqfreq
);
597 readq(&timer
->hpet_config
) & Tn_PER_INT_CAP_MASK
;
598 info
->hi_hpet
= hpetp
->hp_which
;
599 info
->hi_timer
= devp
- hpetp
->hp_dev
;
603 v
= readq(&timer
->hpet_config
);
604 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
608 devp
->hd_flags
|= HPET_PERIODIC
;
611 v
= readq(&timer
->hpet_config
);
612 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
616 if (devp
->hd_flags
& HPET_PERIODIC
&&
617 readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
618 v
= readq(&timer
->hpet_config
);
619 v
^= Tn_TYPE_CNF_MASK
;
620 writeq(v
, &timer
->hpet_config
);
622 devp
->hd_flags
&= ~HPET_PERIODIC
;
625 if ((arg
> hpet_max_freq
) &&
626 !capable(CAP_SYS_RESOURCE
)) {
636 devp
->hd_ireqfreq
= hpet_time_div(hpetp
, arg
);
643 hpet_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
645 struct hpet_info info
;
648 mutex_lock(&hpet_mutex
);
649 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
650 mutex_unlock(&hpet_mutex
);
652 if ((cmd
== HPET_INFO
) && !err
&&
653 (copy_to_user((void __user
*)arg
, &info
, sizeof(info
))))
660 struct compat_hpet_info
{
661 compat_ulong_t hi_ireqfreq
; /* Hz */
662 compat_ulong_t hi_flags
; /* information */
663 unsigned short hi_hpet
;
664 unsigned short hi_timer
;
667 /* 32-bit types would lead to different command codes which should be
668 * translated into 64-bit ones before passed to hpet_ioctl_common
670 #define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info)
671 #define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t)
674 hpet_compat_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
676 struct hpet_info info
;
679 if (cmd
== COMPAT_HPET_INFO
)
682 if (cmd
== COMPAT_HPET_IRQFREQ
)
685 mutex_lock(&hpet_mutex
);
686 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
687 mutex_unlock(&hpet_mutex
);
689 if ((cmd
== HPET_INFO
) && !err
) {
690 struct compat_hpet_info __user
*u
= compat_ptr(arg
);
691 if (put_user(info
.hi_ireqfreq
, &u
->hi_ireqfreq
) ||
692 put_user(info
.hi_flags
, &u
->hi_flags
) ||
693 put_user(info
.hi_hpet
, &u
->hi_hpet
) ||
694 put_user(info
.hi_timer
, &u
->hi_timer
))
702 static const struct file_operations hpet_fops
= {
703 .owner
= THIS_MODULE
,
706 .unlocked_ioctl
= hpet_ioctl
,
708 .compat_ioctl
= hpet_compat_ioctl
,
711 .release
= hpet_release
,
712 .fasync
= hpet_fasync
,
716 static int hpet_is_known(struct hpet_data
*hdp
)
720 for (hpetp
= hpets
; hpetp
; hpetp
= hpetp
->hp_next
)
721 if (hpetp
->hp_hpet_phys
== hdp
->hd_phys_address
)
727 static struct ctl_table hpet_table
[] = {
729 .procname
= "max-user-freq",
730 .data
= &hpet_max_freq
,
731 .maxlen
= sizeof(int),
733 .proc_handler
= proc_dointvec
,
737 static struct ctl_table_header
*sysctl_header
;
740 * Adjustment for when arming the timer with
741 * initial conditions. That is, main counter
742 * ticks expired before interrupts are enabled.
744 #define TICK_CALIBRATE (1000UL)
746 static unsigned long __hpet_calibrate(struct hpets
*hpetp
)
748 struct hpet_timer __iomem
*timer
= NULL
;
749 unsigned long t
, m
, count
, i
, flags
, start
;
750 struct hpet_dev
*devp
;
752 struct hpet __iomem
*hpet
;
754 for (j
= 0, devp
= hpetp
->hp_dev
; j
< hpetp
->hp_ntimer
; j
++, devp
++)
755 if ((devp
->hd_flags
& HPET_OPEN
) == 0) {
756 timer
= devp
->hd_timer
;
763 hpet
= hpetp
->hp_hpet
;
764 t
= read_counter(&timer
->hpet_compare
);
767 count
= hpet_time_div(hpetp
, TICK_CALIBRATE
);
769 local_irq_save(flags
);
771 start
= read_counter(&hpet
->hpet_mc
);
774 m
= read_counter(&hpet
->hpet_mc
);
775 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
776 } while (i
++, (m
- start
) < count
);
778 local_irq_restore(flags
);
780 return (m
- start
) / i
;
783 static unsigned long hpet_calibrate(struct hpets
*hpetp
)
785 unsigned long ret
= ~0UL;
789 * Try to calibrate until return value becomes stable small value.
790 * If SMI interruption occurs in calibration loop, the return value
791 * will be big. This avoids its impact.
794 tmp
= __hpet_calibrate(hpetp
);
803 int hpet_alloc(struct hpet_data
*hdp
)
806 struct hpet_dev
*devp
;
809 struct hpet __iomem
*hpet
;
810 static struct hpets
*last
;
812 unsigned long long temp
;
816 * hpet_alloc can be called by platform dependent code.
817 * If platform dependent code has allocated the hpet that
818 * ACPI has also reported, then we catch it here.
820 if (hpet_is_known(hdp
)) {
821 printk(KERN_DEBUG
"%s: duplicate HPET ignored\n",
826 hpetp
= kzalloc(struct_size(hpetp
, hp_dev
, hdp
->hd_nirqs
),
832 hpetp
->hp_which
= hpet_nhpet
++;
833 hpetp
->hp_hpet
= hdp
->hd_address
;
834 hpetp
->hp_hpet_phys
= hdp
->hd_phys_address
;
836 hpetp
->hp_ntimer
= hdp
->hd_nirqs
;
838 for (i
= 0; i
< hdp
->hd_nirqs
; i
++)
839 hpetp
->hp_dev
[i
].hd_hdwirq
= hdp
->hd_irq
[i
];
841 hpet
= hpetp
->hp_hpet
;
843 cap
= readq(&hpet
->hpet_cap
);
845 ntimer
= ((cap
& HPET_NUM_TIM_CAP_MASK
) >> HPET_NUM_TIM_CAP_SHIFT
) + 1;
847 if (hpetp
->hp_ntimer
!= ntimer
) {
848 printk(KERN_WARNING
"hpet: number irqs doesn't agree"
849 " with number of timers\n");
855 last
->hp_next
= hpetp
;
861 period
= (cap
& HPET_COUNTER_CLK_PERIOD_MASK
) >>
862 HPET_COUNTER_CLK_PERIOD_SHIFT
; /* fs, 10^-15 */
863 temp
= 1000000000000000uLL; /* 10^15 femtoseconds per second */
864 temp
+= period
>> 1; /* round */
865 do_div(temp
, period
);
866 hpetp
->hp_tick_freq
= temp
; /* ticks per second */
868 printk(KERN_INFO
"hpet%u: at MMIO 0x%lx, IRQ%s",
869 hpetp
->hp_which
, hdp
->hd_phys_address
,
870 hpetp
->hp_ntimer
> 1 ? "s" : "");
871 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
872 printk(KERN_CONT
"%s %u", i
> 0 ? "," : "", hdp
->hd_irq
[i
]);
873 printk(KERN_CONT
"\n");
875 temp
= hpetp
->hp_tick_freq
;
876 remainder
= do_div(temp
, 1000000);
878 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
879 hpetp
->hp_which
, hpetp
->hp_ntimer
,
880 cap
& HPET_COUNTER_SIZE_MASK
? 64 : 32,
881 (unsigned) temp
, remainder
);
883 mcfg
= readq(&hpet
->hpet_config
);
884 if ((mcfg
& HPET_ENABLE_CNF_MASK
) == 0) {
885 write_counter(0L, &hpet
->hpet_mc
);
886 mcfg
|= HPET_ENABLE_CNF_MASK
;
887 writeq(mcfg
, &hpet
->hpet_config
);
890 for (i
= 0, devp
= hpetp
->hp_dev
; i
< hpetp
->hp_ntimer
; i
++, devp
++) {
891 struct hpet_timer __iomem
*timer
;
893 timer
= &hpet
->hpet_timers
[devp
- hpetp
->hp_dev
];
895 devp
->hd_hpets
= hpetp
;
896 devp
->hd_hpet
= hpet
;
897 devp
->hd_timer
= timer
;
900 * If the timer was reserved by platform code,
901 * then make timer unavailable for opens.
903 if (hdp
->hd_state
& (1 << i
)) {
904 devp
->hd_flags
= HPET_OPEN
;
908 init_waitqueue_head(&devp
->hd_waitqueue
);
911 hpetp
->hp_delta
= hpet_calibrate(hpetp
);
916 static acpi_status
hpet_resources(struct acpi_resource
*res
, void *data
)
918 struct hpet_data
*hdp
;
920 struct acpi_resource_address64 addr
;
924 status
= acpi_resource_to_address64(res
, &addr
);
926 if (ACPI_SUCCESS(status
)) {
927 hdp
->hd_phys_address
= addr
.address
.minimum
;
928 hdp
->hd_address
= ioremap(addr
.address
.minimum
, addr
.address
.address_length
);
929 if (!hdp
->hd_address
)
932 if (hpet_is_known(hdp
)) {
933 iounmap(hdp
->hd_address
);
934 return AE_ALREADY_EXISTS
;
936 } else if (res
->type
== ACPI_RESOURCE_TYPE_FIXED_MEMORY32
) {
937 struct acpi_resource_fixed_memory32
*fixmem32
;
939 fixmem32
= &res
->data
.fixed_memory32
;
941 hdp
->hd_phys_address
= fixmem32
->address
;
942 hdp
->hd_address
= ioremap(fixmem32
->address
,
944 if (!hdp
->hd_address
)
947 if (hpet_is_known(hdp
)) {
948 iounmap(hdp
->hd_address
);
949 return AE_ALREADY_EXISTS
;
951 } else if (res
->type
== ACPI_RESOURCE_TYPE_EXTENDED_IRQ
) {
952 struct acpi_resource_extended_irq
*irqp
;
955 irqp
= &res
->data
.extended_irq
;
957 for (i
= 0; i
< irqp
->interrupt_count
; i
++) {
958 if (hdp
->hd_nirqs
>= HPET_MAX_TIMERS
)
961 irq
= acpi_register_gsi(NULL
, irqp
->interrupts
[i
],
967 hdp
->hd_irq
[hdp
->hd_nirqs
] = irq
;
975 static int hpet_acpi_add(struct acpi_device
*device
)
978 struct hpet_data data
;
980 memset(&data
, 0, sizeof(data
));
983 acpi_walk_resources(device
->handle
, METHOD_NAME__CRS
,
984 hpet_resources
, &data
);
986 if (ACPI_FAILURE(result
))
989 if (!data
.hd_address
|| !data
.hd_nirqs
) {
991 iounmap(data
.hd_address
);
992 printk("%s: no address or irqs in _CRS\n", __func__
);
996 return hpet_alloc(&data
);
999 static const struct acpi_device_id hpet_device_ids
[] = {
1004 static struct acpi_driver hpet_acpi_driver
= {
1006 .ids
= hpet_device_ids
,
1008 .add
= hpet_acpi_add
,
1012 static struct miscdevice hpet_misc
= { HPET_MINOR
, "hpet", &hpet_fops
};
1014 static int __init
hpet_init(void)
1018 result
= misc_register(&hpet_misc
);
1022 sysctl_header
= register_sysctl("dev/hpet", hpet_table
);
1024 result
= acpi_bus_register_driver(&hpet_acpi_driver
);
1027 unregister_sysctl_table(sysctl_header
);
1028 misc_deregister(&hpet_misc
);
1034 device_initcall(hpet_init
);
1037 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1038 MODULE_LICENSE("GPL");