1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014, 2015 Intel Corporation
6 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 * This file contains TPM2 protocol implementations of the commands
11 * used by the kernel internally.
15 #include <crypto/hash_info.h>
17 static bool disable_pcr_integrity
;
18 module_param(disable_pcr_integrity
, bool, 0444);
19 MODULE_PARM_DESC(disable_pcr_integrity
, "Disable integrity protection of TPM2_PCR_Extend");
21 static struct tpm2_hash tpm2_hash_map
[] = {
22 {HASH_ALGO_SHA1
, TPM_ALG_SHA1
},
23 {HASH_ALGO_SHA256
, TPM_ALG_SHA256
},
24 {HASH_ALGO_SHA384
, TPM_ALG_SHA384
},
25 {HASH_ALGO_SHA512
, TPM_ALG_SHA512
},
26 {HASH_ALGO_SM3_256
, TPM_ALG_SM3_256
},
29 int tpm2_get_timeouts(struct tpm_chip
*chip
)
31 /* Fixed timeouts for TPM2 */
32 chip
->timeout_a
= msecs_to_jiffies(TPM2_TIMEOUT_A
);
33 chip
->timeout_b
= msecs_to_jiffies(TPM2_TIMEOUT_B
);
34 chip
->timeout_c
= msecs_to_jiffies(TPM2_TIMEOUT_C
);
35 chip
->timeout_d
= msecs_to_jiffies(TPM2_TIMEOUT_D
);
37 /* PTP spec timeouts */
38 chip
->duration
[TPM_SHORT
] = msecs_to_jiffies(TPM2_DURATION_SHORT
);
39 chip
->duration
[TPM_MEDIUM
] = msecs_to_jiffies(TPM2_DURATION_MEDIUM
);
40 chip
->duration
[TPM_LONG
] = msecs_to_jiffies(TPM2_DURATION_LONG
);
42 /* Key creation commands long timeouts */
43 chip
->duration
[TPM_LONG_LONG
] =
44 msecs_to_jiffies(TPM2_DURATION_LONG_LONG
);
46 chip
->flags
|= TPM_CHIP_FLAG_HAVE_TIMEOUTS
;
52 * tpm2_ordinal_duration_index() - returns an index to the chip duration table
53 * @ordinal: TPM command ordinal.
55 * The function returns an index to the chip duration table
56 * (enum tpm_duration), that describes the maximum amount of
57 * time the chip could take to return the result for a particular ordinal.
59 * The values of the MEDIUM, and LONG durations are taken
60 * from the PC Client Profile (PTP) specification (750, 2000 msec)
62 * LONG_LONG is for commands that generates keys which empirically takes
63 * a longer time on some systems.
71 static u8
tpm2_ordinal_duration_index(u32 ordinal
)
75 case TPM2_CC_STARTUP
: /* 144 */
78 case TPM2_CC_SELF_TEST
: /* 143 */
81 case TPM2_CC_GET_RANDOM
: /* 17B */
84 case TPM2_CC_SEQUENCE_UPDATE
: /* 15C */
86 case TPM2_CC_SEQUENCE_COMPLETE
: /* 13E */
88 case TPM2_CC_EVENT_SEQUENCE_COMPLETE
: /* 185 */
90 case TPM2_CC_HASH_SEQUENCE_START
: /* 186 */
93 case TPM2_CC_VERIFY_SIGNATURE
: /* 177 */
96 case TPM2_CC_PCR_EXTEND
: /* 182 */
99 case TPM2_CC_HIERARCHY_CONTROL
: /* 121 */
101 case TPM2_CC_HIERARCHY_CHANGE_AUTH
: /* 129 */
104 case TPM2_CC_GET_CAPABILITY
: /* 17A */
107 case TPM2_CC_NV_READ
: /* 14E */
110 case TPM2_CC_CREATE_PRIMARY
: /* 131 */
111 return TPM_LONG_LONG
;
112 case TPM2_CC_CREATE
: /* 153 */
113 return TPM_LONG_LONG
;
114 case TPM2_CC_CREATE_LOADED
: /* 191 */
115 return TPM_LONG_LONG
;
118 return TPM_UNDEFINED
;
123 * tpm2_calc_ordinal_duration() - calculate the maximum command duration
124 * @chip: TPM chip to use.
125 * @ordinal: TPM command ordinal.
127 * The function returns the maximum amount of time the chip could take
128 * to return the result for a particular ordinal in jiffies.
130 * Return: A maximal duration time for an ordinal in jiffies.
132 unsigned long tpm2_calc_ordinal_duration(struct tpm_chip
*chip
, u32 ordinal
)
136 index
= tpm2_ordinal_duration_index(ordinal
);
138 if (index
!= TPM_UNDEFINED
)
139 return chip
->duration
[index
];
141 return msecs_to_jiffies(TPM2_DURATION_DEFAULT
);
145 struct tpm2_pcr_read_out
{
147 __be32 pcr_selects_cnt
;
150 u8 pcr_select
[TPM2_PCR_SELECT_MIN
];
157 * tpm2_pcr_read() - read a PCR value
158 * @chip: TPM chip to use.
159 * @pcr_idx: index of the PCR to read.
160 * @digest: PCR bank and buffer current PCR value is written to.
161 * @digest_size_ptr: pointer to variable that stores the digest size.
163 * Return: Same as with tpm_transmit_cmd.
165 int tpm2_pcr_read(struct tpm_chip
*chip
, u32 pcr_idx
,
166 struct tpm_digest
*digest
, u16
*digest_size_ptr
)
171 struct tpm2_pcr_read_out
*out
;
172 u8 pcr_select
[TPM2_PCR_SELECT_MIN
] = {0};
174 u16 expected_digest_size
= 0;
176 if (pcr_idx
>= TPM2_PLATFORM_PCR
)
179 if (!digest_size_ptr
) {
180 for (i
= 0; i
< chip
->nr_allocated_banks
&&
181 chip
->allocated_banks
[i
].alg_id
!= digest
->alg_id
; i
++)
184 if (i
== chip
->nr_allocated_banks
)
187 expected_digest_size
= chip
->allocated_banks
[i
].digest_size
;
190 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_PCR_READ
);
194 pcr_select
[pcr_idx
>> 3] = 1 << (pcr_idx
& 0x7);
196 tpm_buf_append_u32(&buf
, 1);
197 tpm_buf_append_u16(&buf
, digest
->alg_id
);
198 tpm_buf_append_u8(&buf
, TPM2_PCR_SELECT_MIN
);
199 tpm_buf_append(&buf
, (const unsigned char *)pcr_select
,
202 rc
= tpm_transmit_cmd(chip
, &buf
, 0, "attempting to read a pcr value");
206 out
= (struct tpm2_pcr_read_out
*)&buf
.data
[TPM_HEADER_SIZE
];
207 digest_size
= be16_to_cpu(out
->digest_size
);
208 if (digest_size
> sizeof(digest
->digest
) ||
209 (!digest_size_ptr
&& digest_size
!= expected_digest_size
)) {
215 *digest_size_ptr
= digest_size
;
217 memcpy(digest
->digest
, out
->digest
, digest_size
);
219 tpm_buf_destroy(&buf
);
224 * tpm2_pcr_extend() - extend a PCR value
226 * @chip: TPM chip to use.
227 * @pcr_idx: index of the PCR.
228 * @digests: list of pcr banks and corresponding digest values to extend.
230 * Return: Same as with tpm_transmit_cmd.
232 int tpm2_pcr_extend(struct tpm_chip
*chip
, u32 pcr_idx
,
233 struct tpm_digest
*digests
)
239 if (!disable_pcr_integrity
) {
240 rc
= tpm2_start_auth_session(chip
);
245 rc
= tpm_buf_init(&buf
, TPM2_ST_SESSIONS
, TPM2_CC_PCR_EXTEND
);
247 if (!disable_pcr_integrity
)
248 tpm2_end_auth_session(chip
);
252 if (!disable_pcr_integrity
) {
253 tpm_buf_append_name(chip
, &buf
, pcr_idx
, NULL
);
254 tpm_buf_append_hmac_session(chip
, &buf
, 0, NULL
, 0);
256 tpm_buf_append_handle(chip
, &buf
, pcr_idx
);
257 tpm_buf_append_auth(chip
, &buf
, 0, NULL
, 0);
260 tpm_buf_append_u32(&buf
, chip
->nr_allocated_banks
);
262 for (i
= 0; i
< chip
->nr_allocated_banks
; i
++) {
263 tpm_buf_append_u16(&buf
, digests
[i
].alg_id
);
264 tpm_buf_append(&buf
, (const unsigned char *)&digests
[i
].digest
,
265 chip
->allocated_banks
[i
].digest_size
);
268 if (!disable_pcr_integrity
)
269 tpm_buf_fill_hmac_session(chip
, &buf
);
270 rc
= tpm_transmit_cmd(chip
, &buf
, 0, "attempting extend a PCR value");
271 if (!disable_pcr_integrity
)
272 rc
= tpm_buf_check_hmac_response(chip
, &buf
, rc
);
274 tpm_buf_destroy(&buf
);
279 struct tpm2_get_random_out
{
281 u8 buffer
[TPM_MAX_RNG_DATA
];
285 * tpm2_get_random() - get random bytes from the TPM RNG
287 * @chip: a &tpm_chip instance
288 * @dest: destination buffer
289 * @max: the max number of random bytes to pull
292 * size of the buffer on success,
293 * -errno otherwise (positive TPM return codes are masked to -EIO)
295 int tpm2_get_random(struct tpm_chip
*chip
, u8
*dest
, size_t max
)
297 struct tpm2_get_random_out
*out
;
298 struct tpm_header
*head
;
308 if (!num_bytes
|| max
> TPM_MAX_RNG_DATA
)
311 err
= tpm2_start_auth_session(chip
);
315 err
= tpm_buf_init(&buf
, 0, 0);
317 tpm2_end_auth_session(chip
);
322 tpm_buf_reset(&buf
, TPM2_ST_SESSIONS
, TPM2_CC_GET_RANDOM
);
323 tpm_buf_append_hmac_session_opt(chip
, &buf
, TPM2_SA_ENCRYPT
324 | TPM2_SA_CONTINUE_SESSION
,
326 tpm_buf_append_u16(&buf
, num_bytes
);
327 tpm_buf_fill_hmac_session(chip
, &buf
);
328 err
= tpm_transmit_cmd(chip
, &buf
,
329 offsetof(struct tpm2_get_random_out
,
331 "attempting get random");
332 err
= tpm_buf_check_hmac_response(chip
, &buf
, err
);
339 head
= (struct tpm_header
*)buf
.data
;
340 offset
= TPM_HEADER_SIZE
;
341 /* Skip the parameter size field: */
342 if (be16_to_cpu(head
->tag
) == TPM2_ST_SESSIONS
)
345 out
= (struct tpm2_get_random_out
*)&buf
.data
[offset
];
346 recd
= min_t(u32
, be16_to_cpu(out
->size
), num_bytes
);
347 if (tpm_buf_length(&buf
) <
349 offsetof(struct tpm2_get_random_out
, buffer
) +
354 memcpy(dest_ptr
, out
->buffer
, recd
);
359 } while (retries
-- && total
< max
);
361 tpm_buf_destroy(&buf
);
362 tpm2_end_auth_session(chip
);
364 return total
? total
: -EIO
;
366 tpm_buf_destroy(&buf
);
367 tpm2_end_auth_session(chip
);
372 * tpm2_flush_context() - execute a TPM2_FlushContext command
373 * @chip: TPM chip to use
374 * @handle: context handle
376 void tpm2_flush_context(struct tpm_chip
*chip
, u32 handle
)
381 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_FLUSH_CONTEXT
);
383 dev_warn(&chip
->dev
, "0x%08x was not flushed, out of memory\n",
388 tpm_buf_append_u32(&buf
, handle
);
390 tpm_transmit_cmd(chip
, &buf
, 0, "flushing context");
391 tpm_buf_destroy(&buf
);
393 EXPORT_SYMBOL_GPL(tpm2_flush_context
);
395 struct tpm2_get_cap_out
{
404 * tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property
405 * @chip: a &tpm_chip instance
406 * @property_id: property ID.
407 * @value: output variable.
408 * @desc: passed to tpm_transmit_cmd()
412 * -errno or a TPM return code otherwise
414 ssize_t
tpm2_get_tpm_pt(struct tpm_chip
*chip
, u32 property_id
, u32
*value
,
417 struct tpm2_get_cap_out
*out
;
421 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_GET_CAPABILITY
);
424 tpm_buf_append_u32(&buf
, TPM2_CAP_TPM_PROPERTIES
);
425 tpm_buf_append_u32(&buf
, property_id
);
426 tpm_buf_append_u32(&buf
, 1);
427 rc
= tpm_transmit_cmd(chip
, &buf
, 0, NULL
);
429 out
= (struct tpm2_get_cap_out
*)
430 &buf
.data
[TPM_HEADER_SIZE
];
432 * To prevent failing boot up of some systems, Infineon TPM2.0
433 * returns SUCCESS on TPM2_Startup in field upgrade mode. Also
434 * the TPM2_Getcapability command returns a zero length list
435 * in field upgrade mode.
437 if (be32_to_cpu(out
->property_cnt
) > 0)
438 *value
= be32_to_cpu(out
->value
);
442 tpm_buf_destroy(&buf
);
445 EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt
);
448 * tpm2_shutdown() - send a TPM shutdown command
450 * Sends a TPM shutdown command. The shutdown command is used in call
451 * sites where the system is going down. If it fails, there is not much
452 * that can be done except print an error message.
454 * @chip: a &tpm_chip instance
455 * @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE.
457 void tpm2_shutdown(struct tpm_chip
*chip
, u16 shutdown_type
)
462 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_SHUTDOWN
);
465 tpm_buf_append_u16(&buf
, shutdown_type
);
466 tpm_transmit_cmd(chip
, &buf
, 0, "stopping the TPM");
467 tpm_buf_destroy(&buf
);
471 * tpm2_do_selftest() - ensure that all self tests have passed
473 * @chip: TPM chip to use
475 * Return: Same as with tpm_transmit_cmd.
477 * The TPM can either run all self tests synchronously and then return
478 * RC_SUCCESS once all tests were successful. Or it can choose to run the tests
479 * asynchronously and return RC_TESTING immediately while the self tests still
480 * execute in the background. This function handles both cases and waits until
481 * all tests have completed.
483 static int tpm2_do_selftest(struct tpm_chip
*chip
)
489 for (full
= 0; full
< 2; full
++) {
490 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_SELF_TEST
);
494 tpm_buf_append_u8(&buf
, full
);
495 rc
= tpm_transmit_cmd(chip
, &buf
, 0,
496 "attempting the self test");
497 tpm_buf_destroy(&buf
);
499 if (rc
== TPM2_RC_TESTING
)
500 rc
= TPM2_RC_SUCCESS
;
501 if (rc
== TPM2_RC_INITIALIZE
|| rc
== TPM2_RC_SUCCESS
)
509 * tpm2_probe() - probe for the TPM 2.0 protocol
510 * @chip: a &tpm_chip instance
512 * Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the
513 * other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by
514 * this function if this is the case.
520 int tpm2_probe(struct tpm_chip
*chip
)
522 struct tpm_header
*out
;
526 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_GET_CAPABILITY
);
529 tpm_buf_append_u32(&buf
, TPM2_CAP_TPM_PROPERTIES
);
530 tpm_buf_append_u32(&buf
, TPM_PT_TOTAL_COMMANDS
);
531 tpm_buf_append_u32(&buf
, 1);
532 rc
= tpm_transmit_cmd(chip
, &buf
, 0, NULL
);
533 /* We ignore TPM return codes on purpose. */
535 out
= (struct tpm_header
*)buf
.data
;
536 if (be16_to_cpu(out
->tag
) == TPM2_ST_NO_SESSIONS
)
537 chip
->flags
|= TPM_CHIP_FLAG_TPM2
;
539 tpm_buf_destroy(&buf
);
542 EXPORT_SYMBOL_GPL(tpm2_probe
);
544 static int tpm2_init_bank_info(struct tpm_chip
*chip
, u32 bank_index
)
546 struct tpm_bank_info
*bank
= chip
->allocated_banks
+ bank_index
;
547 struct tpm_digest digest
= { .alg_id
= bank
->alg_id
};
551 * Avoid unnecessary PCR read operations to reduce overhead
552 * and obtain identifiers of the crypto subsystem.
554 for (i
= 0; i
< ARRAY_SIZE(tpm2_hash_map
); i
++) {
555 enum hash_algo crypto_algo
= tpm2_hash_map
[i
].crypto_id
;
557 if (bank
->alg_id
!= tpm2_hash_map
[i
].tpm_id
)
560 bank
->digest_size
= hash_digest_size
[crypto_algo
];
561 bank
->crypto_id
= crypto_algo
;
565 bank
->crypto_id
= HASH_ALGO__LAST
;
567 return tpm2_pcr_read(chip
, 0, &digest
, &bank
->digest_size
);
570 struct tpm2_pcr_selection
{
576 ssize_t
tpm2_get_pcr_allocation(struct tpm_chip
*chip
)
578 struct tpm2_pcr_selection pcr_selection
;
582 void *pcr_select_offset
;
583 u32 sizeof_pcr_selection
;
584 u32 nr_possible_banks
;
585 u32 nr_alloc_banks
= 0;
591 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_GET_CAPABILITY
);
595 tpm_buf_append_u32(&buf
, TPM2_CAP_PCRS
);
596 tpm_buf_append_u32(&buf
, 0);
597 tpm_buf_append_u32(&buf
, 1);
599 rc
= tpm_transmit_cmd(chip
, &buf
, 9, "get tpm pcr allocation");
603 nr_possible_banks
= be32_to_cpup(
604 (__be32
*)&buf
.data
[TPM_HEADER_SIZE
+ 5]);
606 chip
->allocated_banks
= kcalloc(nr_possible_banks
,
607 sizeof(*chip
->allocated_banks
),
609 if (!chip
->allocated_banks
) {
614 marker
= &buf
.data
[TPM_HEADER_SIZE
+ 9];
616 rsp_len
= be32_to_cpup((__be32
*)&buf
.data
[2]);
617 end
= &buf
.data
[rsp_len
];
619 for (i
= 0; i
< nr_possible_banks
; i
++) {
620 pcr_select_offset
= marker
+
621 offsetof(struct tpm2_pcr_selection
, size_of_select
);
622 if (pcr_select_offset
>= end
) {
627 memcpy(&pcr_selection
, marker
, sizeof(pcr_selection
));
628 hash_alg
= be16_to_cpu(pcr_selection
.hash_alg
);
630 pcr_select_offset
= memchr_inv(pcr_selection
.pcr_select
, 0,
631 pcr_selection
.size_of_select
);
632 if (pcr_select_offset
) {
633 chip
->allocated_banks
[nr_alloc_banks
].alg_id
= hash_alg
;
635 rc
= tpm2_init_bank_info(chip
, nr_alloc_banks
);
642 sizeof_pcr_selection
= sizeof(pcr_selection
.hash_alg
) +
643 sizeof(pcr_selection
.size_of_select
) +
644 pcr_selection
.size_of_select
;
645 marker
= marker
+ sizeof_pcr_selection
;
648 chip
->nr_allocated_banks
= nr_alloc_banks
;
650 tpm_buf_destroy(&buf
);
655 int tpm2_get_cc_attrs_tbl(struct tpm_chip
*chip
)
664 rc
= tpm2_get_tpm_pt(chip
, TPM_PT_TOTAL_COMMANDS
, &nr_commands
, NULL
);
668 if (nr_commands
> 0xFFFFF) {
673 chip
->cc_attrs_tbl
= devm_kcalloc(&chip
->dev
, 4, nr_commands
,
675 if (!chip
->cc_attrs_tbl
) {
680 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_GET_CAPABILITY
);
684 tpm_buf_append_u32(&buf
, TPM2_CAP_COMMANDS
);
685 tpm_buf_append_u32(&buf
, TPM2_CC_FIRST
);
686 tpm_buf_append_u32(&buf
, nr_commands
);
688 rc
= tpm_transmit_cmd(chip
, &buf
, 9 + 4 * nr_commands
, NULL
);
690 tpm_buf_destroy(&buf
);
695 be32_to_cpup((__be32
*)&buf
.data
[TPM_HEADER_SIZE
+ 5])) {
697 tpm_buf_destroy(&buf
);
701 chip
->nr_commands
= nr_commands
;
703 attrs
= (__be32
*)&buf
.data
[TPM_HEADER_SIZE
+ 9];
704 for (i
= 0; i
< nr_commands
; i
++, attrs
++) {
705 chip
->cc_attrs_tbl
[i
] = be32_to_cpup(attrs
);
706 cc
= chip
->cc_attrs_tbl
[i
] & 0xFFFF;
708 if (cc
== TPM2_CC_CONTEXT_SAVE
|| cc
== TPM2_CC_FLUSH_CONTEXT
) {
709 chip
->cc_attrs_tbl
[i
] &=
710 ~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES
);
711 chip
->cc_attrs_tbl
[i
] |= 1 << TPM2_CC_ATTR_CHANDLES
;
715 tpm_buf_destroy(&buf
);
722 EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl
);
725 * tpm2_startup - turn on the TPM
726 * @chip: TPM chip to use
728 * Normally the firmware should start the TPM. This function is provided as a
729 * workaround if this does not happen. A legal case for this could be for
730 * example when a TPM emulator is used.
732 * Return: same as tpm_transmit_cmd()
735 static int tpm2_startup(struct tpm_chip
*chip
)
740 dev_info(&chip
->dev
, "starting up the TPM manually\n");
742 rc
= tpm_buf_init(&buf
, TPM2_ST_NO_SESSIONS
, TPM2_CC_STARTUP
);
746 tpm_buf_append_u16(&buf
, TPM2_SU_CLEAR
);
747 rc
= tpm_transmit_cmd(chip
, &buf
, 0, "attempting to start the TPM");
748 tpm_buf_destroy(&buf
);
754 * tpm2_auto_startup - Perform the standard automatic TPM initialization
756 * @chip: TPM chip to use
758 * Returns 0 on success, < 0 in case of fatal error.
760 int tpm2_auto_startup(struct tpm_chip
*chip
)
764 rc
= tpm2_get_timeouts(chip
);
768 rc
= tpm2_do_selftest(chip
);
769 if (rc
&& rc
!= TPM2_RC_INITIALIZE
)
772 if (rc
== TPM2_RC_INITIALIZE
) {
773 rc
= tpm2_startup(chip
);
777 rc
= tpm2_do_selftest(chip
);
782 rc
= tpm2_get_cc_attrs_tbl(chip
);
783 if (rc
== TPM2_RC_FAILURE
|| (rc
< 0 && rc
!= -ENOMEM
)) {
785 "TPM in field failure mode, requires firmware upgrade\n");
786 chip
->flags
|= TPM_CHIP_FLAG_FIRMWARE_UPGRADE
;
793 rc
= tpm2_sessions_init(chip
);
797 * Infineon TPM in field upgrade mode will return no data for the number
798 * of supported commands.
800 if (rc
== TPM2_RC_UPGRADE
|| rc
== -ENODATA
) {
801 dev_info(&chip
->dev
, "TPM in field upgrade mode, requires firmware upgrade\n");
802 chip
->flags
|= TPM_CHIP_FLAG_FIRMWARE_UPGRADE
;
811 int tpm2_find_cc(struct tpm_chip
*chip
, u32 cc
)
816 cc_mask
= 1 << TPM2_CC_ATTR_VENDOR
| GENMASK(15, 0);
817 for (i
= 0; i
< chip
->nr_commands
; i
++)
818 if (cc
== (chip
->cc_attrs_tbl
[i
] & cc_mask
))