1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /******************************************************************************
3 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
4 * based on the TCG TPM Interface Spec version 1.2.
5 * Specifications at www.trustedcomputinggroup.org
7 * Copyright (C) 2011, Nuvoton Technology Corporation.
8 * Dan Morav <dan.morav@nuvoton.com>
9 * Copyright (C) 2013, Obsidian Research Corp.
10 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
12 * Nuvoton contact information: APC.Support@nuvoton.com
13 *****************************************************************************/
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/slab.h>
19 #include <linux/interrupt.h>
20 #include <linux/wait.h>
21 #include <linux/i2c.h>
23 #include <linux/property.h>
26 /* I2C interface offsets */
28 #define TPM_BURST_COUNT 0x01
29 #define TPM_DATA_FIFO_W 0x20
30 #define TPM_DATA_FIFO_R 0x40
31 #define TPM_VID_DID_RID 0x60
32 #define TPM_I2C_RETRIES 5
34 * I2C bus device maximum buffer size w/o counting I2C address or command
35 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
37 #define TPM_I2C_MAX_BUF_SIZE 32
38 #define TPM_I2C_RETRY_COUNT 32
39 #define TPM_I2C_BUS_DELAY 1000 /* usec */
40 #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
41 #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
42 #define TPM_I2C_DELAY_RANGE 300 /* usec */
44 #define OF_IS_TPM2 ((void *)1)
50 wait_queue_head_t read_queue
;
53 static s32
i2c_nuvoton_read_buf(struct i2c_client
*client
, u8 offset
, u8 size
,
58 status
= i2c_smbus_read_i2c_block_data(client
, offset
, size
, data
);
60 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__
,
61 offset
, size
, (int)size
, data
, status
);
65 static s32
i2c_nuvoton_write_buf(struct i2c_client
*client
, u8 offset
, u8 size
,
70 status
= i2c_smbus_write_i2c_block_data(client
, offset
, size
, data
);
72 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__
,
73 offset
, size
, (int)size
, data
, status
);
77 #define TPM_STS_VALID 0x80
78 #define TPM_STS_COMMAND_READY 0x40
79 #define TPM_STS_GO 0x20
80 #define TPM_STS_DATA_AVAIL 0x10
81 #define TPM_STS_EXPECT 0x08
82 #define TPM_STS_RESPONSE_RETRY 0x02
83 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
85 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
86 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
88 /* read TPM_STS register */
89 static u8
i2c_nuvoton_read_status(struct tpm_chip
*chip
)
91 struct i2c_client
*client
= to_i2c_client(chip
->dev
.parent
);
95 status
= i2c_nuvoton_read_buf(client
, TPM_STS
, 1, &data
);
97 dev_err(&chip
->dev
, "%s() error return %d\n", __func__
,
99 data
= TPM_STS_ERR_VAL
;
105 /* write byte to TPM_STS register */
106 static s32
i2c_nuvoton_write_status(struct i2c_client
*client
, u8 data
)
111 /* this causes the current command to be aborted */
112 for (i
= 0, status
= -1; i
< TPM_I2C_RETRY_COUNT
&& status
< 0; i
++) {
113 status
= i2c_nuvoton_write_buf(client
, TPM_STS
, 1, &data
);
115 usleep_range(TPM_I2C_BUS_DELAY
, TPM_I2C_BUS_DELAY
116 + TPM_I2C_DELAY_RANGE
);
121 /* write commandReady to TPM_STS register */
122 static void i2c_nuvoton_ready(struct tpm_chip
*chip
)
124 struct i2c_client
*client
= to_i2c_client(chip
->dev
.parent
);
127 /* this causes the current command to be aborted */
128 status
= i2c_nuvoton_write_status(client
, TPM_STS_COMMAND_READY
);
131 "%s() fail to write TPM_STS.commandReady\n", __func__
);
134 /* read burstCount field from TPM_STS register
135 * return -1 on fail to read */
136 static int i2c_nuvoton_get_burstcount(struct i2c_client
*client
,
137 struct tpm_chip
*chip
)
139 unsigned long stop
= jiffies
+ chip
->timeout_d
;
141 int burst_count
= -1;
144 /* wait for burstcount to be non-zero */
146 /* in I2C burstCount is 1 byte */
147 status
= i2c_nuvoton_read_buf(client
, TPM_BURST_COUNT
, 1,
149 if (status
> 0 && data
> 0) {
150 burst_count
= min_t(u8
, TPM_I2C_MAX_BUF_SIZE
, data
);
153 usleep_range(TPM_I2C_BUS_DELAY
, TPM_I2C_BUS_DELAY
154 + TPM_I2C_DELAY_RANGE
);
155 } while (time_before(jiffies
, stop
));
161 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
162 * any call to this function which is not waiting for dataAvail will
163 * set queue to NULL to avoid waiting for interrupt
165 static bool i2c_nuvoton_check_status(struct tpm_chip
*chip
, u8 mask
, u8 value
)
167 u8 status
= i2c_nuvoton_read_status(chip
);
168 return (status
!= TPM_STS_ERR_VAL
) && ((status
& mask
) == value
);
171 static int i2c_nuvoton_wait_for_stat(struct tpm_chip
*chip
, u8 mask
, u8 value
,
172 u32 timeout
, wait_queue_head_t
*queue
)
174 if ((chip
->flags
& TPM_CHIP_FLAG_IRQ
) && queue
) {
176 struct priv_data
*priv
= dev_get_drvdata(&chip
->dev
);
177 unsigned int cur_intrs
= priv
->intrs
;
179 enable_irq(priv
->irq
);
180 rc
= wait_event_interruptible_timeout(*queue
,
181 cur_intrs
!= priv
->intrs
,
185 /* At this point we know that the SINT pin is asserted, so we
186 * do not need to do i2c_nuvoton_check_status */
188 unsigned long ten_msec
, stop
;
191 /* check current status */
192 status_valid
= i2c_nuvoton_check_status(chip
, mask
, value
);
196 /* use polling to wait for the event */
197 ten_msec
= jiffies
+ usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG
);
198 stop
= jiffies
+ timeout
;
200 if (time_before(jiffies
, ten_msec
))
201 usleep_range(TPM_I2C_RETRY_DELAY_SHORT
,
202 TPM_I2C_RETRY_DELAY_SHORT
203 + TPM_I2C_DELAY_RANGE
);
205 usleep_range(TPM_I2C_RETRY_DELAY_LONG
,
206 TPM_I2C_RETRY_DELAY_LONG
207 + TPM_I2C_DELAY_RANGE
);
208 status_valid
= i2c_nuvoton_check_status(chip
, mask
,
212 } while (time_before(jiffies
, stop
));
214 dev_err(&chip
->dev
, "%s(%02x, %02x) -> timeout\n", __func__
, mask
,
219 /* wait for dataAvail field to be set in the TPM_STS register */
220 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip
*chip
, u32 timeout
,
221 wait_queue_head_t
*queue
)
223 return i2c_nuvoton_wait_for_stat(chip
,
224 TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
225 TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
229 /* Read @count bytes into @buf from TPM_RD_FIFO register */
230 static int i2c_nuvoton_recv_data(struct i2c_client
*client
,
231 struct tpm_chip
*chip
, u8
*buf
, size_t count
)
233 struct priv_data
*priv
= dev_get_drvdata(&chip
->dev
);
235 int burst_count
, bytes2read
, size
= 0;
237 while (size
< count
&&
238 i2c_nuvoton_wait_for_data_avail(chip
,
240 &priv
->read_queue
) == 0) {
241 burst_count
= i2c_nuvoton_get_burstcount(client
, chip
);
242 if (burst_count
< 0) {
244 "%s() fail to read burstCount=%d\n", __func__
,
248 bytes2read
= min_t(size_t, burst_count
, count
- size
);
249 rc
= i2c_nuvoton_read_buf(client
, TPM_DATA_FIFO_R
,
250 bytes2read
, &buf
[size
]);
253 "%s() fail on i2c_nuvoton_read_buf()=%d\n",
257 dev_dbg(&chip
->dev
, "%s(%d):", __func__
, bytes2read
);
264 /* Read TPM command results */
265 static int i2c_nuvoton_recv(struct tpm_chip
*chip
, u8
*buf
, size_t count
)
267 struct priv_data
*priv
= dev_get_drvdata(&chip
->dev
);
268 struct device
*dev
= chip
->dev
.parent
;
269 struct i2c_client
*client
= to_i2c_client(dev
);
277 if (count
< TPM_HEADER_SIZE
) {
278 i2c_nuvoton_ready(chip
); /* return to idle */
279 dev_err(dev
, "%s() count < header size\n", __func__
);
282 for (retries
= 0; retries
< TPM_I2C_RETRIES
; retries
++) {
284 /* if this is not the first trial, set responseRetry */
285 i2c_nuvoton_write_status(client
,
286 TPM_STS_RESPONSE_RETRY
);
289 * read first available (> 10 bytes), including:
290 * tag, paramsize, and result
292 status
= i2c_nuvoton_wait_for_data_avail(
293 chip
, chip
->timeout_c
, &priv
->read_queue
);
295 dev_err(dev
, "%s() timeout on dataAvail\n", __func__
);
299 burst_count
= i2c_nuvoton_get_burstcount(client
, chip
);
300 if (burst_count
< 0) {
301 dev_err(dev
, "%s() fail to get burstCount\n", __func__
);
305 size
= i2c_nuvoton_recv_data(client
, chip
, buf
,
307 if (size
< TPM_HEADER_SIZE
) {
308 dev_err(dev
, "%s() fail to read header\n", __func__
);
313 * convert number of expected bytes field from big endian 32 bit
316 expected
= be32_to_cpu(*(__be32
*) (buf
+ 2));
317 if (expected
> count
|| expected
< size
) {
318 dev_err(dev
, "%s() expected > count\n", __func__
);
322 rc
= i2c_nuvoton_recv_data(client
, chip
, &buf
[size
],
325 if (rc
< 0 || size
< expected
) {
326 dev_err(dev
, "%s() fail to read remainder of result\n",
331 if (i2c_nuvoton_wait_for_stat(
332 chip
, TPM_STS_VALID
| TPM_STS_DATA_AVAIL
,
333 TPM_STS_VALID
, chip
->timeout_c
,
335 dev_err(dev
, "%s() error left over data\n", __func__
);
341 i2c_nuvoton_ready(chip
);
342 dev_dbg(&chip
->dev
, "%s() -> %d\n", __func__
, size
);
349 * If interrupts are used (signaled by an irq set in the vendor structure)
350 * tpm.c can skip polling for the data to be available as the interrupt is
353 static int i2c_nuvoton_send(struct tpm_chip
*chip
, u8
*buf
, size_t len
)
355 struct priv_data
*priv
= dev_get_drvdata(&chip
->dev
);
356 struct device
*dev
= chip
->dev
.parent
;
357 struct i2c_client
*client
= to_i2c_client(dev
);
359 unsigned long duration
;
361 int burst_count
, bytes2write
, retries
, rc
= -EIO
;
363 for (retries
= 0; retries
< TPM_RETRY
; retries
++) {
364 i2c_nuvoton_ready(chip
);
365 if (i2c_nuvoton_wait_for_stat(chip
, TPM_STS_COMMAND_READY
,
366 TPM_STS_COMMAND_READY
,
367 chip
->timeout_b
, NULL
)) {
368 dev_err(dev
, "%s() timeout on commandReady\n",
374 while (count
< len
- 1) {
375 burst_count
= i2c_nuvoton_get_burstcount(client
,
377 if (burst_count
< 0) {
378 dev_err(dev
, "%s() fail get burstCount\n",
383 bytes2write
= min_t(size_t, burst_count
,
385 rc
= i2c_nuvoton_write_buf(client
, TPM_DATA_FIFO_W
,
386 bytes2write
, &buf
[count
]);
388 dev_err(dev
, "%s() fail i2cWriteBuf\n",
392 dev_dbg(dev
, "%s(%d):", __func__
, bytes2write
);
393 count
+= bytes2write
;
394 rc
= i2c_nuvoton_wait_for_stat(chip
,
402 dev_err(dev
, "%s() timeout on Expect\n",
411 /* write last byte */
412 rc
= i2c_nuvoton_write_buf(client
, TPM_DATA_FIFO_W
, 1,
415 dev_err(dev
, "%s() fail to write last byte\n",
420 dev_dbg(dev
, "%s(last): %02x", __func__
, buf
[count
]);
421 rc
= i2c_nuvoton_wait_for_stat(chip
,
422 TPM_STS_VALID
| TPM_STS_EXPECT
,
424 chip
->timeout_c
, NULL
);
426 dev_err(dev
, "%s() timeout on Expect to clear\n",
434 /* retries == TPM_RETRY */
435 i2c_nuvoton_ready(chip
);
438 /* execute the TPM command */
439 rc
= i2c_nuvoton_write_status(client
, TPM_STS_GO
);
441 dev_err(dev
, "%s() fail to write Go\n", __func__
);
442 i2c_nuvoton_ready(chip
);
445 ordinal
= be32_to_cpu(*((__be32
*) (buf
+ 6)));
446 duration
= tpm_calc_ordinal_duration(chip
, ordinal
);
448 rc
= i2c_nuvoton_wait_for_data_avail(chip
, duration
, &priv
->read_queue
);
450 dev_err(dev
, "%s() timeout command duration %ld\n",
452 i2c_nuvoton_ready(chip
);
456 dev_dbg(dev
, "%s() -> %zd\n", __func__
, len
);
460 static bool i2c_nuvoton_req_canceled(struct tpm_chip
*chip
, u8 status
)
462 return (status
== TPM_STS_COMMAND_READY
);
465 static const struct tpm_class_ops tpm_i2c
= {
466 .flags
= TPM_OPS_AUTO_STARTUP
,
467 .status
= i2c_nuvoton_read_status
,
468 .recv
= i2c_nuvoton_recv
,
469 .send
= i2c_nuvoton_send
,
470 .cancel
= i2c_nuvoton_ready
,
471 .req_complete_mask
= TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
472 .req_complete_val
= TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
473 .req_canceled
= i2c_nuvoton_req_canceled
,
476 /* The only purpose for the handler is to signal to any waiting threads that
477 * the interrupt is currently being asserted. The driver does not do any
478 * processing triggered by interrupts, and the chip provides no way to mask at
479 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
480 * this means it cannot be shared. */
481 static irqreturn_t
i2c_nuvoton_int_handler(int dummy
, void *dev_id
)
483 struct tpm_chip
*chip
= dev_id
;
484 struct priv_data
*priv
= dev_get_drvdata(&chip
->dev
);
487 wake_up(&priv
->read_queue
);
488 disable_irq_nosync(priv
->irq
);
492 static int get_vid(struct i2c_client
*client
, u32
*res
)
494 static const u8 vid_did_rid_value
[] = { 0x50, 0x10, 0xfe };
498 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_SMBUS_BYTE_DATA
))
500 rc
= i2c_nuvoton_read_buf(client
, TPM_VID_DID_RID
, 4, (u8
*)&temp
);
504 /* check WPCT301 values - ignore RID */
505 if (memcmp(&temp
, vid_did_rid_value
, sizeof(vid_did_rid_value
))) {
507 * f/w rev 2.81 has an issue where the VID_DID_RID is not
508 * reporting the right value. so give it another chance at
509 * offset 0x20 (FIFO_W).
511 rc
= i2c_nuvoton_read_buf(client
, TPM_DATA_FIFO_W
, 4,
516 /* check WPCT301 values - ignore RID */
517 if (memcmp(&temp
, vid_did_rid_value
,
518 sizeof(vid_did_rid_value
)))
526 static int i2c_nuvoton_probe(struct i2c_client
*client
)
529 struct tpm_chip
*chip
;
530 struct device
*dev
= &client
->dev
;
531 struct priv_data
*priv
;
534 rc
= get_vid(client
, &vid
);
538 dev_info(dev
, "VID: %04X DID: %02X RID: %02X\n", (u16
) vid
,
539 (u8
) (vid
>> 16), (u8
) (vid
>> 24));
541 chip
= tpmm_chip_alloc(dev
, &tpm_i2c
);
543 return PTR_ERR(chip
);
545 priv
= devm_kzalloc(dev
, sizeof(struct priv_data
), GFP_KERNEL
);
549 if (i2c_get_match_data(client
))
550 chip
->flags
|= TPM_CHIP_FLAG_TPM2
;
552 init_waitqueue_head(&priv
->read_queue
);
554 /* Default timeouts */
555 chip
->timeout_a
= msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT
);
556 chip
->timeout_b
= msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT
);
557 chip
->timeout_c
= msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT
);
558 chip
->timeout_d
= msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT
);
560 dev_set_drvdata(&chip
->dev
, priv
);
563 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
564 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
565 * The IRQ should be set in the i2c_board_info (which is done
566 * automatically in of_i2c_register_devices, for device tree users */
567 priv
->irq
= client
->irq
;
569 dev_dbg(dev
, "%s() priv->irq\n", __func__
);
570 rc
= devm_request_irq(dev
, client
->irq
,
571 i2c_nuvoton_int_handler
,
573 dev_name(&chip
->dev
),
576 dev_err(dev
, "%s() Unable to request irq: %d for use\n",
577 __func__
, priv
->irq
);
580 chip
->flags
|= TPM_CHIP_FLAG_IRQ
;
581 /* Clear any pending interrupt */
582 i2c_nuvoton_ready(chip
);
583 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
584 rc
= i2c_nuvoton_wait_for_stat(chip
,
585 TPM_STS_COMMAND_READY
,
586 TPM_STS_COMMAND_READY
,
591 * TIS is in ready state
592 * write dummy byte to enter reception state
593 * TPM_DATA_FIFO_W <- rc (0)
595 rc
= i2c_nuvoton_write_buf(client
,
600 /* TPM_STS <- 0x40 (commandReady) */
601 i2c_nuvoton_ready(chip
);
604 * timeout_b reached - command was
605 * aborted. TIS should now be in idle state -
606 * only TPM_STS_VALID should be set
608 if (i2c_nuvoton_read_status(chip
) !=
615 return tpm_chip_register(chip
);
618 static void i2c_nuvoton_remove(struct i2c_client
*client
)
620 struct tpm_chip
*chip
= i2c_get_clientdata(client
);
622 tpm_chip_unregister(chip
);
625 static const struct i2c_device_id i2c_nuvoton_id
[] = {
627 {"tpm2_i2c_nuvoton", .driver_data
= I2C_IS_TPM2
},
630 MODULE_DEVICE_TABLE(i2c
, i2c_nuvoton_id
);
633 static const struct of_device_id i2c_nuvoton_of_match
[] = {
634 {.compatible
= "nuvoton,npct501"},
635 {.compatible
= "winbond,wpct301"},
636 {.compatible
= "nuvoton,npct601", .data
= OF_IS_TPM2
},
639 MODULE_DEVICE_TABLE(of
, i2c_nuvoton_of_match
);
642 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops
, tpm_pm_suspend
, tpm_pm_resume
);
644 static struct i2c_driver i2c_nuvoton_driver
= {
645 .id_table
= i2c_nuvoton_id
,
646 .probe
= i2c_nuvoton_probe
,
647 .remove
= i2c_nuvoton_remove
,
649 .name
= "tpm_i2c_nuvoton",
650 .pm
= &i2c_nuvoton_pm_ops
,
651 .of_match_table
= of_match_ptr(i2c_nuvoton_of_match
),
655 module_i2c_driver(i2c_nuvoton_driver
);
657 MODULE_AUTHOR("Dan Morav <dan.morav@nuvoton.com>");
658 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
659 MODULE_LICENSE("GPL");