drivers/clk/mediatek/clk-mt8186-wpe.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // Copyright (c) 2022 MediaTek Inc.
   4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
   5
   6 #include <linux/clk-provider.h>
   7 #include <linux/platform_device.h>
   8 #include <dt-bindings/clock/mt8186-clk.h>
   9
  10 #include "clk-gate.h"
  11 #include "clk-mtk.h"
  12
  13 static const struct mtk_gate_regs wpe_cg_regs = {
  14         .set_ofs = 0x0,
  15         .clr_ofs = 0x0,
  16         .sta_ofs = 0x0,
  17 };
  18
  19 #define GATE_WPE(_id, _name, _parent, _shift)                   \
  20         GATE_MTK(_id, _name, _parent, &wpe_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
  21
  22 static const struct mtk_gate wpe_clks[] = {
  23         GATE_WPE(CLK_WPE_CK_EN, "wpe", "top_wpe", 17),
  24         GATE_WPE(CLK_WPE_SMI_LARB8_CK_EN, "wpe_smi_larb8", "top_wpe", 19),
  25         GATE_WPE(CLK_WPE_SYS_EVENT_TX_CK_EN, "wpe_sys_event_tx", "top_wpe", 20),
  26         GATE_WPE(CLK_WPE_SMI_LARB8_PCLK_EN, "wpe_smi_larb8_p_en", "top_wpe", 25),
  27 };
  28
  29 static const struct mtk_clk_desc wpe_desc = {
  30         .clks = wpe_clks,
  31         .num_clks = ARRAY_SIZE(wpe_clks),
  32 };
  33
  34 static const struct of_device_id of_match_clk_mt8186_wpe[] = {
  35         {
  36                 .compatible = "mediatek,mt8186-wpesys",
  37                 .data = &wpe_desc,
  38         }, {
  39                 /* sentinel */
  40         }
  41 };
  42 MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_wpe);
  43
  44 static struct platform_driver clk_mt8186_wpe_drv = {
  45         .probe = mtk_clk_simple_probe,
  46         .remove = mtk_clk_simple_remove,
  47         .driver = {
  48                 .name = "clk-mt8186-wpe",
  49                 .of_match_table = of_match_clk_mt8186_wpe,
  50         },
  51 };
  52 module_platform_driver(clk_mt8186_wpe_drv);
  53
  54 MODULE_DESCRIPTION("MediaTek MT8186 Warp Engine clocks driver");
  55 MODULE_LICENSE("GPL");