drivers/clk/mediatek/reset.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2022 MediaTek Inc.
   4  */
   5
   6 #ifndef __DRV_CLK_MTK_RESET_H
   7 #define __DRV_CLK_MTK_RESET_H
   8
   9 #include <linux/reset-controller.h>
  10 #include <linux/types.h>
  11
  12 #define RST_NR_PER_BANK 32
  13
  14 /* Infra global controller reset set register */
  15 #define INFRA_RST0_SET_OFFSET 0x120
  16 #define INFRA_RST1_SET_OFFSET 0x130
  17 #define INFRA_RST2_SET_OFFSET 0x140
  18 #define INFRA_RST3_SET_OFFSET 0x150
  19 #define INFRA_RST4_SET_OFFSET 0x730
  20
  21 /**
  22  * enum mtk_reset_version - Version of MediaTek clock reset controller.
  23  * @MTK_RST_SIMPLE: Use the same registers for bit set and clear.
  24  * @MTK_RST_SET_CLR: Use separate registers for bit set and clear.
  25  * @MTK_RST_MAX: Total quantity of version for MediaTek clock reset controller.
  26  */
  27 enum mtk_reset_version {
  28         MTK_RST_SIMPLE = 0,
  29         MTK_RST_SET_CLR,
  30         MTK_RST_MAX,
  31 };
  32
  33 /**
  34  * struct mtk_clk_rst_desc - Description of MediaTek clock reset.
  35  * @version: Reset version which is defined in enum mtk_reset_version.
  36  * @rst_bank_ofs: Pointer to an array containing base offsets of the reset register.
  37  * @rst_bank_nr: Quantity of reset bank.
  38  * @rst_idx_map:Pointer to an array containing ids if input argument is index.
  39  *              This array is not necessary if our input argument does not mean index.
  40  * @rst_idx_map_nr: Quantity of reset index map.
  41  */
  42 struct mtk_clk_rst_desc {
  43         enum mtk_reset_version version;
  44         u16 *rst_bank_ofs;
  45         u32 rst_bank_nr;
  46         u16 *rst_idx_map;
  47         u32 rst_idx_map_nr;
  48 };
  49
  50 /**
  51  * struct mtk_clk_rst_data - Data of MediaTek clock reset controller.
  52  * @regmap: Pointer to base address of reset register address.
  53  * @rcdev: Reset controller device.
  54  * @desc: Pointer to description of the reset controller.
  55  */
  56 struct mtk_clk_rst_data {
  57         struct regmap *regmap;
  58         struct reset_controller_dev rcdev;
  59         const struct mtk_clk_rst_desc *desc;
  60 };
  61
  62 /**
  63  * mtk_register_reset_controller - Register mediatek clock reset controller with device
  64  * @np: Pointer to device.
  65  * @desc: Constant pointer to description of clock reset.
  66  *
  67  * Return: 0 on success and errorno otherwise.
  68  */
  69 int mtk_register_reset_controller_with_dev(struct device *dev,
  70                                            const struct mtk_clk_rst_desc *desc);
  71
  72 #endif /* __DRV_CLK_MTK_RESET_H */