drivers/clk/meson/vclk.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2024 Neil Armstrong <neil.armstrong@linaro.org>
   4  */
   5
   6 #ifndef __VCLK_H
   7 #define __VCLK_H
   8
   9 #include "clk-regmap.h"
  10 #include "parm.h"
  11
  12 /**
  13  * struct meson_vclk_gate_data - vclk_gate regmap backed specific data
  14  *
  15  * @enable:     vclk enable field
  16  * @reset:      vclk reset field
  17  * @flags:      hardware-specific flags
  18  *
  19  * Flags:
  20  * Same as clk_gate except CLK_GATE_HIWORD_MASK which is ignored
  21  */
  22 struct meson_vclk_gate_data {
  23         struct parm enable;
  24         struct parm reset;
  25         u8 flags;
  26 };
  27
  28 extern const struct clk_ops meson_vclk_gate_ops;
  29
  30 /**
  31  * struct meson_vclk_div_data - vclk_div regmap back specific data
  32  *
  33  * @div:        divider field
  34  * @enable:     vclk divider enable field
  35  * @reset:      vclk divider reset field
  36  * @table:      array of value/divider pairs, last entry should have div = 0
  37  *
  38  * Flags:
  39  * Same as clk_divider except CLK_DIVIDER_HIWORD_MASK which is ignored
  40  */
  41 struct meson_vclk_div_data {
  42         struct parm div;
  43         struct parm enable;
  44         struct parm reset;
  45         const struct clk_div_table *table;
  46         u8 flags;
  47 };
  48
  49 extern const struct clk_ops meson_vclk_div_ops;
  50
  51 #endif /* __VCLK_H */