Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / clk / pistachio / clk.h
blob2f4ffbd98282109b8c3cd6e99ea01d30fa7894dc
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2014 Google, Inc.
4 */
6 #ifndef __PISTACHIO_CLK_H
7 #define __PISTACHIO_CLK_H
9 #include <linux/clk-provider.h>
11 struct pistachio_gate {
12 unsigned int id;
13 unsigned long reg;
14 unsigned int shift;
15 const char *name;
16 const char *parent;
19 #define GATE(_id, _name, _pname, _reg, _shift) \
20 { \
21 .id = _id, \
22 .reg = _reg, \
23 .shift = _shift, \
24 .name = _name, \
25 .parent = _pname, \
28 struct pistachio_mux {
29 unsigned int id;
30 unsigned long reg;
31 unsigned int shift;
32 unsigned int num_parents;
33 const char *name;
34 const char *const *parents;
37 #define PNAME(x) static const char *const x[] __initconst
39 #define MUX(_id, _name, _pnames, _reg, _shift) \
40 { \
41 .id = _id, \
42 .reg = _reg, \
43 .shift = _shift, \
44 .name = _name, \
45 .parents = _pnames, \
46 .num_parents = ARRAY_SIZE(_pnames) \
50 struct pistachio_div {
51 unsigned int id;
52 unsigned long reg;
53 unsigned int width;
54 unsigned int div_flags;
55 const char *name;
56 const char *parent;
59 #define DIV(_id, _name, _pname, _reg, _width) \
60 { \
61 .id = _id, \
62 .reg = _reg, \
63 .width = _width, \
64 .div_flags = 0, \
65 .name = _name, \
66 .parent = _pname, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \
70 { \
71 .id = _id, \
72 .reg = _reg, \
73 .width = _width, \
74 .div_flags = _div_flags, \
75 .name = _name, \
76 .parent = _pname, \
79 struct pistachio_fixed_factor {
80 unsigned int id;
81 unsigned int div;
82 const char *name;
83 const char *parent;
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \
87 { \
88 .id = _id, \
89 .div = _div, \
90 .name = _name, \
91 .parent = _pname, \
94 struct pistachio_pll_rate_table {
95 unsigned long long fref;
96 unsigned long long fout;
97 unsigned long long refdiv;
98 unsigned long long fbdiv;
99 unsigned long long postdiv1;
100 unsigned long long postdiv2;
101 unsigned long long frac;
104 enum pistachio_pll_type {
105 PLL_GF40LP_LAINT,
106 PLL_GF40LP_FRAC,
109 struct pistachio_pll {
110 unsigned int id;
111 unsigned long reg_base;
112 enum pistachio_pll_type type;
113 struct pistachio_pll_rate_table *rates;
114 unsigned int nr_rates;
115 const char *name;
116 const char *parent;
119 #define PLL(_id, _name, _pname, _type, _reg, _rates) \
121 .id = _id, \
122 .reg_base = _reg, \
123 .type = _type, \
124 .rates = _rates, \
125 .nr_rates = ARRAY_SIZE(_rates), \
126 .name = _name, \
127 .parent = _pname, \
130 #define PLL_FIXED(_id, _name, _pname, _type, _reg) \
132 .id = _id, \
133 .reg_base = _reg, \
134 .type = _type, \
135 .rates = NULL, \
136 .nr_rates = 0, \
137 .name = _name, \
138 .parent = _pname, \
141 struct pistachio_clk_provider {
142 struct device_node *node;
143 void __iomem *base;
144 struct clk_onecell_data clk_data;
147 extern struct pistachio_clk_provider *
148 pistachio_clk_alloc_provider(struct device_node *node, unsigned int num_clks);
149 extern void pistachio_clk_register_provider(struct pistachio_clk_provider *p);
151 extern void pistachio_clk_register_gate(struct pistachio_clk_provider *p,
152 struct pistachio_gate *gate,
153 unsigned int num);
154 extern void pistachio_clk_register_mux(struct pistachio_clk_provider *p,
155 struct pistachio_mux *mux,
156 unsigned int num);
157 extern void pistachio_clk_register_div(struct pistachio_clk_provider *p,
158 struct pistachio_div *div,
159 unsigned int num);
160 extern void
161 pistachio_clk_register_fixed_factor(struct pistachio_clk_provider *p,
162 struct pistachio_fixed_factor *ff,
163 unsigned int num);
164 extern void pistachio_clk_register_pll(struct pistachio_clk_provider *p,
165 struct pistachio_pll *pll,
166 unsigned int num);
168 extern void pistachio_clk_force_enable(struct pistachio_clk_provider *p,
169 unsigned int *clk_ids, unsigned int num);
171 #endif