drivers/clk/ux500/clk.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Clocks for ux500 platforms
   4  *
   5  * Copyright (C) 2012 ST-Ericsson SA
   6  * Author: Ulf Hansson <ulf.hansson@linaro.org>
   7  */
   8
   9 #ifndef __UX500_CLK_H
  10 #define __UX500_CLK_H
  11
  12 #include <linux/device.h>
  13 #include <linux/types.h>
  14
  15 struct clk;
  16 struct clk_hw;
  17
  18 struct clk *clk_reg_prcc_pclk(const char *name,
  19                               const char *parent_name,
  20                               resource_size_t phy_base,
  21                               u32 cg_sel,
  22                               unsigned long flags);
  23
  24 struct clk *clk_reg_prcc_kclk(const char *name,
  25                               const char *parent_name,
  26                               resource_size_t phy_base,
  27                               u32 cg_sel,
  28                               unsigned long flags);
  29
  30 struct clk_hw *clk_reg_prcmu_scalable(const char *name,
  31                                       const char *parent_name,
  32                                       u8 cg_sel,
  33                                       unsigned long rate,
  34                                       unsigned long flags);
  35
  36 struct clk_hw *clk_reg_prcmu_gate(const char *name,
  37                                   const char *parent_name,
  38                                   u8 cg_sel,
  39                                   unsigned long flags);
  40
  41 struct clk_hw *clk_reg_prcmu_scalable_rate(const char *name,
  42                                            const char *parent_name,
  43                                            u8 cg_sel,
  44                                            unsigned long rate,
  45                                            unsigned long flags);
  46
  47 struct clk_hw *clk_reg_prcmu_rate(const char *name,
  48                                   const char *parent_name,
  49                                   u8 cg_sel,
  50                                   unsigned long flags);
  51
  52 struct clk_hw *clk_reg_prcmu_opp_gate(const char *name,
  53                                       const char *parent_name,
  54                                       u8 cg_sel,
  55                                       unsigned long flags);
  56
  57 struct clk_hw *clk_reg_prcmu_opp_volt_scalable(const char *name,
  58                                                const char *parent_name,
  59                                                u8 cg_sel,
  60                                                unsigned long rate,
  61                                                unsigned long flags);
  62
  63 struct clk_hw *clk_reg_prcmu_clkout(const char *name,
  64                                     const char * const *parent_names,
  65                                     int num_parents,
  66                                     u8 source, u8 divider);
  67
  68 struct clk *clk_reg_sysctrl_gate(struct device *dev,
  69                                  const char *name,
  70                                  const char *parent_name,
  71                                  u16 reg_sel,
  72                                  u8 reg_mask,
  73                                  u8 reg_bits,
  74                                  unsigned long enable_delay_us,
  75                                  unsigned long flags);
  76
  77 struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
  78                                             const char *name,
  79                                             const char *parent_name,
  80                                             u16 reg_sel,
  81                                             u8 reg_mask,
  82                                             u8 reg_bits,
  83                                             unsigned long rate,
  84                                             unsigned long enable_delay_us,
  85                                             unsigned long flags);
  86
  87 struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
  88                                        const char *name,
  89                                        const char **parent_names,
  90                                        u8 num_parents,
  91                                        u16 *reg_sel,
  92                                        u8 *reg_mask,
  93                                        u8 *reg_bits,
  94                                        unsigned long flags);
  95
  96 #endif /* __UX500_CLK_H */