1 // SPDX-License-Identifier: MIT
3 * clock framework for AMD FCH controller block
5 * Copyright 2018 Advanced Micro Devices, Inc.
9 #include <linux/clkdev.h>
10 #include <linux/clk-provider.h>
11 #include <linux/pci.h>
12 #include <linux/platform_data/clk-fch.h>
13 #include <linux/platform_device.h>
15 /* Clock Driving Strength 2 register */
16 #define CLKDRVSTR2 0x28
17 /* Clock Control 1 register */
18 #define MISCCLKCNTL1 0x40
19 /* Auxiliary clock1 enable bit */
21 /* 25Mhz auxiliary output clock freq bit */
22 #define OSCOUT1CLK25MHZ 16
30 #define CLK_48M_FIXED 0
31 #define CLK_GATE_FIXED 1
32 #define CLK_MAX_FIXED 2
34 /* List of supported CPU ids for clk mux with 25Mhz clk support */
35 #define AMD_CPU_ID_ST 0x1576
37 static const char * const clk_oscout1_parents
[] = { "clk48MHz", "clk25MHz" };
38 static struct clk_hw
*hws
[ST_MAX_CLKS
];
40 static const struct pci_device_id fch_pci_ids
[] = {
41 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, AMD_CPU_ID_ST
) },
45 static int fch_clk_probe(struct platform_device
*pdev
)
47 struct fch_clk_data
*fch_data
;
50 fch_data
= dev_get_platdata(&pdev
->dev
);
51 if (!fch_data
|| !fch_data
->base
)
54 rdev
= pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
56 dev_err(&pdev
->dev
, "FCH device not found\n");
60 if (pci_match_id(fch_pci_ids
, rdev
)) {
61 hws
[ST_CLK_48M
] = clk_hw_register_fixed_rate(NULL
, "clk48MHz",
63 hws
[ST_CLK_25M
] = clk_hw_register_fixed_rate(NULL
, "clk25MHz",
66 hws
[ST_CLK_MUX
] = clk_hw_register_mux(NULL
, "oscout1_mux",
67 clk_oscout1_parents
, ARRAY_SIZE(clk_oscout1_parents
),
68 0, fch_data
->base
+ CLKDRVSTR2
, OSCOUT1CLK25MHZ
, 3, 0,
71 clk_set_parent(hws
[ST_CLK_MUX
]->clk
, hws
[ST_CLK_48M
]->clk
);
73 hws
[ST_CLK_GATE
] = clk_hw_register_gate(NULL
, "oscout1",
74 "oscout1_mux", 0, fch_data
->base
+ MISCCLKCNTL1
,
75 OSCCLKENB
, CLK_GATE_SET_TO_DISABLE
, NULL
);
77 devm_clk_hw_register_clkdev(&pdev
->dev
, hws
[ST_CLK_GATE
],
78 fch_data
->name
, NULL
);
80 hws
[CLK_48M_FIXED
] = clk_hw_register_fixed_rate(NULL
, "clk48MHz",
83 hws
[CLK_GATE_FIXED
] = clk_hw_register_gate(NULL
, "oscout1",
84 "clk48MHz", 0, fch_data
->base
+ MISCCLKCNTL1
,
87 devm_clk_hw_register_clkdev(&pdev
->dev
, hws
[CLK_GATE_FIXED
],
88 fch_data
->name
, NULL
);
95 static void fch_clk_remove(struct platform_device
*pdev
)
100 rdev
= pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
104 clks
= pci_match_id(fch_pci_ids
, rdev
) ? CLK_MAX_FIXED
: ST_MAX_CLKS
;
106 for (i
= 0; i
< clks
; i
++)
107 clk_hw_unregister(hws
[i
]);
112 static struct platform_driver fch_clk_driver
= {
115 .suppress_bind_attrs
= true,
117 .probe
= fch_clk_probe
,
118 .remove
= fch_clk_remove
,
120 builtin_platform_driver(fch_clk_driver
);