1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner CPUFreq nvmem based driver
5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
6 * provide the OPP framework with required information.
8 * Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/arm-smccc.h>
14 #include <linux/cpu.h>
15 #include <linux/module.h>
16 #include <linux/nvmem-consumer.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm_opp.h>
20 #include <linux/slab.h>
22 #define NVMEM_MASK 0x7
25 #define SUN50I_A100_NVMEM_MASK 0xf
26 #define SUN50I_A100_NVMEM_SHIFT 12
28 static struct platform_device
*cpufreq_dt_pdev
, *sun50i_cpufreq_pdev
;
30 struct sunxi_cpufreq_data
{
31 u32 (*efuse_xlate
)(u32 speedbin
);
34 static u32
sun50i_h6_efuse_xlate(u32 speedbin
)
38 efuse_value
= (speedbin
>> NVMEM_SHIFT
) & NVMEM_MASK
;
41 * We treat unexpected efuse values as if the SoC was from
42 * the slowest bin. Expected efuse values are 1-3, slowest
45 if (efuse_value
>= 1 && efuse_value
<= 3)
46 return efuse_value
- 1;
51 static u32
sun50i_a100_efuse_xlate(u32 speedbin
)
55 efuse_value
= (speedbin
>> SUN50I_A100_NVMEM_SHIFT
) &
56 SUN50I_A100_NVMEM_MASK
;
58 switch (efuse_value
) {
68 static int get_soc_id_revision(void)
70 #ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY
71 return arm_smccc_get_soc_id_revision();
73 return SMCCC_RET_NOT_SUPPORTED
;
78 * Judging by the OPP tables in the vendor BSP, the quality order of the
79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
80 * 0 and 2 seem identical from the OPP tables' point of view.
82 static u32
sun50i_h616_efuse_xlate(u32 speedbin
)
84 int ver_bits
= get_soc_id_revision();
87 switch (speedbin
& 0xffff) {
95 if (ver_bits
!= SMCCC_RET_NOT_SUPPORTED
&& ver_bits
<= 1) {
99 /* ic version C and later version */
118 pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",
127 static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data
= {
128 .efuse_xlate
= sun50i_h6_efuse_xlate
,
131 static struct sunxi_cpufreq_data sun50i_a100_cpufreq_data
= {
132 .efuse_xlate
= sun50i_a100_efuse_xlate
,
135 static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data
= {
136 .efuse_xlate
= sun50i_h616_efuse_xlate
,
139 static const struct of_device_id cpu_opp_match_list
[] = {
140 { .compatible
= "allwinner,sun50i-h6-operating-points",
141 .data
= &sun50i_h6_cpufreq_data
,
143 { .compatible
= "allwinner,sun50i-a100-operating-points",
144 .data
= &sun50i_a100_cpufreq_data
,
146 { .compatible
= "allwinner,sun50i-h616-operating-points",
147 .data
= &sun50i_h616_cpufreq_data
,
153 * dt_has_supported_hw() - Check if any OPPs use opp-supported-hw
155 * If we ask the cpufreq framework to use the opp-supported-hw feature, it
156 * will ignore every OPP node without that DT property. If none of the OPPs
157 * have it, the driver will fail probing, due to the lack of OPPs.
159 * Returns true if we have at least one OPP with the opp-supported-hw property.
161 static bool dt_has_supported_hw(void)
163 bool has_opp_supported_hw
= false;
164 struct device
*cpu_dev
;
166 cpu_dev
= get_cpu_device(0);
170 struct device_node
*np
__free(device_node
) =
171 dev_pm_opp_of_get_opp_desc_node(cpu_dev
);
175 for_each_child_of_node_scoped(np
, opp
) {
176 if (of_property_present(opp
, "opp-supported-hw")) {
177 has_opp_supported_hw
= true;
182 return has_opp_supported_hw
;
186 * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
188 * Returns non-negative speed bin index on success, a negative error
191 static int sun50i_cpufreq_get_efuse(void)
193 const struct sunxi_cpufreq_data
*opp_data
;
194 struct nvmem_cell
*speedbin_nvmem
;
195 const struct of_device_id
*match
;
196 struct device
*cpu_dev
;
200 cpu_dev
= get_cpu_device(0);
204 struct device_node
*np
__free(device_node
) =
205 dev_pm_opp_of_get_opp_desc_node(cpu_dev
);
209 match
= of_match_node(cpu_opp_match_list
, np
);
213 opp_data
= match
->data
;
215 speedbin_nvmem
= of_nvmem_cell_get(np
, NULL
);
216 if (IS_ERR(speedbin_nvmem
))
217 return dev_err_probe(cpu_dev
, PTR_ERR(speedbin_nvmem
),
218 "Could not get nvmem cell\n");
220 speedbin
= nvmem_cell_read(speedbin_nvmem
, NULL
);
221 nvmem_cell_put(speedbin_nvmem
);
222 if (IS_ERR(speedbin
))
223 return PTR_ERR(speedbin
);
225 ret
= opp_data
->efuse_xlate(*speedbin
);
232 static int sun50i_cpufreq_nvmem_probe(struct platform_device
*pdev
)
235 char name
[] = "speedXXXXXXXXXXX"; /* Integers can take 11 chars max */
236 unsigned int cpu
, supported_hw
;
237 struct dev_pm_opp_config config
= {};
241 opp_tokens
= kcalloc(num_possible_cpus(), sizeof(*opp_tokens
),
246 speed
= sun50i_cpufreq_get_efuse();
253 * We need at least one OPP with the "opp-supported-hw" property,
254 * or else the upper layers will ignore every OPP and will bail out.
256 if (dt_has_supported_hw()) {
257 supported_hw
= 1U << speed
;
258 config
.supported_hw
= &supported_hw
;
259 config
.supported_hw_count
= 1;
262 snprintf(name
, sizeof(name
), "speed%d", speed
);
263 config
.prop_name
= name
;
265 for_each_possible_cpu(cpu
) {
266 struct device
*cpu_dev
= get_cpu_device(cpu
);
273 ret
= dev_pm_opp_set_config(cpu_dev
, &config
);
277 opp_tokens
[cpu
] = ret
;
280 cpufreq_dt_pdev
= platform_device_register_simple("cpufreq-dt", -1,
282 if (!IS_ERR(cpufreq_dt_pdev
)) {
283 platform_set_drvdata(pdev
, opp_tokens
);
287 ret
= PTR_ERR(cpufreq_dt_pdev
);
288 pr_err("Failed to register platform device\n");
291 for_each_possible_cpu(cpu
)
292 dev_pm_opp_clear_config(opp_tokens
[cpu
]);
298 static void sun50i_cpufreq_nvmem_remove(struct platform_device
*pdev
)
300 int *opp_tokens
= platform_get_drvdata(pdev
);
303 platform_device_unregister(cpufreq_dt_pdev
);
305 for_each_possible_cpu(cpu
)
306 dev_pm_opp_clear_config(opp_tokens
[cpu
]);
311 static struct platform_driver sun50i_cpufreq_driver
= {
312 .probe
= sun50i_cpufreq_nvmem_probe
,
313 .remove
= sun50i_cpufreq_nvmem_remove
,
315 .name
= "sun50i-cpufreq-nvmem",
319 static const struct of_device_id sun50i_cpufreq_match_list
[] = {
320 { .compatible
= "allwinner,sun50i-h6" },
321 { .compatible
= "allwinner,sun50i-a100" },
322 { .compatible
= "allwinner,sun50i-h616" },
323 { .compatible
= "allwinner,sun50i-h618" },
324 { .compatible
= "allwinner,sun50i-h700" },
327 MODULE_DEVICE_TABLE(of
, sun50i_cpufreq_match_list
);
329 static const struct of_device_id
*sun50i_cpufreq_match_node(void)
331 struct device_node
*np
__free(device_node
) = of_find_node_by_path("/");
333 return of_match_node(sun50i_cpufreq_match_list
, np
);
337 * Since the driver depends on nvmem drivers, which may return EPROBE_DEFER,
338 * all the real activity is done in the probe, which may be defered as well.
339 * The init here is only registering the driver and the platform device.
341 static int __init
sun50i_cpufreq_init(void)
343 const struct of_device_id
*match
;
346 match
= sun50i_cpufreq_match_node();
350 ret
= platform_driver_register(&sun50i_cpufreq_driver
);
351 if (unlikely(ret
< 0))
354 sun50i_cpufreq_pdev
=
355 platform_device_register_simple("sun50i-cpufreq-nvmem",
357 ret
= PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev
);
361 platform_driver_unregister(&sun50i_cpufreq_driver
);
364 module_init(sun50i_cpufreq_init
);
366 static void __exit
sun50i_cpufreq_exit(void)
368 platform_device_unregister(sun50i_cpufreq_pdev
);
369 platform_driver_unregister(&sun50i_cpufreq_driver
);
371 module_exit(sun50i_cpufreq_exit
);
373 MODULE_DESCRIPTION("Sun50i-h6 cpufreq driver");
374 MODULE_LICENSE("GPL v2");