1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
7 #include <linux/completion.h>
8 #include <linux/crc-itu-t.h>
9 #include <linux/device.h>
10 #include <linux/errno.h>
11 #include <linux/firewire.h>
12 #include <linux/firewire-constants.h>
13 #include <linux/jiffies.h>
14 #include <linux/kernel.h>
15 #include <linux/kref.h>
16 #include <linux/list.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/spinlock.h>
20 #include <linux/workqueue.h>
22 #include <linux/atomic.h>
23 #include <asm/byteorder.h>
26 #include <trace/events/firewire.h>
28 #define define_fw_printk_level(func, kern_level) \
29 void func(const struct fw_card *card, const char *fmt, ...) \
31 struct va_format vaf; \
34 va_start(args, fmt); \
37 printk(kern_level KBUILD_MODNAME " %s: %pV", \
38 dev_name(card->device), &vaf); \
41 define_fw_printk_level(fw_err
, KERN_ERR
);
42 define_fw_printk_level(fw_notice
, KERN_NOTICE
);
44 int fw_compute_block_crc(__be32
*block
)
49 length
= (be32_to_cpu(block
[0]) >> 16) & 0xff;
50 crc
= crc_itu_t(0, (u8
*)&block
[1], length
* 4);
51 *block
|= cpu_to_be32(crc
);
56 static DEFINE_MUTEX(card_mutex
);
57 static LIST_HEAD(card_list
);
59 static LIST_HEAD(descriptor_list
);
60 static int descriptor_count
;
62 static __be32 tmp_config_rom
[256];
63 /* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
64 static size_t config_rom_length
= 1 + 4 + 1 + 1;
66 #define BIB_CRC(v) ((v) << 0)
67 #define BIB_CRC_LENGTH(v) ((v) << 16)
68 #define BIB_INFO_LENGTH(v) ((v) << 24)
69 #define BIB_BUS_NAME 0x31333934 /* "1394" */
70 #define BIB_LINK_SPEED(v) ((v) << 0)
71 #define BIB_GENERATION(v) ((v) << 4)
72 #define BIB_MAX_ROM(v) ((v) << 8)
73 #define BIB_MAX_RECEIVE(v) ((v) << 12)
74 #define BIB_CYC_CLK_ACC(v) ((v) << 16)
75 #define BIB_PMC ((1) << 27)
76 #define BIB_BMC ((1) << 28)
77 #define BIB_ISC ((1) << 29)
78 #define BIB_CMC ((1) << 30)
79 #define BIB_IRMC ((1) << 31)
80 #define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */
83 * IEEE-1394 specifies a default SPLIT_TIMEOUT value of 800 cycles (100 ms),
84 * but we have to make it longer because there are many devices whose firmware
85 * is just too slow for that.
87 #define DEFAULT_SPLIT_TIMEOUT (2 * 8000)
89 #define CANON_OUI 0x000085
91 static void generate_config_rom(struct fw_card
*card
, __be32
*config_rom
)
93 struct fw_descriptor
*desc
;
97 * Initialize contents of config rom buffer. On the OHCI
98 * controller, block reads to the config rom accesses the host
99 * memory, but quadlet read access the hardware bus info block
100 * registers. That's just crack, but it means we should make
101 * sure the contents of bus info block in host memory matches
102 * the version stored in the OHCI registers.
105 config_rom
[0] = cpu_to_be32(
106 BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0));
107 config_rom
[1] = cpu_to_be32(BIB_BUS_NAME
);
108 config_rom
[2] = cpu_to_be32(
109 BIB_LINK_SPEED(card
->link_speed
) |
110 BIB_GENERATION(card
->config_rom_generation
++ % 14 + 2) |
112 BIB_MAX_RECEIVE(card
->max_receive
) |
113 BIB_BMC
| BIB_ISC
| BIB_CMC
| BIB_IRMC
);
114 config_rom
[3] = cpu_to_be32(card
->guid
>> 32);
115 config_rom
[4] = cpu_to_be32(card
->guid
);
117 /* Generate root directory. */
118 config_rom
[6] = cpu_to_be32(NODE_CAPABILITIES
);
120 j
= 7 + descriptor_count
;
122 /* Generate root directory entries for descriptors. */
123 list_for_each_entry (desc
, &descriptor_list
, link
) {
124 if (desc
->immediate
> 0)
125 config_rom
[i
++] = cpu_to_be32(desc
->immediate
);
126 config_rom
[i
] = cpu_to_be32(desc
->key
| (j
- i
));
131 /* Update root directory length. */
132 config_rom
[5] = cpu_to_be32((i
- 5 - 1) << 16);
134 /* End of root directory, now copy in descriptors. */
135 list_for_each_entry (desc
, &descriptor_list
, link
) {
136 for (k
= 0; k
< desc
->length
; k
++)
137 config_rom
[i
+ k
] = cpu_to_be32(desc
->data
[k
]);
141 /* Calculate CRCs for all blocks in the config rom. This
142 * assumes that CRC length and info length are identical for
143 * the bus info block, which is always the case for this
145 for (i
= 0; i
< j
; i
+= length
+ 1)
146 length
= fw_compute_block_crc(config_rom
+ i
);
148 WARN_ON(j
!= config_rom_length
);
151 static void update_config_roms(void)
153 struct fw_card
*card
;
155 list_for_each_entry (card
, &card_list
, link
) {
156 generate_config_rom(card
, tmp_config_rom
);
157 card
->driver
->set_config_rom(card
, tmp_config_rom
,
162 static size_t required_space(struct fw_descriptor
*desc
)
164 /* descriptor + entry into root dir + optional immediate entry */
165 return desc
->length
+ 1 + (desc
->immediate
> 0 ? 1 : 0);
168 int fw_core_add_descriptor(struct fw_descriptor
*desc
)
173 * Check descriptor is valid; the length of all blocks in the
174 * descriptor has to add up to exactly the length of the
178 while (i
< desc
->length
)
179 i
+= (desc
->data
[i
] >> 16) + 1;
181 if (i
!= desc
->length
)
184 guard(mutex
)(&card_mutex
);
186 if (config_rom_length
+ required_space(desc
) > 256)
189 list_add_tail(&desc
->link
, &descriptor_list
);
190 config_rom_length
+= required_space(desc
);
192 if (desc
->immediate
> 0)
194 update_config_roms();
198 EXPORT_SYMBOL(fw_core_add_descriptor
);
200 void fw_core_remove_descriptor(struct fw_descriptor
*desc
)
202 guard(mutex
)(&card_mutex
);
204 list_del(&desc
->link
);
205 config_rom_length
-= required_space(desc
);
207 if (desc
->immediate
> 0)
209 update_config_roms();
211 EXPORT_SYMBOL(fw_core_remove_descriptor
);
213 static int reset_bus(struct fw_card
*card
, bool short_reset
)
215 int reg
= short_reset
? 5 : 1;
216 int bit
= short_reset
? PHY_BUS_SHORT_RESET
: PHY_BUS_RESET
;
218 trace_bus_reset_initiate(card
->index
, card
->generation
, short_reset
);
220 return card
->driver
->update_phy_reg(card
, reg
, 0, bit
);
223 void fw_schedule_bus_reset(struct fw_card
*card
, bool delayed
, bool short_reset
)
225 trace_bus_reset_schedule(card
->index
, card
->generation
, short_reset
);
227 /* We don't try hard to sort out requests of long vs. short resets. */
228 card
->br_short
= short_reset
;
230 /* Use an arbitrary short delay to combine multiple reset requests. */
232 if (!queue_delayed_work(fw_workqueue
, &card
->br_work
,
233 delayed
? DIV_ROUND_UP(HZ
, 100) : 0))
236 EXPORT_SYMBOL(fw_schedule_bus_reset
);
238 static void br_work(struct work_struct
*work
)
240 struct fw_card
*card
= container_of(work
, struct fw_card
, br_work
.work
);
242 /* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */
243 if (card
->reset_jiffies
!= 0 &&
244 time_before64(get_jiffies_64(), card
->reset_jiffies
+ 2 * HZ
)) {
245 trace_bus_reset_postpone(card
->index
, card
->generation
, card
->br_short
);
247 if (!queue_delayed_work(fw_workqueue
, &card
->br_work
, 2 * HZ
))
252 fw_send_phy_config(card
, FW_PHY_CONFIG_NO_NODE_ID
, card
->generation
,
253 FW_PHY_CONFIG_CURRENT_GAP_COUNT
);
254 reset_bus(card
, card
->br_short
);
258 static void allocate_broadcast_channel(struct fw_card
*card
, int generation
)
260 int channel
, bandwidth
= 0;
262 if (!card
->broadcast_channel_allocated
) {
263 fw_iso_resource_manage(card
, generation
, 1ULL << 31,
264 &channel
, &bandwidth
, true);
266 fw_notice(card
, "failed to allocate broadcast channel\n");
269 card
->broadcast_channel_allocated
= true;
272 device_for_each_child(card
->device
, (void *)(long)generation
,
273 fw_device_set_broadcast_channel
);
276 static const char gap_count_table
[] = {
277 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
280 void fw_schedule_bm_work(struct fw_card
*card
, unsigned long delay
)
283 if (!schedule_delayed_work(&card
->bm_work
, delay
))
287 static void bm_work(struct work_struct
*work
)
289 struct fw_card
*card
= container_of(work
, struct fw_card
, bm_work
.work
);
290 struct fw_device
*root_device
, *irm_device
;
291 struct fw_node
*root_node
;
292 int root_id
, new_root_id
, irm_id
, bm_id
, local_id
;
293 int gap_count
, generation
, grace
, rcode
;
294 bool do_reset
= false;
295 bool root_device_is_running
;
296 bool root_device_is_cmc
;
297 bool irm_is_1394_1995_only
;
299 __be32 transaction_data
[2];
301 spin_lock_irq(&card
->lock
);
303 if (card
->local_node
== NULL
) {
304 spin_unlock_irq(&card
->lock
);
308 generation
= card
->generation
;
310 root_node
= card
->root_node
;
311 fw_node_get(root_node
);
312 root_device
= root_node
->data
;
313 root_device_is_running
= root_device
&&
314 atomic_read(&root_device
->state
) == FW_DEVICE_RUNNING
;
315 root_device_is_cmc
= root_device
&& root_device
->cmc
;
317 irm_device
= card
->irm_node
->data
;
318 irm_is_1394_1995_only
= irm_device
&& irm_device
->config_rom
&&
319 (irm_device
->config_rom
[2] & 0x000000f0) == 0;
321 /* Canon MV5i works unreliably if it is not root node. */
322 keep_this_irm
= irm_device
&& irm_device
->config_rom
&&
323 irm_device
->config_rom
[3] >> 8 == CANON_OUI
;
325 root_id
= root_node
->node_id
;
326 irm_id
= card
->irm_node
->node_id
;
327 local_id
= card
->local_node
->node_id
;
329 grace
= time_after64(get_jiffies_64(),
330 card
->reset_jiffies
+ DIV_ROUND_UP(HZ
, 8));
332 if ((is_next_generation(generation
, card
->bm_generation
) &&
333 !card
->bm_abdicate
) ||
334 (card
->bm_generation
!= generation
&& grace
)) {
336 * This first step is to figure out who is IRM and
337 * then try to become bus manager. If the IRM is not
338 * well defined (e.g. does not have an active link
339 * layer or does not responds to our lock request, we
340 * will have to do a little vigilante bus management.
341 * In that case, we do a goto into the gap count logic
342 * so that when we do the reset, we still optimize the
343 * gap count. That could well save a reset in the
347 if (!card
->irm_node
->link_on
) {
348 new_root_id
= local_id
;
349 fw_notice(card
, "%s, making local node (%02x) root\n",
350 "IRM has link off", new_root_id
);
354 if (irm_is_1394_1995_only
&& !keep_this_irm
) {
355 new_root_id
= local_id
;
356 fw_notice(card
, "%s, making local node (%02x) root\n",
357 "IRM is not 1394a compliant", new_root_id
);
361 transaction_data
[0] = cpu_to_be32(0x3f);
362 transaction_data
[1] = cpu_to_be32(local_id
);
364 spin_unlock_irq(&card
->lock
);
366 rcode
= fw_run_transaction(card
, TCODE_LOCK_COMPARE_SWAP
,
367 irm_id
, generation
, SCODE_100
,
368 CSR_REGISTER_BASE
+ CSR_BUS_MANAGER_ID
,
369 transaction_data
, 8);
371 if (rcode
== RCODE_GENERATION
)
372 /* Another bus reset, BM work has been rescheduled. */
375 bm_id
= be32_to_cpu(transaction_data
[0]);
377 scoped_guard(spinlock_irq
, &card
->lock
) {
378 if (rcode
== RCODE_COMPLETE
&& generation
== card
->generation
)
380 bm_id
== 0x3f ? local_id
: 0xffc0 | bm_id
;
383 if (rcode
== RCODE_COMPLETE
&& bm_id
!= 0x3f) {
384 /* Somebody else is BM. Only act as IRM. */
385 if (local_id
== irm_id
)
386 allocate_broadcast_channel(card
, generation
);
391 if (rcode
== RCODE_SEND_ERROR
) {
393 * We have been unable to send the lock request due to
394 * some local problem. Let's try again later and hope
395 * that the problem has gone away by then.
397 fw_schedule_bm_work(card
, DIV_ROUND_UP(HZ
, 8));
401 spin_lock_irq(&card
->lock
);
403 if (rcode
!= RCODE_COMPLETE
&& !keep_this_irm
) {
405 * The lock request failed, maybe the IRM
406 * isn't really IRM capable after all. Let's
407 * do a bus reset and pick the local node as
408 * root, and thus, IRM.
410 new_root_id
= local_id
;
411 fw_notice(card
, "BM lock failed (%s), making local node (%02x) root\n",
412 fw_rcode_string(rcode
), new_root_id
);
415 } else if (card
->bm_generation
!= generation
) {
417 * We weren't BM in the last generation, and the last
418 * bus reset is less than 125ms ago. Reschedule this job.
420 spin_unlock_irq(&card
->lock
);
421 fw_schedule_bm_work(card
, DIV_ROUND_UP(HZ
, 8));
426 * We're bus manager for this generation, so next step is to
427 * make sure we have an active cycle master and do gap count
430 card
->bm_generation
= generation
;
432 if (card
->gap_count
== 0) {
434 * If self IDs have inconsistent gap counts, do a
435 * bus reset ASAP. The config rom read might never
436 * complete, so don't wait for it. However, still
437 * send a PHY configuration packet prior to the
438 * bus reset. The PHY configuration packet might
439 * fail, but 1394-2008 8.4.5.2 explicitly permits
440 * it in this case, so it should be safe to try.
442 new_root_id
= local_id
;
444 * We must always send a bus reset if the gap count
445 * is inconsistent, so bypass the 5-reset limit.
447 card
->bm_retries
= 0;
448 } else if (root_device
== NULL
) {
450 * Either link_on is false, or we failed to read the
451 * config rom. In either case, pick another root.
453 new_root_id
= local_id
;
454 } else if (!root_device_is_running
) {
456 * If we haven't probed this device yet, bail out now
457 * and let's try again once that's done.
459 spin_unlock_irq(&card
->lock
);
461 } else if (root_device_is_cmc
) {
463 * We will send out a force root packet for this
464 * node as part of the gap count optimization.
466 new_root_id
= root_id
;
469 * Current root has an active link layer and we
470 * successfully read the config rom, but it's not
471 * cycle master capable.
473 new_root_id
= local_id
;
478 * Pick a gap count from 1394a table E-1. The table doesn't cover
479 * the typically much larger 1394b beta repeater delays though.
481 if (!card
->beta_repeaters_present
&&
482 root_node
->max_hops
< ARRAY_SIZE(gap_count_table
))
483 gap_count
= gap_count_table
[root_node
->max_hops
];
488 * Finally, figure out if we should do a reset or not. If we have
489 * done less than 5 resets with the same physical topology and we
490 * have either a new root or a new gap count setting, let's do it.
493 if (card
->bm_retries
++ < 5 &&
494 (card
->gap_count
!= gap_count
|| new_root_id
!= root_id
))
497 spin_unlock_irq(&card
->lock
);
500 fw_notice(card
, "phy config: new root=%x, gap_count=%d\n",
501 new_root_id
, gap_count
);
502 fw_send_phy_config(card
, new_root_id
, generation
, gap_count
);
504 * Where possible, use a short bus reset to minimize
505 * disruption to isochronous transfers. But in the event
506 * of a gap count inconsistency, use a long bus reset.
508 * As noted in 1394a 8.4.6.2, nodes on a mixed 1394/1394a bus
509 * may set different gap counts after a bus reset. On a mixed
510 * 1394/1394a bus, a short bus reset can get doubled. Some
511 * nodes may treat the double reset as one bus reset and others
512 * may treat it as two, causing a gap count inconsistency
513 * again. Using a long bus reset prevents this.
515 reset_bus(card
, card
->gap_count
!= 0);
516 /* Will allocate broadcast channel after the reset. */
520 if (root_device_is_cmc
) {
522 * Make sure that the cycle master sends cycle start packets.
524 transaction_data
[0] = cpu_to_be32(CSR_STATE_BIT_CMSTR
);
525 rcode
= fw_run_transaction(card
, TCODE_WRITE_QUADLET_REQUEST
,
526 root_id
, generation
, SCODE_100
,
527 CSR_REGISTER_BASE
+ CSR_STATE_SET
,
528 transaction_data
, 4);
529 if (rcode
== RCODE_GENERATION
)
533 if (local_id
== irm_id
)
534 allocate_broadcast_channel(card
, generation
);
537 fw_node_put(root_node
);
542 void fw_card_initialize(struct fw_card
*card
,
543 const struct fw_card_driver
*driver
,
544 struct device
*device
)
546 static atomic_t index
= ATOMIC_INIT(-1);
548 card
->index
= atomic_inc_return(&index
);
549 card
->driver
= driver
;
550 card
->device
= device
;
551 card
->current_tlabel
= 0;
552 card
->tlabel_mask
= 0;
553 card
->split_timeout_hi
= DEFAULT_SPLIT_TIMEOUT
/ 8000;
554 card
->split_timeout_lo
= (DEFAULT_SPLIT_TIMEOUT
% 8000) << 19;
555 card
->split_timeout_cycles
= DEFAULT_SPLIT_TIMEOUT
;
556 card
->split_timeout_jiffies
=
557 DIV_ROUND_UP(DEFAULT_SPLIT_TIMEOUT
* HZ
, 8000);
559 card
->broadcast_channel
= BROADCAST_CHANNEL_INITIAL
;
561 kref_init(&card
->kref
);
562 init_completion(&card
->done
);
563 INIT_LIST_HEAD(&card
->transaction_list
);
564 INIT_LIST_HEAD(&card
->phy_receiver_list
);
565 spin_lock_init(&card
->lock
);
567 card
->local_node
= NULL
;
569 INIT_DELAYED_WORK(&card
->br_work
, br_work
);
570 INIT_DELAYED_WORK(&card
->bm_work
, bm_work
);
572 EXPORT_SYMBOL(fw_card_initialize
);
574 int fw_card_add(struct fw_card
*card
, u32 max_receive
, u32 link_speed
, u64 guid
,
575 unsigned int supported_isoc_contexts
)
577 struct workqueue_struct
*isoc_wq
;
580 // This workqueue should be:
581 // * != WQ_BH Sleepable.
582 // * == WQ_UNBOUND Any core can process data for isoc context. The
583 // implementation of unit protocol could consumes the core
585 // * != WQ_MEM_RECLAIM Not used for any backend of block device.
586 // * == WQ_FREEZABLE Isochronous communication is at regular interval in real
587 // time, thus should be drained if possible at freeze phase.
588 // * == WQ_HIGHPRI High priority to process semi-realtime timestamped data.
589 // * == WQ_SYSFS Parameters are available via sysfs.
590 // * max_active == n_it + n_ir A hardIRQ could notify events for multiple isochronous
591 // contexts if they are scheduled to the same cycle.
592 isoc_wq
= alloc_workqueue("firewire-isoc-card%u",
593 WQ_UNBOUND
| WQ_FREEZABLE
| WQ_HIGHPRI
| WQ_SYSFS
,
594 supported_isoc_contexts
, card
->index
);
598 card
->max_receive
= max_receive
;
599 card
->link_speed
= link_speed
;
602 guard(mutex
)(&card_mutex
);
604 generate_config_rom(card
, tmp_config_rom
);
605 ret
= card
->driver
->enable(card
, tmp_config_rom
, config_rom_length
);
607 destroy_workqueue(isoc_wq
);
611 card
->isoc_wq
= isoc_wq
;
612 list_add_tail(&card
->link
, &card_list
);
616 EXPORT_SYMBOL(fw_card_add
);
619 * The next few functions implement a dummy driver that is used once a card
620 * driver shuts down an fw_card. This allows the driver to cleanly unload,
621 * as all IO to the card will be handled (and failed) by the dummy driver
622 * instead of calling into the module. Only functions for iso context
623 * shutdown still need to be provided by the card driver.
625 * .read/write_csr() should never be called anymore after the dummy driver
626 * was bound since they are only used within request handler context.
627 * .set_config_rom() is never called since the card is taken out of card_list
628 * before switching to the dummy driver.
631 static int dummy_read_phy_reg(struct fw_card
*card
, int address
)
636 static int dummy_update_phy_reg(struct fw_card
*card
, int address
,
637 int clear_bits
, int set_bits
)
642 static void dummy_send_request(struct fw_card
*card
, struct fw_packet
*packet
)
644 packet
->callback(packet
, card
, RCODE_CANCELLED
);
647 static void dummy_send_response(struct fw_card
*card
, struct fw_packet
*packet
)
649 packet
->callback(packet
, card
, RCODE_CANCELLED
);
652 static int dummy_cancel_packet(struct fw_card
*card
, struct fw_packet
*packet
)
657 static int dummy_enable_phys_dma(struct fw_card
*card
,
658 int node_id
, int generation
)
663 static struct fw_iso_context
*dummy_allocate_iso_context(struct fw_card
*card
,
664 int type
, int channel
, size_t header_size
)
666 return ERR_PTR(-ENODEV
);
669 static u32
dummy_read_csr(struct fw_card
*card
, int csr_offset
)
674 static void dummy_write_csr(struct fw_card
*card
, int csr_offset
, u32 value
)
678 static int dummy_start_iso(struct fw_iso_context
*ctx
,
679 s32 cycle
, u32 sync
, u32 tags
)
684 static int dummy_set_iso_channels(struct fw_iso_context
*ctx
, u64
*channels
)
689 static int dummy_queue_iso(struct fw_iso_context
*ctx
, struct fw_iso_packet
*p
,
690 struct fw_iso_buffer
*buffer
, unsigned long payload
)
695 static void dummy_flush_queue_iso(struct fw_iso_context
*ctx
)
699 static int dummy_flush_iso_completions(struct fw_iso_context
*ctx
)
704 static const struct fw_card_driver dummy_driver_template
= {
705 .read_phy_reg
= dummy_read_phy_reg
,
706 .update_phy_reg
= dummy_update_phy_reg
,
707 .send_request
= dummy_send_request
,
708 .send_response
= dummy_send_response
,
709 .cancel_packet
= dummy_cancel_packet
,
710 .enable_phys_dma
= dummy_enable_phys_dma
,
711 .read_csr
= dummy_read_csr
,
712 .write_csr
= dummy_write_csr
,
713 .allocate_iso_context
= dummy_allocate_iso_context
,
714 .start_iso
= dummy_start_iso
,
715 .set_iso_channels
= dummy_set_iso_channels
,
716 .queue_iso
= dummy_queue_iso
,
717 .flush_queue_iso
= dummy_flush_queue_iso
,
718 .flush_iso_completions
= dummy_flush_iso_completions
,
721 void fw_card_release(struct kref
*kref
)
723 struct fw_card
*card
= container_of(kref
, struct fw_card
, kref
);
725 complete(&card
->done
);
727 EXPORT_SYMBOL_GPL(fw_card_release
);
729 void fw_core_remove_card(struct fw_card
*card
)
731 struct fw_card_driver dummy_driver
= dummy_driver_template
;
735 card
->driver
->update_phy_reg(card
, 4,
736 PHY_LINK_ACTIVE
| PHY_CONTENDER
, 0);
737 fw_schedule_bus_reset(card
, false, true);
739 scoped_guard(mutex
, &card_mutex
)
740 list_del_init(&card
->link
);
742 /* Switch off most of the card driver interface. */
743 dummy_driver
.free_iso_context
= card
->driver
->free_iso_context
;
744 dummy_driver
.stop_iso
= card
->driver
->stop_iso
;
745 card
->driver
= &dummy_driver
;
746 drain_workqueue(card
->isoc_wq
);
748 scoped_guard(spinlock_irqsave
, &card
->lock
)
749 fw_destroy_nodes(card
);
751 /* Wait for all users, especially device workqueue jobs, to finish. */
753 wait_for_completion(&card
->done
);
755 destroy_workqueue(card
->isoc_wq
);
757 WARN_ON(!list_empty(&card
->transaction_list
));
759 EXPORT_SYMBOL(fw_core_remove_card
);
762 * fw_card_read_cycle_time: read from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region
763 * for controller card.
764 * @card: The instance of card for 1394 OHCI controller.
765 * @cycle_time: The mutual reference to value of cycle time for the read operation.
767 * Read value from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region for the given
768 * controller card. This function accesses the region without any lock primitives or IRQ mask.
769 * When returning successfully, the content of @value argument has value aligned to host endianness,
770 * formetted by CYCLE_TIME CSR Register of IEEE 1394 std.
772 * Context: Any context.
774 * * 0 - Read successfully.
775 * * -ENODEV - The controller is unavailable due to being removed or unbound.
777 int fw_card_read_cycle_time(struct fw_card
*card
, u32
*cycle_time
)
779 if (card
->driver
->read_csr
== dummy_read_csr
)
782 // It's possible to switch to dummy driver between the above and the below. This is the best
783 // effort to return -ENODEV.
784 *cycle_time
= card
->driver
->read_csr(card
, CSR_CYCLE_TIME
);
787 EXPORT_SYMBOL_GPL(fw_card_read_cycle_time
);