drivers/gpio/gpio-mpsse.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * FTDI MPSSE GPIO support
   4  *
   5  * Based on code by Anatolij Gustschin
   6  *
   7  * Copyright (C) 2024 Mary Strodl <mstrodl@csh.rit.edu>
   8  */
   9
  10 #include <linux/cleanup.h>
  11 #include <linux/gpio/driver.h>
  12 #include <linux/mutex.h>
  13 #include <linux/usb.h>
  14
  15 struct mpsse_priv {
  16         struct gpio_chip gpio;
  17         struct usb_device *udev;     /* USB device encompassing all MPSSEs */
  18         struct usb_interface *intf;  /* USB interface for this MPSSE */
  19         u8 intf_id;                  /* USB interface number for this MPSSE */
  20         struct work_struct irq_work; /* polling work thread */
  21         struct mutex irq_mutex;      /* lock over irq_data */
  22         atomic_t irq_type[16];       /* pin -> edge detection type */
  23         atomic_t irq_enabled;
  24         int id;
  25
  26         u8 gpio_outputs[2];          /* Output states for GPIOs [L, H] */
  27         u8 gpio_dir[2];              /* Directions for GPIOs [L, H] */
  28
  29         u8 *bulk_in_buf;             /* Extra recv buffer to grab status bytes */
  30
  31         struct usb_endpoint_descriptor *bulk_in;
  32         struct usb_endpoint_descriptor *bulk_out;
  33
  34         struct mutex io_mutex;      /* sync I/O with disconnect */
  35 };
  36
  37 struct bulk_desc {
  38         bool tx;                    /* direction of bulk transfer */
  39         u8 *data;                   /* input (tx) or output (rx) */
  40         int len;                    /* Length of `data` if tx, or length of */
  41                                     /* Data to read if rx */
  42         int len_actual;             /* Length successfully transferred */
  43         int timeout;
  44 };
  45
  46 static const struct usb_device_id gpio_mpsse_table[] = {
  47         { USB_DEVICE(0x0c52, 0xa064) },   /* SeaLevel Systems, Inc. */
  48         { }                               /* Terminating entry */
  49 };
  50
  51 MODULE_DEVICE_TABLE(usb, gpio_mpsse_table);
  52
  53 static DEFINE_IDA(gpio_mpsse_ida);
  54
  55 /* MPSSE commands */
  56 #define SET_BITS_CMD 0x80
  57 #define GET_BITS_CMD 0x81
  58
  59 #define SET_BITMODE_REQUEST 0x0B
  60 #define MODE_MPSSE (2 << 8)
  61 #define MODE_RESET 0
  62
  63 /* Arbitrarily decided. This could probably be much less */
  64 #define MPSSE_WRITE_TIMEOUT 5000
  65 #define MPSSE_READ_TIMEOUT 5000
  66
  67 /* 1 millisecond, also pretty arbitrary */
  68 #define MPSSE_POLL_INTERVAL 1000
  69
  70 static int mpsse_bulk_xfer(struct usb_interface *intf, struct bulk_desc *desc)
  71 {
  72         struct mpsse_priv *priv = usb_get_intfdata(intf);
  73         struct usb_device *udev = priv->udev;
  74         unsigned int pipe;
  75         int ret;
  76
  77         if (desc->tx)
  78                 pipe = usb_sndbulkpipe(udev, priv->bulk_out->bEndpointAddress);
  79         else
  80                 pipe = usb_rcvbulkpipe(udev, priv->bulk_in->bEndpointAddress);
  81
  82         ret = usb_bulk_msg(udev, pipe, desc->data, desc->len,
  83                            &desc->len_actual, desc->timeout);
  84         if (ret)
  85                 dev_dbg(&udev->dev, "mpsse: bulk transfer failed: %d\n", ret);
  86
  87         return ret;
  88 }
  89
  90 static int mpsse_write(struct usb_interface *intf,
  91                        u8 *buf, size_t len)
  92 {
  93         int ret;
  94         struct bulk_desc desc;
  95
  96         desc.len_actual = 0;
  97         desc.tx = true;
  98         desc.data = buf;
  99         desc.len = len;
 100         desc.timeout = MPSSE_WRITE_TIMEOUT;
 101
 102         ret = mpsse_bulk_xfer(intf, &desc);
 103
 104         return ret;
 105 }
 106
 107 static int mpsse_read(struct usb_interface *intf, u8 *buf, size_t len)
 108 {
 109         int ret;
 110         struct bulk_desc desc;
 111         struct mpsse_priv *priv = usb_get_intfdata(intf);
 112
 113         desc.len_actual = 0;
 114         desc.tx = false;
 115         desc.data = priv->bulk_in_buf;
 116         /* Device sends 2 additional status bytes, read len + 2 */
 117         desc.len = min_t(size_t, len + 2, usb_endpoint_maxp(priv->bulk_in));
 118         desc.timeout = MPSSE_READ_TIMEOUT;
 119
 120         ret = mpsse_bulk_xfer(intf, &desc);
 121         if (ret)
 122                 return ret;
 123
 124         /* Did we get enough data? */
 125         if (desc.len_actual < desc.len)
 126                 return -EIO;
 127
 128         memcpy(buf, desc.data + 2, desc.len_actual - 2);
 129
 130         return ret;
 131 }
 132
 133 static int gpio_mpsse_set_bank(struct mpsse_priv *priv, u8 bank)
 134 {
 135         int ret;
 136         u8 tx_buf[3] = {
 137                 SET_BITS_CMD | (bank << 1),
 138                 priv->gpio_outputs[bank],
 139                 priv->gpio_dir[bank],
 140         };
 141
 142         ret = mpsse_write(priv->intf, tx_buf, 3);
 143
 144         return ret;
 145 }
 146
 147 static int gpio_mpsse_get_bank(struct mpsse_priv *priv, u8 bank)
 148 {
 149         int ret;
 150         u8 buf = GET_BITS_CMD | (bank << 1);
 151
 152         ret = mpsse_write(priv->intf, &buf, 1);
 153         if (ret)
 154                 return ret;
 155
 156         ret = mpsse_read(priv->intf, &buf, 1);
 157         if (ret)
 158                 return ret;
 159
 160         return buf;
 161 }
 162
 163 static void gpio_mpsse_set_multiple(struct gpio_chip *chip, unsigned long *mask,
 164                                     unsigned long *bits)
 165 {
 166         unsigned long i, bank, bank_mask, bank_bits;
 167         int ret;
 168         struct mpsse_priv *priv = gpiochip_get_data(chip);
 169
 170         guard(mutex)(&priv->io_mutex);
 171         for_each_set_clump8(i, bank_mask, mask, chip->ngpio) {
 172                 bank = i / 8;
 173
 174                 if (bank_mask) {
 175                         bank_bits = bitmap_get_value8(bits, i);
 176                         /* Zero out pins we want to change */
 177                         priv->gpio_outputs[bank] &= ~bank_mask;
 178                         /* Set pins we care about */
 179                         priv->gpio_outputs[bank] |= bank_bits & bank_mask;
 180
 181                         ret = gpio_mpsse_set_bank(priv, bank);
 182                         if (ret)
 183                                 dev_err(&priv->intf->dev,
 184                                         "Couldn't set values for bank %ld!",
 185                                         bank);
 186                 }
 187         }
 188 }
 189
 190 static int gpio_mpsse_get_multiple(struct gpio_chip *chip, unsigned long *mask,
 191                                    unsigned long *bits)
 192 {
 193         unsigned long i, bank, bank_mask;
 194         int ret;
 195         struct mpsse_priv *priv = gpiochip_get_data(chip);
 196
 197         guard(mutex)(&priv->io_mutex);
 198         for_each_set_clump8(i, bank_mask, mask, chip->ngpio) {
 199                 bank = i / 8;
 200
 201                 if (bank_mask) {
 202                         ret = gpio_mpsse_get_bank(priv, bank);
 203                         if (ret < 0)
 204                                 return ret;
 205
 206                         bitmap_set_value8(bits, ret & bank_mask, i);
 207                 }
 208         }
 209
 210         return 0;
 211 }
 212
 213 static int gpio_mpsse_gpio_get(struct gpio_chip *chip, unsigned int offset)
 214 {
 215         int err;
 216         unsigned long mask = 0, bits = 0;
 217
 218         __set_bit(offset, &mask);
 219         err = gpio_mpsse_get_multiple(chip, &mask, &bits);
 220         if (err)
 221                 return err;
 222
 223         /* == is not guaranteed to give 1 if true */
 224         if (bits)
 225                 return 1;
 226         else
 227                 return 0;
 228 }
 229
 230 static void gpio_mpsse_gpio_set(struct gpio_chip *chip, unsigned int offset,
 231                                int value)
 232 {
 233         unsigned long mask = 0, bits = 0;
 234
 235         __set_bit(offset, &mask);
 236         if (value)
 237                 __set_bit(offset, &bits);
 238
 239         gpio_mpsse_set_multiple(chip, &mask, &bits);
 240 }
 241
 242 static int gpio_mpsse_direction_output(struct gpio_chip *chip,
 243                                        unsigned int offset, int value)
 244 {
 245         struct mpsse_priv *priv = gpiochip_get_data(chip);
 246         int bank = (offset & 8) >> 3;
 247         int bank_offset = offset & 7;
 248
 249         scoped_guard(mutex, &priv->io_mutex)
 250                 priv->gpio_dir[bank] |= BIT(bank_offset);
 251
 252         gpio_mpsse_gpio_set(chip, offset, value);
 253
 254         return 0;
 255 }
 256
 257 static int gpio_mpsse_direction_input(struct gpio_chip *chip,
 258                                       unsigned int offset)
 259 {
 260         struct mpsse_priv *priv = gpiochip_get_data(chip);
 261         int bank = (offset & 8) >> 3;
 262         int bank_offset = offset & 7;
 263
 264         guard(mutex)(&priv->io_mutex);
 265         priv->gpio_dir[bank] &= ~BIT(bank_offset);
 266         gpio_mpsse_set_bank(priv, bank);
 267
 268         return 0;
 269 }
 270
 271 static int gpio_mpsse_get_direction(struct gpio_chip *chip,
 272                                     unsigned int offset)
 273 {
 274         int ret;
 275         int bank = (offset & 8) >> 3;
 276         int bank_offset = offset & 7;
 277         struct mpsse_priv *priv = gpiochip_get_data(chip);
 278
 279         guard(mutex)(&priv->io_mutex);
 280         /* MPSSE directions are inverted */
 281         if (priv->gpio_dir[bank] & BIT(bank_offset))
 282                 ret = GPIO_LINE_DIRECTION_OUT;
 283         else
 284                 ret = GPIO_LINE_DIRECTION_IN;
 285
 286         return ret;
 287 }
 288
 289 static void gpio_mpsse_poll(struct work_struct *work)
 290 {
 291         unsigned long pin_mask, pin_states, flags;
 292         int irq_enabled, offset, err, value, fire_irq,
 293                 irq, old_value[16], irq_type[16];
 294         struct mpsse_priv *priv = container_of(work, struct mpsse_priv,
 295                                                irq_work);
 296
 297         for (offset = 0; offset < priv->gpio.ngpio; ++offset)
 298                 old_value[offset] = -1;
 299
 300         while ((irq_enabled = atomic_read(&priv->irq_enabled))) {
 301                 usleep_range(MPSSE_POLL_INTERVAL, MPSSE_POLL_INTERVAL + 1000);
 302                 /* Cleanup will trigger at the end of the loop */
 303                 guard(mutex)(&priv->irq_mutex);
 304
 305                 pin_mask = 0;
 306                 pin_states = 0;
 307                 for (offset = 0; offset < priv->gpio.ngpio; ++offset) {
 308                         irq_type[offset] = atomic_read(&priv->irq_type[offset]);
 309                         if (irq_type[offset] != IRQ_TYPE_NONE &&
 310                             irq_enabled & BIT(offset))
 311                                 pin_mask |= BIT(offset);
 312                         else
 313                                 old_value[offset] = -1;
 314                 }
 315
 316                 err = gpio_mpsse_get_multiple(&priv->gpio, &pin_mask,
 317                                               &pin_states);
 318                 if (err) {
 319                         dev_err_ratelimited(&priv->intf->dev,
 320                                             "Error polling!\n");
 321                         continue;
 322                 }
 323
 324                 /* Check each value */
 325                 for (offset = 0; offset < priv->gpio.ngpio; ++offset) {
 326                         if (old_value[offset] == -1)
 327                                 continue;
 328
 329                         fire_irq = 0;
 330                         value = pin_states & BIT(offset);
 331
 332                         switch (irq_type[offset]) {
 333                         case IRQ_TYPE_EDGE_RISING:
 334                                 fire_irq = value > old_value[offset];
 335                                 break;
 336                         case IRQ_TYPE_EDGE_FALLING:
 337                                 fire_irq = value < old_value[offset];
 338                                 break;
 339                         case IRQ_TYPE_EDGE_BOTH:
 340                                 fire_irq = value != old_value[offset];
 341                                 break;
 342                         }
 343                         if (!fire_irq)
 344                                 continue;
 345
 346                         irq = irq_find_mapping(priv->gpio.irq.domain,
 347                                                offset);
 348                         local_irq_save(flags);
 349                         generic_handle_irq(irq);
 350                         local_irq_disable();
 351                         local_irq_restore(flags);
 352                 }
 353
 354                 /* Sync back values so we can refer to them next tick */
 355                 for (offset = 0; offset < priv->gpio.ngpio; ++offset)
 356                         if (irq_type[offset] != IRQ_TYPE_NONE &&
 357                             irq_enabled & BIT(offset))
 358                                 old_value[offset] = pin_states & BIT(offset);
 359         }
 360 }
 361
 362 static int gpio_mpsse_set_irq_type(struct irq_data *irqd, unsigned int type)
 363 {
 364         int offset;
 365         struct mpsse_priv *priv = irq_data_get_irq_chip_data(irqd);
 366
 367         offset = irqd->hwirq;
 368         atomic_set(&priv->irq_type[offset], type & IRQ_TYPE_EDGE_BOTH);
 369
 370         return 0;
 371 }
 372
 373 static void gpio_mpsse_irq_disable(struct irq_data *irqd)
 374 {
 375         struct mpsse_priv *priv = irq_data_get_irq_chip_data(irqd);
 376
 377         atomic_and(~BIT(irqd->hwirq), &priv->irq_enabled);
 378         gpiochip_disable_irq(&priv->gpio, irqd->hwirq);
 379 }
 380
 381 static void gpio_mpsse_irq_enable(struct irq_data *irqd)
 382 {
 383         struct mpsse_priv *priv = irq_data_get_irq_chip_data(irqd);
 384
 385         gpiochip_enable_irq(&priv->gpio, irqd->hwirq);
 386         /* If no-one else was using the IRQ, enable it */
 387         if (!atomic_fetch_or(BIT(irqd->hwirq), &priv->irq_enabled)) {
 388                 INIT_WORK(&priv->irq_work, gpio_mpsse_poll);
 389                 schedule_work(&priv->irq_work);
 390         }
 391 }
 392
 393 static const struct irq_chip gpio_mpsse_irq_chip = {
 394         .name = "gpio-mpsse-irq",
 395         .irq_enable = gpio_mpsse_irq_enable,
 396         .irq_disable = gpio_mpsse_irq_disable,
 397         .irq_set_type = gpio_mpsse_set_irq_type,
 398         .flags = IRQCHIP_IMMUTABLE,
 399         GPIOCHIP_IRQ_RESOURCE_HELPERS,
 400 };
 401
 402 static void gpio_mpsse_ida_remove(void *data)
 403 {
 404         struct mpsse_priv *priv = data;
 405
 406         ida_free(&gpio_mpsse_ida, priv->id);
 407 }
 408
 409 static int gpio_mpsse_probe(struct usb_interface *interface,
 410                             const struct usb_device_id *id)
 411 {
 412         struct mpsse_priv *priv;
 413         struct device *dev;
 414         int err;
 415
 416         dev = &interface->dev;
 417         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 418         if (!priv)
 419                 return -ENOMEM;
 420
 421         priv->udev = usb_get_dev(interface_to_usbdev(interface));
 422         priv->intf = interface;
 423         priv->intf_id = interface->cur_altsetting->desc.bInterfaceNumber;
 424
 425         priv->id = ida_alloc(&gpio_mpsse_ida, GFP_KERNEL);
 426         if (priv->id < 0)
 427                 return priv->id;
 428
 429         err = devm_add_action_or_reset(dev, gpio_mpsse_ida_remove, priv);
 430         if (err)
 431                 return err;
 432
 433         err = devm_mutex_init(dev, &priv->io_mutex);
 434         if (err)
 435                 return err;
 436
 437         err = devm_mutex_init(dev, &priv->irq_mutex);
 438         if (err)
 439                 return err;
 440
 441         priv->gpio.label = devm_kasprintf(dev, GFP_KERNEL,
 442                                           "gpio-mpsse.%d.%d",
 443                                           priv->id, priv->intf_id);
 444         if (!priv->gpio.label)
 445                 return -ENOMEM;
 446
 447         priv->gpio.owner = THIS_MODULE;
 448         priv->gpio.parent = interface->usb_dev;
 449         priv->gpio.get_direction = gpio_mpsse_get_direction;
 450         priv->gpio.direction_input = gpio_mpsse_direction_input;
 451         priv->gpio.direction_output = gpio_mpsse_direction_output;
 452         priv->gpio.get = gpio_mpsse_gpio_get;
 453         priv->gpio.set = gpio_mpsse_gpio_set;
 454         priv->gpio.get_multiple = gpio_mpsse_get_multiple;
 455         priv->gpio.set_multiple = gpio_mpsse_set_multiple;
 456         priv->gpio.base = -1;
 457         priv->gpio.ngpio = 16;
 458         priv->gpio.offset = priv->intf_id * priv->gpio.ngpio;
 459         priv->gpio.can_sleep = 1;
 460
 461         err = usb_find_common_endpoints(interface->cur_altsetting,
 462                                         &priv->bulk_in, &priv->bulk_out,
 463                                         NULL, NULL);
 464         if (err)
 465                 return err;
 466
 467         priv->bulk_in_buf = devm_kmalloc(dev, usb_endpoint_maxp(priv->bulk_in),
 468                                          GFP_KERNEL);
 469         if (!priv->bulk_in_buf)
 470                 return -ENOMEM;
 471
 472         usb_set_intfdata(interface, priv);
 473
 474         /* Reset mode, needed to correctly enter MPSSE mode */
 475         err = usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
 476                               SET_BITMODE_REQUEST,
 477                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
 478                               MODE_RESET, priv->intf_id + 1, NULL, 0,
 479                               USB_CTRL_SET_TIMEOUT);
 480         if (err)
 481                 return err;
 482
 483         /* Enter MPSSE mode */
 484         err = usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
 485                               SET_BITMODE_REQUEST,
 486                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
 487                               MODE_MPSSE, priv->intf_id + 1, NULL, 0,
 488                               USB_CTRL_SET_TIMEOUT);
 489         if (err)
 490                 return err;
 491
 492         gpio_irq_chip_set_chip(&priv->gpio.irq, &gpio_mpsse_irq_chip);
 493
 494         priv->gpio.irq.parent_handler = NULL;
 495         priv->gpio.irq.num_parents = 0;
 496         priv->gpio.irq.parents = NULL;
 497         priv->gpio.irq.default_type = IRQ_TYPE_NONE;
 498         priv->gpio.irq.handler = handle_simple_irq;
 499
 500         err = devm_gpiochip_add_data(dev, &priv->gpio, priv);
 501         if (err)
 502                 return err;
 503
 504         return 0;
 505 }
 506
 507 static void gpio_mpsse_disconnect(struct usb_interface *intf)
 508 {
 509         struct mpsse_priv *priv = usb_get_intfdata(intf);
 510
 511         priv->intf = NULL;
 512         usb_set_intfdata(intf, NULL);
 513         usb_put_dev(priv->udev);
 514 }
 515
 516 static struct usb_driver gpio_mpsse_driver = {
 517         .name           = "gpio-mpsse",
 518         .probe          = gpio_mpsse_probe,
 519         .disconnect     = gpio_mpsse_disconnect,
 520         .id_table       = gpio_mpsse_table,
 521 };
 522
 523 module_usb_driver(gpio_mpsse_driver);
 524
 525 MODULE_AUTHOR("Mary Strodl <mstrodl@csh.rit.edu>");
 526 MODULE_DESCRIPTION("MPSSE GPIO driver");
 527 MODULE_LICENSE("GPL");