1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
5 * Copyright (C) 2007 David Brownell
8 #include <linux/gpio/driver.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/kernel.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/module.h>
16 #include <linux/property.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
20 static const struct i2c_device_id pcf857x_id
[] = {
36 MODULE_DEVICE_TABLE(i2c
, pcf857x_id
);
38 static const struct of_device_id pcf857x_of_table
[] = {
39 { .compatible
= "nxp,pcf8574", (void *)8 },
40 { .compatible
= "nxp,pcf8574a", (void *)8 },
41 { .compatible
= "nxp,pca8574", (void *)8 },
42 { .compatible
= "nxp,pca9670", (void *)8 },
43 { .compatible
= "nxp,pca9672", (void *)8 },
44 { .compatible
= "nxp,pca9674", (void *)8 },
45 { .compatible
= "nxp,pcf8575", (void *)16 },
46 { .compatible
= "nxp,pca8575", (void *)16 },
47 { .compatible
= "nxp,pca9671", (void *)16 },
48 { .compatible
= "nxp,pca9673", (void *)16 },
49 { .compatible
= "nxp,pca9675", (void *)16 },
50 { .compatible
= "maxim,max7328", (void *)8 },
51 { .compatible
= "maxim,max7329", (void *)8 },
54 MODULE_DEVICE_TABLE(of
, pcf857x_of_table
);
57 * The pcf857x, pca857x, and pca967x chips only expose one read and one
58 * write register. Writing a "one" bit (to match the reset state) lets
59 * that pin be used as an input; it's not an open-drain model, but acts
60 * a bit like one. This is described as "quasi-bidirectional"; read the
61 * chip documentation for details.
63 * Many other I2C GPIO expander chips (like the pca953x models) have
64 * more complex register models and more conventional circuitry using
65 * push/pull drivers. They often use the same 0x20..0x27 addresses as
66 * pcf857x parts, making the "legacy" I2C driver model problematic.
69 struct gpio_chip chip
;
70 struct i2c_client
*client
;
71 struct mutex lock
; /* protect 'out' */
72 unsigned int out
; /* software latch */
73 unsigned int status
; /* current status */
74 unsigned int irq_enabled
; /* enabled irqs */
76 int (*write
)(struct i2c_client
*client
, unsigned int data
);
77 int (*read
)(struct i2c_client
*client
);
80 /*-------------------------------------------------------------------------*/
82 /* Talk to 8-bit I/O expander */
84 static int i2c_write_le8(struct i2c_client
*client
, unsigned int data
)
86 return i2c_smbus_write_byte(client
, data
);
89 static int i2c_read_le8(struct i2c_client
*client
)
91 return i2c_smbus_read_byte(client
);
94 /* Talk to 16-bit I/O expander */
96 static int i2c_write_le16(struct i2c_client
*client
, unsigned int word
)
98 u8 buf
[2] = { word
& 0xff, word
>> 8, };
101 status
= i2c_master_send(client
, buf
, 2);
102 return (status
< 0) ? status
: 0;
105 static int i2c_read_le16(struct i2c_client
*client
)
110 status
= i2c_master_recv(client
, buf
, 2);
113 return (buf
[1] << 8) | buf
[0];
116 /*-------------------------------------------------------------------------*/
118 static int pcf857x_input(struct gpio_chip
*chip
, unsigned int offset
)
120 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
123 mutex_lock(&gpio
->lock
);
124 gpio
->out
|= (1 << offset
);
125 status
= gpio
->write(gpio
->client
, gpio
->out
);
126 mutex_unlock(&gpio
->lock
);
131 static int pcf857x_get(struct gpio_chip
*chip
, unsigned int offset
)
133 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
136 value
= gpio
->read(gpio
->client
);
137 return (value
< 0) ? value
: !!(value
& (1 << offset
));
140 static int pcf857x_get_multiple(struct gpio_chip
*chip
, unsigned long *mask
,
143 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
144 int value
= gpio
->read(gpio
->client
);
150 *bits
|= value
& *mask
;
155 static int pcf857x_output(struct gpio_chip
*chip
, unsigned int offset
, int value
)
157 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
158 unsigned int bit
= 1 << offset
;
161 mutex_lock(&gpio
->lock
);
166 status
= gpio
->write(gpio
->client
, gpio
->out
);
167 mutex_unlock(&gpio
->lock
);
172 static void pcf857x_set(struct gpio_chip
*chip
, unsigned int offset
, int value
)
174 pcf857x_output(chip
, offset
, value
);
177 static void pcf857x_set_multiple(struct gpio_chip
*chip
, unsigned long *mask
,
180 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
182 mutex_lock(&gpio
->lock
);
184 gpio
->out
|= *bits
& *mask
;
185 gpio
->write(gpio
->client
, gpio
->out
);
186 mutex_unlock(&gpio
->lock
);
189 /*-------------------------------------------------------------------------*/
191 static irqreturn_t
pcf857x_irq(int irq
, void *data
)
193 struct pcf857x
*gpio
= data
;
194 unsigned long change
, i
, status
;
196 status
= gpio
->read(gpio
->client
);
199 * call the interrupt handler iff gpio is used as
200 * interrupt source, just to avoid bad irqs
202 mutex_lock(&gpio
->lock
);
203 change
= (gpio
->status
^ status
) & gpio
->irq_enabled
;
204 gpio
->status
= status
;
205 mutex_unlock(&gpio
->lock
);
207 for_each_set_bit(i
, &change
, gpio
->chip
.ngpio
)
208 handle_nested_irq(irq_find_mapping(gpio
->chip
.irq
.domain
, i
));
216 static void noop(struct irq_data
*data
) { }
218 static int pcf857x_irq_set_wake(struct irq_data
*data
, unsigned int on
)
220 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
222 return irq_set_irq_wake(gpio
->client
->irq
, on
);
225 static void pcf857x_irq_enable(struct irq_data
*data
)
227 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
228 irq_hw_number_t hwirq
= irqd_to_hwirq(data
);
230 gpiochip_enable_irq(&gpio
->chip
, hwirq
);
231 gpio
->irq_enabled
|= (1 << hwirq
);
234 static void pcf857x_irq_disable(struct irq_data
*data
)
236 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
237 irq_hw_number_t hwirq
= irqd_to_hwirq(data
);
239 gpio
->irq_enabled
&= ~(1 << hwirq
);
240 gpiochip_disable_irq(&gpio
->chip
, hwirq
);
243 static void pcf857x_irq_bus_lock(struct irq_data
*data
)
245 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
247 mutex_lock(&gpio
->lock
);
250 static void pcf857x_irq_bus_sync_unlock(struct irq_data
*data
)
252 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
254 mutex_unlock(&gpio
->lock
);
257 static const struct irq_chip pcf857x_irq_chip
= {
259 .irq_enable
= pcf857x_irq_enable
,
260 .irq_disable
= pcf857x_irq_disable
,
264 .irq_set_wake
= pcf857x_irq_set_wake
,
265 .irq_bus_lock
= pcf857x_irq_bus_lock
,
266 .irq_bus_sync_unlock
= pcf857x_irq_bus_sync_unlock
,
267 .flags
= IRQCHIP_IMMUTABLE
,
268 GPIOCHIP_IRQ_RESOURCE_HELPERS
,
271 /*-------------------------------------------------------------------------*/
273 static int pcf857x_probe(struct i2c_client
*client
)
275 struct pcf857x
*gpio
;
276 unsigned int n_latch
= 0;
279 device_property_read_u32(&client
->dev
, "lines-initial-states", &n_latch
);
281 /* Allocate, initialize, and register this gpio_chip. */
282 gpio
= devm_kzalloc(&client
->dev
, sizeof(*gpio
), GFP_KERNEL
);
286 mutex_init(&gpio
->lock
);
288 gpio
->chip
.base
= -1;
289 gpio
->chip
.can_sleep
= true;
290 gpio
->chip
.parent
= &client
->dev
;
291 gpio
->chip
.owner
= THIS_MODULE
;
292 gpio
->chip
.get
= pcf857x_get
;
293 gpio
->chip
.get_multiple
= pcf857x_get_multiple
;
294 gpio
->chip
.set
= pcf857x_set
;
295 gpio
->chip
.set_multiple
= pcf857x_set_multiple
;
296 gpio
->chip
.direction_input
= pcf857x_input
;
297 gpio
->chip
.direction_output
= pcf857x_output
;
298 gpio
->chip
.ngpio
= (uintptr_t)i2c_get_match_data(client
);
300 /* NOTE: the OnSemi jlc1562b is also largely compatible with
301 * these parts, notably for output. It has a low-resolution
302 * DAC instead of pin change IRQs; and its inputs can be the
303 * result of comparators.
306 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
307 * 9670, 9672, 9764, and 9764a use quite a variety.
309 * NOTE: we don't distinguish here between *4 and *4a parts.
311 if (gpio
->chip
.ngpio
== 8) {
312 gpio
->write
= i2c_write_le8
;
313 gpio
->read
= i2c_read_le8
;
315 if (!i2c_check_functionality(client
->adapter
,
316 I2C_FUNC_SMBUS_BYTE
))
319 /* fail if there's no chip present */
321 status
= i2c_smbus_read_byte(client
);
323 /* '75/'75c addresses are 0x20..0x27, just like the '74;
324 * the '75c doesn't have a current source pulling high.
325 * 9671, 9673, and 9765 use quite a variety of addresses.
327 * NOTE: we don't distinguish here between '75 and '75c parts.
329 } else if (gpio
->chip
.ngpio
== 16) {
330 gpio
->write
= i2c_write_le16
;
331 gpio
->read
= i2c_read_le16
;
333 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
336 /* fail if there's no chip present */
338 status
= i2c_read_le16(client
);
341 dev_dbg(&client
->dev
, "unsupported number of gpios\n");
348 gpio
->chip
.label
= client
->name
;
350 gpio
->client
= client
;
351 i2c_set_clientdata(client
, gpio
);
353 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
354 * We can't actually know whether a pin is configured (a) as output
355 * and driving the signal low, or (b) as input and reporting a low
356 * value ... without knowing the last value written since the chip
357 * came out of reset (if any). We can't read the latched output.
359 * In short, the only reliable solution for setting up pin direction
360 * is to do it explicitly. The setup() method can do that, but it
361 * may cause transient glitching since it can't know the last value
362 * written (some pins may need to be driven low).
364 * Using n_latch avoids that trouble. When left initialized to zero,
365 * our software copy of the "latch" then matches the chip's all-ones
366 * reset state. Otherwise it flags pins to be driven low.
368 gpio
->out
= ~n_latch
;
369 gpio
->status
= gpio
->read(gpio
->client
);
371 /* Enable irqchip if we have an interrupt */
373 struct gpio_irq_chip
*girq
;
375 status
= devm_request_threaded_irq(&client
->dev
, client
->irq
,
376 NULL
, pcf857x_irq
, IRQF_ONESHOT
|
377 IRQF_TRIGGER_FALLING
| IRQF_SHARED
,
378 dev_name(&client
->dev
), gpio
);
382 girq
= &gpio
->chip
.irq
;
383 gpio_irq_chip_set_chip(girq
, &pcf857x_irq_chip
);
384 /* This will let us handle the parent IRQ in the driver */
385 girq
->parent_handler
= NULL
;
386 girq
->num_parents
= 0;
387 girq
->parents
= NULL
;
388 girq
->default_type
= IRQ_TYPE_NONE
;
389 girq
->handler
= handle_level_irq
;
390 girq
->threaded
= true;
393 status
= devm_gpiochip_add_data(&client
->dev
, &gpio
->chip
, gpio
);
397 dev_info(&client
->dev
, "probed\n");
402 dev_dbg(&client
->dev
, "probe error %d for '%s'\n", status
,
408 static void pcf857x_shutdown(struct i2c_client
*client
)
410 struct pcf857x
*gpio
= i2c_get_clientdata(client
);
412 /* Drive all the I/O lines high */
413 gpio
->write(gpio
->client
, BIT(gpio
->chip
.ngpio
) - 1);
416 static struct i2c_driver pcf857x_driver
= {
419 .of_match_table
= pcf857x_of_table
,
421 .probe
= pcf857x_probe
,
422 .shutdown
= pcf857x_shutdown
,
423 .id_table
= pcf857x_id
,
426 static int __init
pcf857x_init(void)
428 return i2c_add_driver(&pcf857x_driver
);
430 /* register after i2c postcore initcall and before
431 * subsys initcalls that may rely on these GPIOs
433 subsys_initcall(pcf857x_init
);
435 static void __exit
pcf857x_exit(void)
437 i2c_del_driver(&pcf857x_driver
);
439 module_exit(pcf857x_exit
);
441 MODULE_DESCRIPTION("Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders");
442 MODULE_LICENSE("GPL");
443 MODULE_AUTHOR("David Brownell");