1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
5 * Description: CoreSight Embedded Trace Buffer driver
8 #include <linux/atomic.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/types.h>
12 #include <linux/device.h>
14 #include <linux/err.h>
16 #include <linux/miscdevice.h>
17 #include <linux/uaccess.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/seq_file.h>
22 #include <linux/coresight.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
25 #include <linux/circ_buf.h>
27 #include <linux/perf_event.h>
30 #include "coresight-priv.h"
31 #include "coresight-etm-perf.h"
33 #define ETB_RAM_DEPTH_REG 0x004
34 #define ETB_STATUS_REG 0x00c
35 #define ETB_RAM_READ_DATA_REG 0x010
36 #define ETB_RAM_READ_POINTER 0x014
37 #define ETB_RAM_WRITE_POINTER 0x018
39 #define ETB_CTL_REG 0x020
40 #define ETB_RWD_REG 0x024
41 #define ETB_FFSR 0x300
42 #define ETB_FFCR 0x304
43 #define ETB_ITMISCOP0 0xee0
44 #define ETB_ITTRFLINACK 0xee4
45 #define ETB_ITTRFLIN 0xee8
46 #define ETB_ITATBDATA0 0xeeC
47 #define ETB_ITATBCTR2 0xef0
48 #define ETB_ITATBCTR1 0xef4
49 #define ETB_ITATBCTR0 0xef8
51 /* register description */
53 #define ETB_STATUS_RAM_FULL BIT(0)
55 #define ETB_CTL_CAPT_EN BIT(0)
57 #define ETB_FFCR_EN_FTC BIT(0)
58 #define ETB_FFCR_FON_MAN BIT(6)
59 #define ETB_FFCR_STOP_FI BIT(12)
60 #define ETB_FFCR_STOP_TRIGGER BIT(13)
62 #define ETB_FFCR_BIT 6
63 #define ETB_FFSR_BIT 1
64 #define ETB_FRAME_SIZE_WORDS 4
66 DEFINE_CORESIGHT_DEVLIST(etb_devs
, "etb");
69 * struct etb_drvdata - specifics associated to an ETB component
70 * @base: memory mapped base address for this component.
71 * @atclk: optional clock for the core parts of the ETB.
72 * @csdev: component vitals needed by the framework.
73 * @miscdev: specifics to handle "/dev/xyz.etb" entry.
74 * @spinlock: only one at a time pls.
75 * @reading: synchronise user space access to etb buffer.
76 * @pid: Process ID of the process being monitored by the session
77 * that is using this component.
78 * @buf: area of memory where ETB buffer content gets sent.
79 * @buffer_depth: size of @buf.
80 * @trigger_cntr: amount of words to store after a trigger.
85 struct coresight_device
*csdev
;
86 struct miscdevice miscdev
;
95 static int etb_set_buffer(struct coresight_device
*csdev
,
96 struct perf_output_handle
*handle
);
98 static inline unsigned int etb_get_buffer_depth(struct etb_drvdata
*drvdata
)
100 return readl_relaxed(drvdata
->base
+ ETB_RAM_DEPTH_REG
);
103 static void __etb_enable_hw(struct etb_drvdata
*drvdata
)
108 CS_UNLOCK(drvdata
->base
);
110 depth
= drvdata
->buffer_depth
;
111 /* reset write RAM pointer address */
112 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
113 /* clear entire RAM buffer */
114 for (i
= 0; i
< depth
; i
++)
115 writel_relaxed(0x0, drvdata
->base
+ ETB_RWD_REG
);
117 /* reset write RAM pointer address */
118 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
119 /* reset read RAM pointer address */
120 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
122 writel_relaxed(drvdata
->trigger_cntr
, drvdata
->base
+ ETB_TRG
);
123 writel_relaxed(ETB_FFCR_EN_FTC
| ETB_FFCR_STOP_TRIGGER
,
124 drvdata
->base
+ ETB_FFCR
);
125 /* ETB trace capture enable */
126 writel_relaxed(ETB_CTL_CAPT_EN
, drvdata
->base
+ ETB_CTL_REG
);
128 CS_LOCK(drvdata
->base
);
131 static int etb_enable_hw(struct etb_drvdata
*drvdata
)
133 int rc
= coresight_claim_device(drvdata
->csdev
);
138 __etb_enable_hw(drvdata
);
142 static int etb_enable_sysfs(struct coresight_device
*csdev
)
146 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
148 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
150 /* Don't messup with perf sessions. */
151 if (coresight_get_mode(csdev
) == CS_MODE_PERF
) {
156 if (coresight_get_mode(csdev
) == CS_MODE_DISABLED
) {
157 ret
= etb_enable_hw(drvdata
);
161 coresight_set_mode(csdev
, CS_MODE_SYSFS
);
166 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
170 static int etb_enable_perf(struct coresight_device
*csdev
, void *data
)
175 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
176 struct perf_output_handle
*handle
= data
;
177 struct cs_buffers
*buf
= etm_perf_sink_config(handle
);
179 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
181 /* No need to continue if the component is already in used by sysFS. */
182 if (coresight_get_mode(drvdata
->csdev
) == CS_MODE_SYSFS
) {
187 /* Get a handle on the pid of the process to monitor */
190 if (drvdata
->pid
!= -1 && drvdata
->pid
!= pid
) {
196 * No HW configuration is needed if the sink is already in
197 * use for this session.
199 if (drvdata
->pid
== pid
) {
205 * We don't have an internal state to clean up if we fail to setup
206 * the perf buffer. So we can perform the step before we turn the
207 * ETB on and leave without cleaning up.
209 ret
= etb_set_buffer(csdev
, handle
);
213 ret
= etb_enable_hw(drvdata
);
215 /* Associate with monitored process. */
217 coresight_set_mode(drvdata
->csdev
, CS_MODE_PERF
);
222 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
226 static int etb_enable(struct coresight_device
*csdev
, enum cs_mode mode
,
233 ret
= etb_enable_sysfs(csdev
);
236 ret
= etb_enable_perf(csdev
, data
);
246 dev_dbg(&csdev
->dev
, "ETB enabled\n");
250 static void __etb_disable_hw(struct etb_drvdata
*drvdata
)
253 struct device
*dev
= &drvdata
->csdev
->dev
;
254 struct csdev_access
*csa
= &drvdata
->csdev
->access
;
256 CS_UNLOCK(drvdata
->base
);
258 ffcr
= readl_relaxed(drvdata
->base
+ ETB_FFCR
);
259 /* stop formatter when a stop has completed */
260 ffcr
|= ETB_FFCR_STOP_FI
;
261 writel_relaxed(ffcr
, drvdata
->base
+ ETB_FFCR
);
262 /* manually generate a flush of the system */
263 ffcr
|= ETB_FFCR_FON_MAN
;
264 writel_relaxed(ffcr
, drvdata
->base
+ ETB_FFCR
);
266 if (coresight_timeout(csa
, ETB_FFCR
, ETB_FFCR_BIT
, 0)) {
268 "timeout while waiting for completion of Manual Flush\n");
271 /* disable trace capture */
272 writel_relaxed(0x0, drvdata
->base
+ ETB_CTL_REG
);
274 if (coresight_timeout(csa
, ETB_FFSR
, ETB_FFSR_BIT
, 1)) {
276 "timeout while waiting for Formatter to Stop\n");
279 CS_LOCK(drvdata
->base
);
282 static void etb_dump_hw(struct etb_drvdata
*drvdata
)
287 u32 read_data
, depth
;
288 u32 read_ptr
, write_ptr
;
289 u32 frame_off
, frame_endoff
;
290 struct device
*dev
= &drvdata
->csdev
->dev
;
292 CS_UNLOCK(drvdata
->base
);
294 read_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_READ_POINTER
);
295 write_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
297 frame_off
= write_ptr
% ETB_FRAME_SIZE_WORDS
;
298 frame_endoff
= ETB_FRAME_SIZE_WORDS
- frame_off
;
301 "write_ptr: %lu not aligned to formatter frame size\n",
302 (unsigned long)write_ptr
);
303 dev_err(dev
, "frameoff: %lu, frame_endoff: %lu\n",
304 (unsigned long)frame_off
, (unsigned long)frame_endoff
);
305 write_ptr
+= frame_endoff
;
308 if ((readl_relaxed(drvdata
->base
+ ETB_STATUS_REG
)
309 & ETB_STATUS_RAM_FULL
) == 0) {
310 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
312 writel_relaxed(write_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
316 depth
= drvdata
->buffer_depth
;
317 buf_ptr
= drvdata
->buf
;
318 for (i
= 0; i
< depth
; i
++) {
319 read_data
= readl_relaxed(drvdata
->base
+
320 ETB_RAM_READ_DATA_REG
);
321 *(u32
*)buf_ptr
= read_data
;
326 coresight_insert_barrier_packet(drvdata
->buf
);
329 buf_ptr
-= (frame_endoff
* 4);
330 for (i
= 0; i
< frame_endoff
; i
++) {
338 writel_relaxed(read_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
340 CS_LOCK(drvdata
->base
);
343 static void etb_disable_hw(struct etb_drvdata
*drvdata
)
345 __etb_disable_hw(drvdata
);
346 etb_dump_hw(drvdata
);
347 coresight_disclaim_device(drvdata
->csdev
);
350 static int etb_disable(struct coresight_device
*csdev
)
352 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
355 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
359 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
363 /* Complain if we (somehow) got out of sync */
364 WARN_ON_ONCE(coresight_get_mode(csdev
) == CS_MODE_DISABLED
);
365 etb_disable_hw(drvdata
);
366 /* Dissociate from monitored process. */
368 coresight_set_mode(csdev
, CS_MODE_DISABLED
);
369 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
371 dev_dbg(&csdev
->dev
, "ETB disabled\n");
375 static void *etb_alloc_buffer(struct coresight_device
*csdev
,
376 struct perf_event
*event
, void **pages
,
377 int nr_pages
, bool overwrite
)
380 struct cs_buffers
*buf
;
382 node
= (event
->cpu
== -1) ? NUMA_NO_NODE
: cpu_to_node(event
->cpu
);
384 buf
= kzalloc_node(sizeof(struct cs_buffers
), GFP_KERNEL
, node
);
388 buf
->pid
= task_pid_nr(event
->owner
);
389 buf
->snapshot
= overwrite
;
390 buf
->nr_pages
= nr_pages
;
391 buf
->data_pages
= pages
;
396 static void etb_free_buffer(void *config
)
398 struct cs_buffers
*buf
= config
;
403 static int etb_set_buffer(struct coresight_device
*csdev
,
404 struct perf_output_handle
*handle
)
408 struct cs_buffers
*buf
= etm_perf_sink_config(handle
);
413 /* wrap head around to the amount of space we have */
414 head
= handle
->head
& ((buf
->nr_pages
<< PAGE_SHIFT
) - 1);
416 /* find the page to write to */
417 buf
->cur
= head
/ PAGE_SIZE
;
419 /* and offset within that page */
420 buf
->offset
= head
% PAGE_SIZE
;
422 local_set(&buf
->data_size
, 0);
427 static unsigned long etb_update_buffer(struct coresight_device
*csdev
,
428 struct perf_output_handle
*handle
,
435 u32 read_ptr
, write_ptr
, capacity
;
436 u32 status
, read_data
;
437 unsigned long offset
, to_read
= 0, flags
;
438 struct cs_buffers
*buf
= sink_config
;
439 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
444 capacity
= drvdata
->buffer_depth
* ETB_FRAME_SIZE_WORDS
;
446 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
448 /* Don't do anything if another tracer is using this sink */
449 if (csdev
->refcnt
!= 1)
452 __etb_disable_hw(drvdata
);
453 CS_UNLOCK(drvdata
->base
);
455 /* unit is in words, not bytes */
456 read_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_READ_POINTER
);
457 write_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
460 * Entries should be aligned to the frame size. If they are not
461 * go back to the last alignment point to give decoding tools a
462 * chance to fix things.
464 if (write_ptr
% ETB_FRAME_SIZE_WORDS
) {
466 "write_ptr: %lu not aligned to formatter frame size\n",
467 (unsigned long)write_ptr
);
469 write_ptr
&= ~(ETB_FRAME_SIZE_WORDS
- 1);
474 * Get a hold of the status register and see if a wrap around
475 * has occurred. If so adjust things accordingly. Otherwise
476 * start at the beginning and go until the write pointer has
479 status
= readl_relaxed(drvdata
->base
+ ETB_STATUS_REG
);
480 if (status
& ETB_STATUS_RAM_FULL
) {
483 read_ptr
= write_ptr
;
485 to_read
= CIRC_CNT(write_ptr
, read_ptr
, drvdata
->buffer_depth
);
486 to_read
*= ETB_FRAME_SIZE_WORDS
;
490 * Make sure we don't overwrite data that hasn't been consumed yet.
491 * It is entirely possible that the HW buffer has more data than the
492 * ring buffer can currently handle. If so adjust the start address
493 * to take only the last traces.
495 * In snapshot mode we are looking to get the latest traces only and as
496 * such, we don't care about not overwriting data that hasn't been
497 * processed by user space.
499 if (!buf
->snapshot
&& to_read
> handle
->size
) {
500 u32 mask
= ~(ETB_FRAME_SIZE_WORDS
- 1);
502 /* The new read pointer must be frame size aligned */
503 to_read
= handle
->size
& mask
;
505 * Move the RAM read pointer up, keeping in mind that
506 * everything is in frame size units.
508 read_ptr
= (write_ptr
+ drvdata
->buffer_depth
) -
509 to_read
/ ETB_FRAME_SIZE_WORDS
;
510 /* Wrap around if need be*/
511 if (read_ptr
> (drvdata
->buffer_depth
- 1))
512 read_ptr
-= drvdata
->buffer_depth
;
513 /* let the decoder know we've skipped ahead */
518 * Don't set the TRUNCATED flag in snapshot mode because 1) the
519 * captured buffer is expected to be truncated and 2) a full buffer
520 * prevents the event from being re-enabled by the perf core,
521 * resulting in stale data being send to user space.
523 if (!buf
->snapshot
&& lost
)
524 perf_aux_output_flag(handle
, PERF_AUX_FLAG_TRUNCATED
);
526 /* finally tell HW where we want to start reading from */
527 writel_relaxed(read_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
530 offset
= buf
->offset
;
531 barrier
= coresight_barrier_pkt
;
533 for (i
= 0; i
< to_read
; i
+= 4) {
534 buf_ptr
= buf
->data_pages
[cur
] + offset
;
535 read_data
= readl_relaxed(drvdata
->base
+
536 ETB_RAM_READ_DATA_REG
);
537 if (lost
&& i
< CORESIGHT_BARRIER_PKT_SIZE
) {
538 read_data
= *barrier
;
542 *(u32
*)buf_ptr
= read_data
;
546 if (offset
>= PAGE_SIZE
) {
549 /* wrap around at the end of the buffer */
550 cur
&= buf
->nr_pages
- 1;
554 /* reset ETB buffer for next run */
555 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
556 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
559 * In snapshot mode we simply increment the head by the number of byte
560 * that were written. User space will figure out how many bytes to get
561 * from the AUX buffer based on the position of the head.
564 handle
->head
+= to_read
;
566 __etb_enable_hw(drvdata
);
567 CS_LOCK(drvdata
->base
);
569 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
574 static const struct coresight_ops_sink etb_sink_ops
= {
575 .enable
= etb_enable
,
576 .disable
= etb_disable
,
577 .alloc_buffer
= etb_alloc_buffer
,
578 .free_buffer
= etb_free_buffer
,
579 .update_buffer
= etb_update_buffer
,
582 static const struct coresight_ops etb_cs_ops
= {
583 .sink_ops
= &etb_sink_ops
,
586 static void etb_dump(struct etb_drvdata
*drvdata
)
590 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
591 if (coresight_get_mode(drvdata
->csdev
) == CS_MODE_SYSFS
) {
592 __etb_disable_hw(drvdata
);
593 etb_dump_hw(drvdata
);
594 __etb_enable_hw(drvdata
);
596 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
598 dev_dbg(&drvdata
->csdev
->dev
, "ETB dumped\n");
601 static int etb_open(struct inode
*inode
, struct file
*file
)
603 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
604 struct etb_drvdata
, miscdev
);
606 if (local_cmpxchg(&drvdata
->reading
, 0, 1))
609 dev_dbg(&drvdata
->csdev
->dev
, "%s: successfully opened\n", __func__
);
613 static ssize_t
etb_read(struct file
*file
, char __user
*data
,
614 size_t len
, loff_t
*ppos
)
617 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
618 struct etb_drvdata
, miscdev
);
619 struct device
*dev
= &drvdata
->csdev
->dev
;
623 depth
= drvdata
->buffer_depth
;
624 if (*ppos
+ len
> depth
* 4)
625 len
= depth
* 4 - *ppos
;
627 if (copy_to_user(data
, drvdata
->buf
+ *ppos
, len
)) {
629 "%s: copy_to_user failed\n", __func__
);
635 dev_dbg(dev
, "%s: %zu bytes copied, %d bytes left\n",
636 __func__
, len
, (int)(depth
* 4 - *ppos
));
640 static int etb_release(struct inode
*inode
, struct file
*file
)
642 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
643 struct etb_drvdata
, miscdev
);
644 local_set(&drvdata
->reading
, 0);
646 dev_dbg(&drvdata
->csdev
->dev
, "%s: released\n", __func__
);
650 static const struct file_operations etb_fops
= {
651 .owner
= THIS_MODULE
,
654 .release
= etb_release
,
657 static struct attribute
*coresight_etb_mgmt_attrs
[] = {
658 coresight_simple_reg32(rdp
, ETB_RAM_DEPTH_REG
),
659 coresight_simple_reg32(sts
, ETB_STATUS_REG
),
660 coresight_simple_reg32(rrp
, ETB_RAM_READ_POINTER
),
661 coresight_simple_reg32(rwp
, ETB_RAM_WRITE_POINTER
),
662 coresight_simple_reg32(trg
, ETB_TRG
),
663 coresight_simple_reg32(ctl
, ETB_CTL_REG
),
664 coresight_simple_reg32(ffsr
, ETB_FFSR
),
665 coresight_simple_reg32(ffcr
, ETB_FFCR
),
669 static ssize_t
trigger_cntr_show(struct device
*dev
,
670 struct device_attribute
*attr
, char *buf
)
672 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
->parent
);
673 unsigned long val
= drvdata
->trigger_cntr
;
675 return sprintf(buf
, "%#lx\n", val
);
678 static ssize_t
trigger_cntr_store(struct device
*dev
,
679 struct device_attribute
*attr
,
680 const char *buf
, size_t size
)
684 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
->parent
);
686 ret
= kstrtoul(buf
, 16, &val
);
690 drvdata
->trigger_cntr
= val
;
693 static DEVICE_ATTR_RW(trigger_cntr
);
695 static struct attribute
*coresight_etb_attrs
[] = {
696 &dev_attr_trigger_cntr
.attr
,
700 static const struct attribute_group coresight_etb_group
= {
701 .attrs
= coresight_etb_attrs
,
704 static const struct attribute_group coresight_etb_mgmt_group
= {
705 .attrs
= coresight_etb_mgmt_attrs
,
709 static const struct attribute_group
*coresight_etb_groups
[] = {
710 &coresight_etb_group
,
711 &coresight_etb_mgmt_group
,
715 static int etb_probe(struct amba_device
*adev
, const struct amba_id
*id
)
719 struct device
*dev
= &adev
->dev
;
720 struct coresight_platform_data
*pdata
= NULL
;
721 struct etb_drvdata
*drvdata
;
722 struct resource
*res
= &adev
->res
;
723 struct coresight_desc desc
= { 0 };
725 desc
.name
= coresight_alloc_device_name(&etb_devs
, dev
);
729 drvdata
= devm_kzalloc(dev
, sizeof(*drvdata
), GFP_KERNEL
);
733 drvdata
->atclk
= devm_clk_get(&adev
->dev
, "atclk"); /* optional */
734 if (!IS_ERR(drvdata
->atclk
)) {
735 ret
= clk_prepare_enable(drvdata
->atclk
);
739 dev_set_drvdata(dev
, drvdata
);
741 /* validity for the resource is already checked by the AMBA core */
742 base
= devm_ioremap_resource(dev
, res
);
744 return PTR_ERR(base
);
746 drvdata
->base
= base
;
747 desc
.access
= CSDEV_ACCESS_IOMEM(base
);
749 spin_lock_init(&drvdata
->spinlock
);
751 drvdata
->buffer_depth
= etb_get_buffer_depth(drvdata
);
753 if (drvdata
->buffer_depth
& 0x80000000)
756 drvdata
->buf
= devm_kcalloc(dev
,
757 drvdata
->buffer_depth
, 4, GFP_KERNEL
);
761 /* This device is not associated with a session */
764 pdata
= coresight_get_platform_data(dev
);
766 return PTR_ERR(pdata
);
767 adev
->dev
.platform_data
= pdata
;
769 desc
.type
= CORESIGHT_DEV_TYPE_SINK
;
770 desc
.subtype
.sink_subtype
= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER
;
771 desc
.ops
= &etb_cs_ops
;
774 desc
.groups
= coresight_etb_groups
;
775 drvdata
->csdev
= coresight_register(&desc
);
776 if (IS_ERR(drvdata
->csdev
))
777 return PTR_ERR(drvdata
->csdev
);
779 drvdata
->miscdev
.name
= desc
.name
;
780 drvdata
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
781 drvdata
->miscdev
.fops
= &etb_fops
;
782 ret
= misc_register(&drvdata
->miscdev
);
784 goto err_misc_register
;
786 pm_runtime_put(&adev
->dev
);
790 coresight_unregister(drvdata
->csdev
);
794 static void etb_remove(struct amba_device
*adev
)
796 struct etb_drvdata
*drvdata
= dev_get_drvdata(&adev
->dev
);
799 * Since misc_open() holds a refcount on the f_ops, which is
800 * etb fops in this case, device is there until last file
801 * handler to this device is closed.
803 misc_deregister(&drvdata
->miscdev
);
804 coresight_unregister(drvdata
->csdev
);
808 static int etb_runtime_suspend(struct device
*dev
)
810 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
);
812 if (drvdata
&& !IS_ERR(drvdata
->atclk
))
813 clk_disable_unprepare(drvdata
->atclk
);
818 static int etb_runtime_resume(struct device
*dev
)
820 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
);
822 if (drvdata
&& !IS_ERR(drvdata
->atclk
))
823 clk_prepare_enable(drvdata
->atclk
);
829 static const struct dev_pm_ops etb_dev_pm_ops
= {
830 SET_RUNTIME_PM_OPS(etb_runtime_suspend
, etb_runtime_resume
, NULL
)
833 static const struct amba_id etb_ids
[] = {
841 MODULE_DEVICE_TABLE(amba
, etb_ids
);
843 static struct amba_driver etb_driver
= {
845 .name
= "coresight-etb10",
846 .pm
= &etb_dev_pm_ops
,
847 .suppress_bind_attrs
= true,
851 .remove
= etb_remove
,
855 module_amba_driver(etb_driver
);
857 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
858 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
859 MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver");
860 MODULE_LICENSE("GPL v2");