drivers/iio/pressure/bmp280.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #include <linux/bitops.h>
   3 #include <linux/device.h>
   4 #include <linux/regmap.h>
   5 #include <linux/regulator/consumer.h>
   6
   7 #include <linux/iio/iio.h>
   8
   9 /* BMP580 specific registers */
  10 #define BMP580_REG_CMD                  0x7E
  11 #define BMP580_REG_EFF_OSR              0x38
  12 #define BMP580_REG_ODR_CONFIG           0x37
  13 #define BMP580_REG_OSR_CONFIG           0x36
  14 #define BMP580_REG_IF_CONFIG            0x13
  15 #define BMP580_REG_REV_ID               0x02
  16 #define BMP580_REG_CHIP_ID              0x01
  17 /* OOR allows to configure a pressure alarm */
  18 #define BMP580_REG_OOR_CONFIG           0x35
  19 #define BMP580_REG_OOR_RANGE            0x34
  20 #define BMP580_REG_OOR_THR_MSB          0x33
  21 #define BMP580_REG_OOR_THR_LSB          0x32
  22 /* DSP registers (IIR filters) */
  23 #define BMP580_REG_DSP_IIR              0x31
  24 #define BMP580_REG_DSP_CONFIG           0x30
  25 /* NVM access registers */
  26 #define BMP580_REG_NVM_DATA_MSB         0x2D
  27 #define BMP580_REG_NVM_DATA_LSB         0x2C
  28 #define BMP580_REG_NVM_ADDR             0x2B
  29 /* Status registers */
  30 #define BMP580_REG_STATUS               0x28
  31 #define BMP580_REG_INT_STATUS           0x27
  32 #define BMP580_REG_CHIP_STATUS          0x11
  33 /* Data registers */
  34 #define BMP580_REG_FIFO_DATA            0x29
  35 #define BMP580_REG_PRESS_MSB            0x22
  36 #define BMP580_REG_PRESS_LSB            0x21
  37 #define BMP580_REG_PRESS_XLSB           0x20
  38 #define BMP580_REG_TEMP_MSB             0x1F
  39 #define BMP580_REG_TEMP_LSB             0x1E
  40 #define BMP580_REG_TEMP_XLSB            0x1D
  41 /* FIFO config registers */
  42 #define BMP580_REG_FIFO_SEL             0x18
  43 #define BMP580_REG_FIFO_COUNT           0x17
  44 #define BMP580_REG_FIFO_CONFIG          0x16
  45 /* Interruptions config registers */
  46 #define BMP580_REG_INT_SOURCE           0x15
  47 #define BMP580_REG_INT_CONFIG           0x14
  48
  49 #define BMP580_CMD_NOOP                 0x00
  50 #define BMP580_CMD_EXTMODE_SEQ_0        0x73
  51 #define BMP580_CMD_EXTMODE_SEQ_1        0xB4
  52 #define BMP580_CMD_EXTMODE_SEQ_2        0x69
  53 #define BMP580_CMD_NVM_OP_SEQ_0         0x5D
  54 #define BMP580_CMD_NVM_READ_SEQ_1       0xA5
  55 #define BMP580_CMD_NVM_WRITE_SEQ_1      0xA0
  56 #define BMP580_CMD_SOFT_RESET           0xB6
  57
  58 #define BMP580_INT_STATUS_DRDY_MASK     BIT(0)
  59 #define BMP580_INT_STATUS_POR_MASK      BIT(4)
  60
  61 #define BMP580_INT_SOURCE_DRDY          BIT(0)
  62
  63 #define BMP580_INT_CONFIG_MASK          GENMASK(3, 0)
  64 #define BMP580_INT_CONFIG_LATCH         BIT(0)
  65 #define BMP580_INT_CONFIG_LEVEL         BIT(1)
  66 #define BMP580_INT_CONFIG_OPEN_DRAIN    BIT(2)
  67 #define BMP580_INT_CONFIG_INT_EN        BIT(3)
  68
  69 #define BMP580_STATUS_CORE_RDY_MASK     BIT(0)
  70 #define BMP580_STATUS_NVM_RDY_MASK      BIT(1)
  71 #define BMP580_STATUS_NVM_ERR_MASK      BIT(2)
  72 #define BMP580_STATUS_NVM_CMD_ERR_MASK  BIT(3)
  73
  74 #define BMP580_OSR_PRESS_MASK           GENMASK(5, 3)
  75 #define BMP580_OSR_TEMP_MASK            GENMASK(2, 0)
  76 #define BMP580_OSR_PRESS_EN             BIT(6)
  77 #define BMP580_EFF_OSR_PRESS_MASK       GENMASK(5, 3)
  78 #define BMP580_EFF_OSR_TEMP_MASK        GENMASK(2, 0)
  79 #define BMP580_EFF_OSR_VALID_ODR        BIT(7)
  80
  81 #define BMP580_ODR_MASK                 GENMASK(6, 2)
  82 #define BMP580_MODE_MASK                GENMASK(1, 0)
  83 #define BMP580_MODE_SLEEP               0
  84 #define BMP580_MODE_NORMAL              1
  85 #define BMP580_MODE_FORCED              2
  86 #define BMP580_MODE_CONTINOUS           3
  87 #define BMP580_ODR_DEEPSLEEP_DIS        BIT(7)
  88
  89 #define BMP580_DSP_COMP_MASK            GENMASK(1, 0)
  90 #define BMP580_DSP_COMP_DIS             0
  91 #define BMP580_DSP_TEMP_COMP_EN         1
  92 /*
  93  * In section 7.27 of datasheet, modes 2 and 3 are technically the same.
  94  * Pressure compensation means also enabling temperature compensation
  95  */
  96 #define BMP580_DSP_PRESS_COMP_EN        2
  97 #define BMP580_DSP_PRESS_TEMP_COMP_EN   3
  98 #define BMP580_DSP_IIR_FORCED_FLUSH     BIT(2)
  99 #define BMP580_DSP_SHDW_IIR_TEMP_EN     BIT(3)
 100 #define BMP580_DSP_FIFO_IIR_TEMP_EN     BIT(4)
 101 #define BMP580_DSP_SHDW_IIR_PRESS_EN    BIT(5)
 102 #define BMP580_DSP_FIFO_IIR_PRESS_EN    BIT(6)
 103 #define BMP580_DSP_OOR_IIR_PRESS_EN     BIT(7)
 104
 105 #define BMP580_DSP_IIR_PRESS_MASK       GENMASK(5, 3)
 106 #define BMP580_DSP_IIR_TEMP_MASK        GENMASK(2, 0)
 107 #define BMP580_FILTER_OFF               0
 108 #define BMP580_FILTER_1X                1
 109 #define BMP580_FILTER_3X                2
 110 #define BMP580_FILTER_7X                3
 111 #define BMP580_FILTER_15X               4
 112 #define BMP580_FILTER_31X               5
 113 #define BMP580_FILTER_63X               6
 114 #define BMP580_FILTER_127X              7
 115
 116 #define BMP580_NVM_ROW_ADDR_MASK        GENMASK(5, 0)
 117 #define BMP580_NVM_PROG_EN              BIT(6)
 118
 119 #define BMP580_TEMP_SKIPPED             0x7f7f7f
 120 #define BMP580_PRESS_SKIPPED            0x7f7f7f
 121
 122 /* BMP380 specific registers */
 123 #define BMP380_REG_CMD                  0x7E
 124 #define BMP380_REG_CONFIG               0x1F
 125 #define BMP380_REG_ODR                  0x1D
 126 #define BMP380_REG_OSR                  0x1C
 127 #define BMP380_REG_POWER_CONTROL        0x1B
 128 #define BMP380_REG_IF_CONFIG            0x1A
 129 #define BMP380_REG_INT_CONTROL          0x19
 130 #define BMP380_REG_INT_STATUS           0x11
 131 #define BMP380_REG_EVENT                0x10
 132 #define BMP380_REG_STATUS               0x03
 133 #define BMP380_REG_ERROR                0x02
 134 #define BMP380_REG_ID                   0x00
 135
 136 #define BMP380_REG_FIFO_CONFIG_1        0x18
 137 #define BMP380_REG_FIFO_CONFIG_2        0x17
 138 #define BMP380_REG_FIFO_WATERMARK_MSB   0x16
 139 #define BMP380_REG_FIFO_WATERMARK_LSB   0x15
 140 #define BMP380_REG_FIFO_DATA            0x14
 141 #define BMP380_REG_FIFO_LENGTH_MSB      0x13
 142 #define BMP380_REG_FIFO_LENGTH_LSB      0x12
 143
 144 #define BMP380_REG_SENSOR_TIME_MSB      0x0E
 145 #define BMP380_REG_SENSOR_TIME_LSB      0x0D
 146 #define BMP380_REG_SENSOR_TIME_XLSB     0x0C
 147
 148 #define BMP380_REG_TEMP_MSB             0x09
 149 #define BMP380_REG_TEMP_LSB             0x08
 150 #define BMP380_REG_TEMP_XLSB            0x07
 151
 152 #define BMP380_REG_PRESS_MSB            0x06
 153 #define BMP380_REG_PRESS_LSB            0x05
 154 #define BMP380_REG_PRESS_XLSB           0x04
 155
 156 #define BMP380_REG_CALIB_TEMP_START     0x31
 157 #define BMP380_CALIB_REG_COUNT          21
 158
 159 #define BMP380_FILTER_MASK              GENMASK(3, 1)
 160 #define BMP380_FILTER_OFF               0
 161 #define BMP380_FILTER_1X                1
 162 #define BMP380_FILTER_3X                2
 163 #define BMP380_FILTER_7X                3
 164 #define BMP380_FILTER_15X               4
 165 #define BMP380_FILTER_31X               5
 166 #define BMP380_FILTER_63X               6
 167 #define BMP380_FILTER_127X              7
 168
 169 #define BMP380_OSRS_TEMP_MASK           GENMASK(5, 3)
 170 #define BMP380_OSRS_PRESS_MASK          GENMASK(2, 0)
 171
 172 #define BMP380_ODRS_MASK                GENMASK(4, 0)
 173
 174 #define BMP380_CTRL_SENSORS_MASK        GENMASK(1, 0)
 175 #define BMP380_CTRL_SENSORS_PRESS_EN    BIT(0)
 176 #define BMP380_CTRL_SENSORS_TEMP_EN     BIT(1)
 177 #define BMP380_MODE_MASK                GENMASK(5, 4)
 178 #define BMP380_MODE_SLEEP               0
 179 #define BMP380_MODE_FORCED              1
 180 #define BMP380_MODE_NORMAL              3
 181
 182 #define BMP380_MEAS_OFFSET              234
 183 #define BMP380_MEAS_DUR                 2020
 184 #define BMP380_TEMP_MEAS_OFFSET         163
 185 #define BMP380_PRESS_MEAS_OFFSET        392
 186
 187 #define BMP380_INT_STATUS_DRDY          BIT(3)
 188
 189 #define BMP380_INT_CTRL_SETTINGS_MASK   GENMASK(2, 0)
 190 #define BMP380_INT_CTRL_OPEN_DRAIN      BIT(0)
 191 #define BMP380_INT_CTRL_LEVEL           BIT(1)
 192 #define BMP380_INT_CTRL_LATCH           BIT(2)
 193 #define BMP380_INT_CTRL_DRDY_EN         BIT(6)
 194
 195 #define BMP380_MIN_TEMP                 -4000
 196 #define BMP380_MAX_TEMP                 8500
 197 #define BMP380_MIN_PRES                 3000000
 198 #define BMP380_MAX_PRES                 12500000
 199
 200 #define BMP380_CMD_NOOP                 0x00
 201 #define BMP380_CMD_EXTMODE_EN_MID       0x34
 202 #define BMP380_CMD_FIFO_FLUSH           0xB0
 203 #define BMP380_CMD_SOFT_RESET           0xB6
 204
 205 #define BMP380_STATUS_CMD_RDY_MASK      BIT(4)
 206 #define BMP380_STATUS_DRDY_PRESS_MASK   BIT(5)
 207 #define BMP380_STATUS_DRDY_TEMP_MASK    BIT(6)
 208
 209 #define BMP380_ERR_FATAL_MASK           BIT(0)
 210 #define BMP380_ERR_CMD_MASK             BIT(1)
 211 #define BMP380_ERR_CONF_MASK            BIT(2)
 212
 213 #define BMP380_TEMP_SKIPPED             0x800000
 214 #define BMP380_PRESS_SKIPPED            0x800000
 215
 216 /* BMP280 specific registers */
 217 #define BMP280_REG_TEMP_XLSB            0xFC
 218 #define BMP280_REG_TEMP_LSB             0xFB
 219 #define BMP280_REG_TEMP_MSB             0xFA
 220 #define BMP280_REG_PRESS_XLSB           0xF9
 221 #define BMP280_REG_PRESS_LSB            0xF8
 222 #define BMP280_REG_PRESS_MSB            0xF7
 223
 224 /* Helper mask to truncate excess 4 bits on pressure and temp readings */
 225 #define BMP280_MEAS_TRIM_MASK           GENMASK(24, 4)
 226
 227 #define BMP280_REG_CONFIG               0xF5
 228 #define BMP280_REG_CTRL_MEAS            0xF4
 229 #define BMP280_REG_STATUS               0xF3
 230 #define BMP280_REG_STATUS_IM_UPDATE     BIT(0)
 231 #define BMP280_REG_STATUS_MEAS_BIT      BIT(3)
 232 #define BMP280_REG_RESET                0xE0
 233 #define BMP280_RST_SOFT_CMD             0xB6
 234
 235 #define BMP280_REG_COMP_TEMP_START      0x88
 236 #define BMP280_COMP_TEMP_REG_COUNT      6
 237
 238 #define BMP280_REG_COMP_PRESS_START     0x8E
 239 #define BMP280_COMP_PRESS_REG_COUNT     18
 240
 241 #define BMP280_CONTIGUOUS_CALIB_REGS    (BMP280_COMP_TEMP_REG_COUNT + \
 242                                          BMP280_COMP_PRESS_REG_COUNT)
 243
 244 #define BMP280_FILTER_MASK              GENMASK(4, 2)
 245 #define BMP280_FILTER_OFF               0
 246 #define BMP280_FILTER_2X                1
 247 #define BMP280_FILTER_4X                2
 248 #define BMP280_FILTER_8X                3
 249 #define BMP280_FILTER_16X               4
 250
 251 #define BMP280_OSRS_TEMP_MASK           GENMASK(7, 5)
 252 #define BMP280_OSRS_TEMP_SKIP           0
 253 #define BMP280_OSRS_TEMP_1X             1
 254 #define BMP280_OSRS_TEMP_2X             2
 255 #define BMP280_OSRS_TEMP_4X             3
 256 #define BMP280_OSRS_TEMP_8X             4
 257 #define BMP280_OSRS_TEMP_16X            5
 258
 259 #define BMP280_OSRS_PRESS_MASK          GENMASK(4, 2)
 260 #define BMP280_OSRS_PRESS_SKIP          0
 261 #define BMP280_OSRS_PRESS_1X            1
 262 #define BMP280_OSRS_PRESS_2X            2
 263 #define BMP280_OSRS_PRESS_4X            3
 264 #define BMP280_OSRS_PRESS_8X            4
 265 #define BMP280_OSRS_PRESS_16X           5
 266
 267 #define BMP280_MODE_MASK                GENMASK(1, 0)
 268 #define BMP280_MODE_SLEEP               0
 269 #define BMP280_MODE_FORCED              1
 270 #define BMP280_MODE_NORMAL              3
 271
 272 #define BMP280_MEAS_OFFSET              1250
 273 #define BMP280_MEAS_DUR                 2300
 274 #define BMP280_PRESS_HUMID_MEAS_OFFSET  575
 275
 276 /* BME280 specific registers */
 277 #define BME280_REG_HUMIDITY_LSB         0xFE
 278 #define BME280_REG_HUMIDITY_MSB         0xFD
 279
 280 #define BME280_REG_CTRL_HUMIDITY        0xF2
 281
 282 /* Due to non linear mapping, and data sizes we can't do a bulk read */
 283 #define BME280_REG_COMP_H1              0xA1
 284 #define BME280_REG_COMP_H2              0xE1
 285 #define BME280_REG_COMP_H3              0xE3
 286 #define BME280_REG_COMP_H4              0xE4
 287 #define BME280_REG_COMP_H5              0xE5
 288 #define BME280_REG_COMP_H6              0xE7
 289
 290 #define BME280_COMP_H4_GET_MASK_UP      GENMASK(15, 8)
 291 #define BME280_COMP_H4_PREP_MASK_UP     GENMASK(11, 4)
 292 #define BME280_COMP_H4_MASK_LOW         GENMASK(3, 0)
 293 #define BME280_COMP_H5_MASK             GENMASK(15, 4)
 294
 295 #define BME280_CONTIGUOUS_CALIB_REGS    7
 296
 297 #define BME280_OSRS_HUMIDITY_MASK       GENMASK(2, 0)
 298 #define BME280_OSRS_HUMIDITY_SKIP       0
 299 #define BME280_OSRS_HUMIDITY_1X         1
 300 #define BME280_OSRS_HUMIDITY_2X         2
 301 #define BME280_OSRS_HUMIDITY_4X         3
 302 #define BME280_OSRS_HUMIDITY_8X         4
 303 #define BME280_OSRS_HUMIDITY_16X        5
 304
 305 /* BMP180 specific registers */
 306 #define BMP180_REG_OUT_XLSB             0xF8
 307 #define BMP180_REG_OUT_LSB              0xF7
 308 #define BMP180_REG_OUT_MSB              0xF6
 309
 310 #define BMP180_REG_CALIB_START          0xAA
 311 #define BMP180_REG_CALIB_COUNT          22
 312
 313 #define BMP180_MEAS_CTRL_MASK           GENMASK(4, 0)
 314 #define BMP180_MEAS_TEMP                0x0E
 315 #define BMP180_MEAS_PRESS               0x14
 316 #define BMP180_MEAS_SCO                 BIT(5)
 317 #define BMP180_OSRS_PRESS_MASK          GENMASK(7, 6)
 318 #define BMP180_MEAS_PRESS_1X            0
 319 #define BMP180_MEAS_PRESS_2X            1
 320 #define BMP180_MEAS_PRESS_4X            2
 321 #define BMP180_MEAS_PRESS_8X            3
 322
 323 /* BMP180 and BMP280 common registers */
 324 #define BMP280_REG_CTRL_MEAS            0xF4
 325 #define BMP280_REG_RESET                0xE0
 326 #define BMP280_REG_ID                   0xD0
 327
 328 #define BMP380_CHIP_ID                  0x50
 329 #define BMP580_CHIP_ID                  0x50
 330 #define BMP580_CHIP_ID_ALT              0x51
 331 #define BMP180_CHIP_ID                  0x55
 332 #define BMP280_CHIP_ID                  0x58
 333 #define BMP390_CHIP_ID                  0x60
 334 #define BME280_CHIP_ID                  0x60
 335 #define BMP280_SOFT_RESET_VAL           0xB6
 336
 337 /* BMP280 register skipped special values */
 338 #define BMP280_TEMP_SKIPPED             0x80000
 339 #define BMP280_PRESS_SKIPPED            0x80000
 340 #define BMP280_HUMIDITY_SKIPPED         0x8000
 341
 342 /* Number of bytes for each value */
 343 #define BMP280_NUM_PRESS_BYTES          3
 344 #define BMP280_NUM_TEMP_BYTES           3
 345 #define BME280_NUM_HUMIDITY_BYTES       2
 346 #define BMP280_BURST_READ_BYTES         (BMP280_NUM_PRESS_BYTES + \
 347                                          BMP280_NUM_TEMP_BYTES)
 348 #define BME280_BURST_READ_BYTES         (BMP280_NUM_PRESS_BYTES + \
 349                                          BMP280_NUM_TEMP_BYTES + \
 350                                          BME280_NUM_HUMIDITY_BYTES)
 351
 352 #define BME280_NUM_MAX_CHANNELS         3
 353 /* Core exported structs */
 354
 355 static const char *const bmp280_supply_names[] = {
 356         "vddd", "vdda"
 357 };
 358
 359 #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names)
 360
 361 struct bmp180_calib {
 362         s16 AC1;
 363         s16 AC2;
 364         s16 AC3;
 365         u16 AC4;
 366         u16 AC5;
 367         u16 AC6;
 368         s16 B1;
 369         s16 B2;
 370         s16 MB;
 371         s16 MC;
 372         s16 MD;
 373 };
 374
 375 /* See datasheet Section 4.2.2. */
 376 struct bmp280_calib {
 377         u16 T1;
 378         s16 T2;
 379         s16 T3;
 380         u16 P1;
 381         s16 P2;
 382         s16 P3;
 383         s16 P4;
 384         s16 P5;
 385         s16 P6;
 386         s16 P7;
 387         s16 P8;
 388         s16 P9;
 389         u8  H1;
 390         s16 H2;
 391         u8  H3;
 392         s16 H4;
 393         s16 H5;
 394         s8  H6;
 395 };
 396
 397 /* See datasheet Section 3.11.1. */
 398 struct bmp380_calib {
 399         u16 T1;
 400         u16 T2;
 401         s8  T3;
 402         s16 P1;
 403         s16 P2;
 404         s8  P3;
 405         s8  P4;
 406         u16 P5;
 407         u16 P6;
 408         s8  P7;
 409         s8  P8;
 410         s16 P9;
 411         s8  P10;
 412         s8  P11;
 413 };
 414
 415 enum bmp280_op_mode {
 416         BMP280_SLEEP,
 417         BMP280_FORCED,
 418         BMP280_NORMAL,
 419 };
 420
 421 struct bmp280_data {
 422         struct device *dev;
 423         struct mutex lock;
 424         struct regmap *regmap;
 425         struct completion done;
 426         bool use_eoc;
 427         bool trig_open_drain;
 428         bool trig_active_high;
 429         struct iio_trigger *trig;
 430         const struct bmp280_chip_info *chip_info;
 431         union {
 432                 struct bmp180_calib bmp180;
 433                 struct bmp280_calib bmp280;
 434                 struct bmp380_calib bmp380;
 435         } calib;
 436         struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES];
 437         unsigned int start_up_time; /* in microseconds */
 438
 439         /* log of base 2 of oversampling rate */
 440         u8 oversampling_press;
 441         u8 oversampling_temp;
 442         u8 oversampling_humid;
 443         u8 iir_filter_coeff;
 444
 445         /*
 446          * BMP380 devices introduce sampling frequency configuration. See
 447          * datasheet sections 3.3.3. and 4.3.19 for more details.
 448          *
 449          * BMx280 devices allowed indirect configuration of sampling frequency
 450          * changing the t_standby duration between measurements, as detailed on
 451          * section 3.6.3 of the datasheet.
 452          */
 453         int sampling_freq;
 454
 455         /*
 456          * Data to push to userspace triggered buffer. Up to 3 channels and
 457          * s64 timestamp, aligned.
 458          */
 459         u8 sensor_data[ALIGN(sizeof(s32) * BME280_NUM_MAX_CHANNELS, sizeof(s64))
 460                        + sizeof(s64)] __aligned(sizeof(s64));
 461
 462         /* Value to hold the current operation mode of the device */
 463         enum bmp280_op_mode op_mode;
 464
 465         /*
 466          * DMA (thus cache coherency maintenance) may require the
 467          * transfer buffers to live in their own cache lines.
 468          */
 469         union {
 470                 /* Sensor data buffer */
 471                 u8 buf[BME280_BURST_READ_BYTES];
 472                 /* Calibration data buffers */
 473                 __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2];
 474                 __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2];
 475                 u8 bme280_humid_cal_buf[BME280_CONTIGUOUS_CALIB_REGS];
 476                 u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT];
 477                 /* Miscellaneous, endianness-aware data buffers */
 478                 __le16 le16;
 479                 __be16 be16;
 480         } __aligned(IIO_DMA_MINALIGN);
 481 };
 482
 483 struct bmp280_chip_info {
 484         unsigned int id_reg;
 485         const u8 *chip_id;
 486         int num_chip_id;
 487
 488         const struct regmap_config *regmap_config;
 489         bool spi_read_extra_byte;
 490
 491         const struct iio_chan_spec *channels;
 492         int num_channels;
 493         unsigned int start_up_time;
 494         const unsigned long *avail_scan_masks;
 495
 496         const int *oversampling_temp_avail;
 497         int num_oversampling_temp_avail;
 498         int oversampling_temp_default;
 499
 500         const int *oversampling_press_avail;
 501         int num_oversampling_press_avail;
 502         int oversampling_press_default;
 503
 504         const int *oversampling_humid_avail;
 505         int num_oversampling_humid_avail;
 506         int oversampling_humid_default;
 507
 508         const int *iir_filter_coeffs_avail;
 509         int num_iir_filter_coeffs_avail;
 510         int iir_filter_coeff_default;
 511
 512         const int (*sampling_freq_avail)[2];
 513         int num_sampling_freq_avail;
 514         int sampling_freq_default;
 515
 516         const int *temp_coeffs;
 517         const int temp_coeffs_type;
 518         const int *press_coeffs;
 519         const int press_coeffs_type;
 520         const int *humid_coeffs;
 521         const int humid_coeffs_type;
 522
 523         int (*chip_config)(struct bmp280_data *data);
 524         int (*read_temp)(struct bmp280_data *data, s32 *adc_temp);
 525         int (*read_press)(struct bmp280_data *data, u32 *adc_press);
 526         int (*read_humid)(struct bmp280_data *data, u32 *adc_humidity);
 527         int (*read_calib)(struct bmp280_data *data);
 528         int (*preinit)(struct bmp280_data *data);
 529         int (*set_mode)(struct bmp280_data *data, enum bmp280_op_mode mode);
 530         int (*wait_conv)(struct bmp280_data *data);
 531
 532         int (*trigger_probe)(struct iio_dev *indio_dev);
 533         irqreturn_t (*trigger_handler)(int irq, void *p);
 534 };
 535
 536 /* Chip infos for each variant */
 537 extern const struct bmp280_chip_info bmp085_chip_info;
 538 extern const struct bmp280_chip_info bmp180_chip_info;
 539 extern const struct bmp280_chip_info bmp280_chip_info;
 540 extern const struct bmp280_chip_info bme280_chip_info;
 541 extern const struct bmp280_chip_info bmp380_chip_info;
 542 extern const struct bmp280_chip_info bmp580_chip_info;
 543
 544 /* Regmap configurations */
 545 extern const struct regmap_config bmp180_regmap_config;
 546 extern const struct regmap_config bmp280_regmap_config;
 547 extern const struct regmap_config bme280_regmap_config;
 548 extern const struct regmap_config bmp380_regmap_config;
 549 extern const struct regmap_config bmp580_regmap_config;
 550
 551 /* Probe called from different transports */
 552 int bmp280_common_probe(struct device *dev,
 553                         struct regmap *regmap,
 554                         const struct bmp280_chip_info *chip_info,
 555                         const char *name,
 556                         int irq);
 557
 558 /* PM ops */
 559 extern const struct dev_pm_ops bmp280_dev_pm_ops;