drivers/infiniband/hw/hns/hns_roce_ah.c

   1 /*
   2  * Copyright (c) 2016 Hisilicon Limited.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/pci.h>
  34 #include <rdma/ib_addr.h>
  35 #include <rdma/ib_cache.h>
  36 #include "hnae3.h"
  37 #include "hns_roce_device.h"
  38 #include "hns_roce_hw_v2.h"
  39
  40 static inline u16 get_ah_udp_sport(const struct rdma_ah_attr *ah_attr)
  41 {
  42         u32 fl = ah_attr->grh.flow_label;
  43         u16 sport;
  44
  45         if (!fl)
  46                 sport = get_random_u32_inclusive(IB_ROCE_UDP_ENCAP_VALID_PORT_MIN,
  47                                                  IB_ROCE_UDP_ENCAP_VALID_PORT_MAX);
  48         else
  49                 sport = rdma_flow_label_to_udp_sport(fl);
  50
  51         return sport;
  52 }
  53
  54 int hns_roce_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
  55                        struct ib_udata *udata)
  56 {
  57         struct rdma_ah_attr *ah_attr = init_attr->ah_attr;
  58         const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
  59         struct hns_roce_dev *hr_dev = to_hr_dev(ibah->device);
  60         struct hns_roce_ib_create_ah_resp resp = {};
  61         struct hns_roce_ah *ah = to_hr_ah(ibah);
  62         u8 tclass = get_tclass(grh);
  63         u8 priority = 0;
  64         u8 tc_mode = 0;
  65         int ret;
  66
  67         if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08 && udata) {
  68                 ret = -EOPNOTSUPP;
  69                 goto err_out;
  70         }
  71
  72         ah->av.port = rdma_ah_get_port_num(ah_attr);
  73         ah->av.gid_index = grh->sgid_index;
  74
  75         if (rdma_ah_get_static_rate(ah_attr))
  76                 ah->av.stat_rate = IB_RATE_10_GBPS;
  77
  78         ah->av.hop_limit = grh->hop_limit;
  79         ah->av.flowlabel = grh->flow_label;
  80         ah->av.udp_sport = get_ah_udp_sport(ah_attr);
  81         ah->av.tclass = tclass;
  82
  83         ret = hr_dev->hw->get_dscp(hr_dev, tclass, &tc_mode, &priority);
  84         if (ret == -EOPNOTSUPP)
  85                 ret = 0;
  86
  87         if (ret && grh->sgid_attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
  88                 goto err_out;
  89
  90         if (tc_mode == HNAE3_TC_MAP_MODE_DSCP &&
  91             grh->sgid_attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
  92                 ah->av.sl = priority;
  93         else
  94                 ah->av.sl = rdma_ah_get_sl(ah_attr);
  95
  96         if (!check_sl_valid(hr_dev, ah->av.sl)) {
  97                 ret = -EINVAL;
  98                 goto err_out;
  99         }
 100
 101         memcpy(ah->av.dgid, grh->dgid.raw, HNS_ROCE_GID_SIZE);
 102         memcpy(ah->av.mac, ah_attr->roce.dmac, ETH_ALEN);
 103
 104         /* HIP08 needs to record vlan info in Address Vector */
 105         if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
 106                 ret = rdma_read_gid_l2_fields(ah_attr->grh.sgid_attr,
 107                                               &ah->av.vlan_id, NULL);
 108                 if (ret)
 109                         goto err_out;
 110
 111                 ah->av.vlan_en = ah->av.vlan_id < VLAN_N_VID;
 112         }
 113
 114         if (udata) {
 115                 resp.priority = ah->av.sl;
 116                 resp.tc_mode = tc_mode;
 117                 memcpy(resp.dmac, ah_attr->roce.dmac, ETH_ALEN);
 118                 ret = ib_copy_to_udata(udata, &resp,
 119                                        min(udata->outlen, sizeof(resp)));
 120         }
 121
 122 err_out:
 123         if (ret)
 124                 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_AH_CREATE_ERR_CNT]);
 125
 126         return ret;
 127 }
 128
 129 int hns_roce_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
 130 {
 131         struct hns_roce_ah *ah = to_hr_ah(ibah);
 132
 133         memset(ah_attr, 0, sizeof(*ah_attr));
 134
 135         rdma_ah_set_sl(ah_attr, ah->av.sl);
 136         rdma_ah_set_port_num(ah_attr, ah->av.port);
 137         rdma_ah_set_static_rate(ah_attr, ah->av.stat_rate);
 138         rdma_ah_set_grh(ah_attr, NULL, ah->av.flowlabel,
 139                         ah->av.gid_index, ah->av.hop_limit, ah->av.tclass);
 140         rdma_ah_set_dgid_raw(ah_attr, ah->av.dgid);
 141
 142         return 0;
 143 }