2 * Copyright (c) 2021 Cornelis Networks. All rights reserved.
3 * Copyright (c) 2013 Intel Corporation. All rights reserved.
4 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
5 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/spinlock.h>
37 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/netdevice.h>
41 #include <linux/vmalloc.h>
42 #include <linux/module.h>
43 #include <linux/prefetch.h>
47 DEFINE_MUTEX(qib_mutex
); /* general driver use */
50 module_param_named(ibmtu
, qib_ibmtu
, uint
, S_IRUGO
);
51 MODULE_PARM_DESC(ibmtu
, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
53 unsigned qib_compat_ddr_negotiate
= 1;
54 module_param_named(compat_ddr_negotiate
, qib_compat_ddr_negotiate
, uint
,
56 MODULE_PARM_DESC(compat_ddr_negotiate
,
57 "Attempt pre-IBTA 1.2 DDR speed negotiation");
59 MODULE_LICENSE("Dual BSD/GPL");
60 MODULE_AUTHOR("Cornelis <support@cornelisnetworks.com>");
61 MODULE_DESCRIPTION("Cornelis IB driver");
64 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
65 * PIO send buffers. This is well beyond anything currently
66 * defined in the InfiniBand spec.
68 #define QIB_PIO_MAXIBHDR 128
71 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
73 #define QIB_MAX_PKT_RECV 64
75 struct qlogic_ib_stats qib_stats
;
77 struct pci_dev
*qib_get_pci_dev(struct rvt_dev_info
*rdi
)
79 struct qib_ibdev
*ibdev
= container_of(rdi
, struct qib_ibdev
, rdi
);
80 struct qib_devdata
*dd
= container_of(ibdev
,
81 struct qib_devdata
, verbs_dev
);
86 * Return count of units with at least one port ACTIVE.
88 int qib_count_active_units(void)
90 struct qib_devdata
*dd
;
91 struct qib_pportdata
*ppd
;
92 unsigned long index
, flags
;
93 int pidx
, nunits_active
= 0;
95 xa_lock_irqsave(&qib_dev_table
, flags
);
96 xa_for_each(&qib_dev_table
, index
, dd
) {
97 if (!(dd
->flags
& QIB_PRESENT
) || !dd
->kregbase
)
99 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
100 ppd
= dd
->pport
+ pidx
;
101 if (ppd
->lid
&& (ppd
->lflags
& (QIBL_LINKINIT
|
102 QIBL_LINKARMED
| QIBL_LINKACTIVE
))) {
108 xa_unlock_irqrestore(&qib_dev_table
, flags
);
109 return nunits_active
;
113 * Return count of all units, optionally return in arguments
114 * the number of usable (present) units, and the number of
117 int qib_count_units(int *npresentp
, int *nupp
)
119 int nunits
= 0, npresent
= 0, nup
= 0;
120 struct qib_devdata
*dd
;
121 unsigned long index
, flags
;
123 struct qib_pportdata
*ppd
;
125 xa_lock_irqsave(&qib_dev_table
, flags
);
126 xa_for_each(&qib_dev_table
, index
, dd
) {
128 if ((dd
->flags
& QIB_PRESENT
) && dd
->kregbase
)
130 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
131 ppd
= dd
->pport
+ pidx
;
132 if (ppd
->lid
&& (ppd
->lflags
& (QIBL_LINKINIT
|
133 QIBL_LINKARMED
| QIBL_LINKACTIVE
)))
137 xa_unlock_irqrestore(&qib_dev_table
, flags
);
140 *npresentp
= npresent
;
148 * qib_wait_linkstate - wait for an IB link state change to occur
149 * @ppd: the qlogic_ib device
150 * @state: the state to wait for
151 * @msecs: the number of milliseconds to wait
153 * wait up to msecs milliseconds for IB link state change to occur for
154 * now, take the easy polling route. Currently used only by
155 * qib_set_linkstate. Returns 0 if state reached, otherwise
156 * -ETIMEDOUT state can have multiple states set, for any of several
159 int qib_wait_linkstate(struct qib_pportdata
*ppd
, u32 state
, int msecs
)
164 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
165 if (ppd
->state_wanted
) {
166 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
170 ppd
->state_wanted
= state
;
171 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
172 wait_event_interruptible_timeout(ppd
->state_wait
,
173 (ppd
->lflags
& state
),
174 msecs_to_jiffies(msecs
));
175 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
176 ppd
->state_wanted
= 0;
177 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
179 if (!(ppd
->lflags
& state
))
187 int qib_set_linkstate(struct qib_pportdata
*ppd
, u8 newstate
)
191 struct qib_devdata
*dd
= ppd
->dd
;
195 case QIB_IB_LINKDOWN_ONLY
:
196 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
197 IB_LINKCMD_DOWN
| IB_LINKINITCMD_NOP
);
202 case QIB_IB_LINKDOWN
:
203 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
204 IB_LINKCMD_DOWN
| IB_LINKINITCMD_POLL
);
209 case QIB_IB_LINKDOWN_SLEEP
:
210 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
211 IB_LINKCMD_DOWN
| IB_LINKINITCMD_SLEEP
);
216 case QIB_IB_LINKDOWN_DISABLE
:
217 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
218 IB_LINKCMD_DOWN
| IB_LINKINITCMD_DISABLE
);
224 if (ppd
->lflags
& QIBL_LINKARMED
) {
228 if (!(ppd
->lflags
& (QIBL_LINKINIT
| QIBL_LINKACTIVE
))) {
233 * Since the port can be ACTIVE when we ask for ARMED,
234 * clear QIBL_LINKV so we can wait for a transition.
235 * If the link isn't ARMED, then something else happened
236 * and there is no point waiting for ARMED.
238 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
239 ppd
->lflags
&= ~QIBL_LINKV
;
240 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
241 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
242 IB_LINKCMD_ARMED
| IB_LINKINITCMD_NOP
);
246 case QIB_IB_LINKACTIVE
:
247 if (ppd
->lflags
& QIBL_LINKACTIVE
) {
251 if (!(ppd
->lflags
& QIBL_LINKARMED
)) {
255 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LSTATE
,
256 IB_LINKCMD_ACTIVE
| IB_LINKINITCMD_NOP
);
257 lstate
= QIBL_LINKACTIVE
;
264 ret
= qib_wait_linkstate(ppd
, lstate
, 10);
271 * Get address of eager buffer from it's index (allocated in chunks, not
274 static inline void *qib_get_egrbuf(const struct qib_ctxtdata
*rcd
, u32 etail
)
276 const u32 chunk
= etail
>> rcd
->rcvegrbufs_perchunk_shift
;
277 const u32 idx
= etail
& ((u32
)rcd
->rcvegrbufs_perchunk
- 1);
279 return rcd
->rcvegrbuf
[chunk
] + (idx
<< rcd
->dd
->rcvegrbufsize_shift
);
283 * Returns 1 if error was a CRC, else 0.
284 * Needed for some chip's synthesized error counters.
286 static u32
qib_rcv_hdrerr(struct qib_ctxtdata
*rcd
, struct qib_pportdata
*ppd
,
287 u32 ctxt
, u32 eflags
, u32 l
, u32 etail
,
288 __le32
*rhf_addr
, struct qib_message_header
*rhdr
)
292 if (eflags
& (QLOGIC_IB_RHF_H_ICRCERR
| QLOGIC_IB_RHF_H_VCRCERR
))
294 else if (eflags
== QLOGIC_IB_RHF_H_TIDERR
) {
295 /* For TIDERR and RC QPs premptively schedule a NAK */
296 struct ib_header
*hdr
= (struct ib_header
*)rhdr
;
297 struct ib_other_headers
*ohdr
= NULL
;
298 struct qib_ibport
*ibp
= &ppd
->ibport_data
;
299 struct qib_devdata
*dd
= ppd
->dd
;
300 struct rvt_dev_info
*rdi
= &dd
->verbs_dev
.rdi
;
301 struct rvt_qp
*qp
= NULL
;
302 u32 tlen
= qib_hdrget_length_in_bytes(rhf_addr
);
303 u16 lid
= be16_to_cpu(hdr
->lrh
[1]);
304 int lnh
= be16_to_cpu(hdr
->lrh
[0]) & 3;
310 /* Sanity check packet */
314 if (lid
< be16_to_cpu(IB_MULTICAST_LID_BASE
)) {
315 lid
&= ~((1 << ppd
->lmc
) - 1);
316 if (unlikely(lid
!= ppd
->lid
))
321 if (lnh
== QIB_LRH_BTH
)
323 else if (lnh
== QIB_LRH_GRH
) {
326 ohdr
= &hdr
->u
.l
.oth
;
327 if (hdr
->u
.l
.grh
.next_hdr
!= IB_GRH_NEXT_HDR
)
329 vtf
= be32_to_cpu(hdr
->u
.l
.grh
.version_tclass_flow
);
330 if ((vtf
>> IB_GRH_VERSION_SHIFT
) != IB_GRH_VERSION
)
335 /* Get opcode and PSN from packet */
336 opcode
= be32_to_cpu(ohdr
->bth
[0]);
338 psn
= be32_to_cpu(ohdr
->bth
[2]);
340 /* Get the destination QP number. */
341 qp_num
= be32_to_cpu(ohdr
->bth
[1]) & RVT_QPN_MASK
;
342 if (qp_num
!= QIB_MULTICAST_QPN
) {
346 qp
= rvt_lookup_qpn(rdi
, &ibp
->rvp
, qp_num
);
353 * Handle only RC QPs - for other QP types drop error
356 spin_lock(&qp
->r_lock
);
358 /* Check for valid receive state. */
359 if (!(ib_rvt_state_ops
[qp
->state
] &
360 RVT_PROCESS_RECV_OK
)) {
361 ibp
->rvp
.n_pkt_drops
++;
365 switch (qp
->ibqp
.qp_type
) {
372 be32_to_cpu(ohdr
->bth
[0]));
376 /* Only deal with RDMA Writes for now */
378 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST
) {
379 diff
= qib_cmp24(psn
, qp
->r_psn
);
380 if (!qp
->r_nak_state
&& diff
>= 0) {
381 ibp
->rvp
.n_rc_seqnak
++;
384 /* Use the expected PSN. */
385 qp
->r_ack_psn
= qp
->r_psn
;
387 * Wait to send the sequence
388 * NAK until all packets
389 * in the receive queue have
391 * Otherwise, we end up
392 * propagating congestion.
394 if (list_empty(&qp
->rspwait
)) {
402 } /* Out of sequence NAK */
403 } /* QP Request NAKs */
410 /* For now don't handle any other QP types */
415 spin_unlock(&qp
->r_lock
);
418 } /* Valid packet with TIDErr */
425 * qib_kreceive - receive a packet
426 * @rcd: the qlogic_ib context
427 * @llic: gets count of good packets needed to clear lli,
428 * (used with chips that need need to track crcs for lli)
430 * called from interrupt handler for errors or receive interrupt
431 * Returns number of CRC error packets, needed by some chips for
432 * local link integrity tracking. crcs are adjusted down by following
433 * good packets, if any, and count of good packets is also tracked.
435 u32
qib_kreceive(struct qib_ctxtdata
*rcd
, u32
*llic
, u32
*npkts
)
437 struct qib_devdata
*dd
= rcd
->dd
;
438 struct qib_pportdata
*ppd
= rcd
->ppd
;
441 const u32 rsize
= dd
->rcvhdrentsize
; /* words */
442 const u32 maxcnt
= dd
->rcvhdrcnt
* rsize
; /* words */
443 u32 etail
= -1, l
, hdrqtail
;
444 struct qib_message_header
*hdr
;
445 u32 eflags
, etype
, tlen
, i
= 0, updegr
= 0, crcs
= 0;
448 struct rvt_qp
*qp
, *nqp
;
451 rhf_addr
= (__le32
*) rcd
->rcvhdrq
+ l
+ dd
->rhf_offset
;
452 if (dd
->flags
& QIB_NODMA_RTAIL
) {
453 u32 seq
= qib_hdrget_seq(rhf_addr
);
455 if (seq
!= rcd
->seq_cnt
)
459 hdrqtail
= qib_get_rcvhdrtail(rcd
);
462 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
465 for (last
= 0, i
= 1; !last
; i
+= !last
) {
466 hdr
= dd
->f_get_msgheader(dd
, rhf_addr
);
467 eflags
= qib_hdrget_err_flags(rhf_addr
);
468 etype
= qib_hdrget_rcv_type(rhf_addr
);
470 tlen
= qib_hdrget_length_in_bytes(rhf_addr
);
472 if ((dd
->flags
& QIB_NODMA_RTAIL
) ?
473 qib_hdrget_use_egr_buf(rhf_addr
) :
474 (etype
!= RCVHQ_RCV_TYPE_EXPECTED
)) {
475 etail
= qib_hdrget_index(rhf_addr
);
477 if (tlen
> sizeof(*hdr
) ||
478 etype
>= RCVHQ_RCV_TYPE_NON_KD
) {
479 ebuf
= qib_get_egrbuf(rcd
, etail
);
480 prefetch_range(ebuf
, tlen
- sizeof(*hdr
));
484 u16 lrh_len
= be16_to_cpu(hdr
->lrh
[2]) << 2;
486 if (lrh_len
!= tlen
) {
487 qib_stats
.sps_lenerrs
++;
491 if (etype
== RCVHQ_RCV_TYPE_NON_KD
&& !eflags
&&
493 tlen
> (dd
->rcvhdrentsize
- 2 + 1 -
494 qib_hdrget_offset(rhf_addr
)) << 2) {
499 * Both tiderr and qibhdrerr are set for all plain IB
500 * packets; only qibhdrerr should be set.
502 if (unlikely(eflags
))
503 crcs
+= qib_rcv_hdrerr(rcd
, ppd
, rcd
->ctxt
, eflags
, l
,
504 etail
, rhf_addr
, hdr
);
505 else if (etype
== RCVHQ_RCV_TYPE_NON_KD
) {
506 qib_ib_rcv(rcd
, hdr
, ebuf
, tlen
);
509 else if (llic
&& *llic
)
516 if (i
== QIB_MAX_PKT_RECV
)
519 rhf_addr
= (__le32
*) rcd
->rcvhdrq
+ l
+ dd
->rhf_offset
;
520 if (dd
->flags
& QIB_NODMA_RTAIL
) {
521 u32 seq
= qib_hdrget_seq(rhf_addr
);
523 if (++rcd
->seq_cnt
> 13)
525 if (seq
!= rcd
->seq_cnt
)
527 } else if (l
== hdrqtail
)
530 * Update head regs etc., every 16 packets, if not last pkt,
531 * to help prevent rcvhdrq overflows, when many packets
532 * are processed and queue is nearly full.
533 * Don't request an interrupt for intermediate updates.
536 if (!last
&& !(i
& 0xf)) {
537 dd
->f_update_usrhead(rcd
, lval
, updegr
, etail
, i
);
545 * Iterate over all QPs waiting to respond.
546 * The list won't change since the IRQ is only run on one CPU.
548 list_for_each_entry_safe(qp
, nqp
, &rcd
->qp_wait_list
, rspwait
) {
549 list_del_init(&qp
->rspwait
);
550 if (qp
->r_flags
& RVT_R_RSP_NAK
) {
551 qp
->r_flags
&= ~RVT_R_RSP_NAK
;
554 if (qp
->r_flags
& RVT_R_RSP_SEND
) {
557 qp
->r_flags
&= ~RVT_R_RSP_SEND
;
558 spin_lock_irqsave(&qp
->s_lock
, flags
);
559 if (ib_rvt_state_ops
[qp
->state
] &
560 RVT_PROCESS_OR_FLUSH_SEND
)
561 qib_schedule_send(qp
);
562 spin_unlock_irqrestore(&qp
->s_lock
, flags
);
568 /* Report number of packets consumed */
573 * Always write head at end, and setup rcv interrupt, even
574 * if no packets were processed.
576 lval
= (u64
)rcd
->head
| dd
->rhdrhead_intr_off
;
577 dd
->f_update_usrhead(rcd
, lval
, updegr
, etail
, i
);
582 * qib_set_mtu - set the MTU
583 * @ppd: the perport data
586 * We can handle "any" incoming size, the issue here is whether we
587 * need to restrict our outgoing size. For now, we don't do any
588 * sanity checking on this, and we don't deal with what happens to
589 * programs that are already running when the size changes.
590 * NOTE: changing the MTU will usually cause the IBC to go back to
593 int qib_set_mtu(struct qib_pportdata
*ppd
, u16 arg
)
598 if (arg
!= 256 && arg
!= 512 && arg
!= 1024 && arg
!= 2048 &&
603 chk
= ib_mtu_enum_to_int(qib_ibmtu
);
604 if (chk
> 0 && arg
> chk
) {
609 piosize
= ppd
->ibmaxlen
;
612 if (arg
>= (piosize
- QIB_PIO_MAXIBHDR
)) {
613 /* Only if it's not the initial value (or reset to it) */
614 if (piosize
!= ppd
->init_ibmaxlen
) {
615 if (arg
> piosize
&& arg
<= ppd
->init_ibmaxlen
)
616 piosize
= ppd
->init_ibmaxlen
- 2 * sizeof(u32
);
617 ppd
->ibmaxlen
= piosize
;
619 } else if ((arg
+ QIB_PIO_MAXIBHDR
) != ppd
->ibmaxlen
) {
620 piosize
= arg
+ QIB_PIO_MAXIBHDR
- 2 * sizeof(u32
);
621 ppd
->ibmaxlen
= piosize
;
624 ppd
->dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_MTU
, 0);
632 int qib_set_lid(struct qib_pportdata
*ppd
, u32 lid
, u8 lmc
)
634 struct qib_devdata
*dd
= ppd
->dd
;
639 dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_LIDLMC
,
640 lid
| (~((1U << lmc
) - 1)) << 16);
642 qib_devinfo(dd
->pcidev
, "IB%u:%u got a lid: 0x%x\n",
643 dd
->unit
, ppd
->port
, lid
);
649 * Following deal with the "obviously simple" task of overriding the state
650 * of the LEDS, which normally indicate link physical and logical status.
651 * The complications arise in dealing with different hardware mappings
652 * and the board-dependent routine being called from interrupts.
653 * and then there's the requirement to _flash_ them.
655 #define LED_OVER_FREQ_SHIFT 8
656 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
657 /* Below is "non-zero" to force override, but both actual LEDs are off */
658 #define LED_OVER_BOTH_OFF (8)
660 static void qib_run_led_override(struct timer_list
*t
)
662 struct qib_pportdata
*ppd
= from_timer(ppd
, t
,
664 struct qib_devdata
*dd
= ppd
->dd
;
668 if (!(dd
->flags
& QIB_INITTED
))
671 ph_idx
= ppd
->led_override_phase
++ & 1;
672 ppd
->led_override
= ppd
->led_override_vals
[ph_idx
];
673 timeoff
= ppd
->led_override_timeoff
;
675 dd
->f_setextled(ppd
, 1);
677 * don't re-fire the timer if user asked for it to be off; we let
678 * it fire one more time after they turn it off to simplify
680 if (ppd
->led_override_vals
[0] || ppd
->led_override_vals
[1])
681 mod_timer(&ppd
->led_override_timer
, jiffies
+ timeoff
);
684 void qib_set_led_override(struct qib_pportdata
*ppd
, unsigned int val
)
686 struct qib_devdata
*dd
= ppd
->dd
;
689 if (!(dd
->flags
& QIB_INITTED
))
692 /* First check if we are blinking. If not, use 1HZ polling */
694 freq
= (val
& LED_OVER_FREQ_MASK
) >> LED_OVER_FREQ_SHIFT
;
697 /* For blink, set each phase from one nybble of val */
698 ppd
->led_override_vals
[0] = val
& 0xF;
699 ppd
->led_override_vals
[1] = (val
>> 4) & 0xF;
700 timeoff
= (HZ
<< 4)/freq
;
702 /* Non-blink set both phases the same. */
703 ppd
->led_override_vals
[0] = val
& 0xF;
704 ppd
->led_override_vals
[1] = val
& 0xF;
706 ppd
->led_override_timeoff
= timeoff
;
709 * If the timer has not already been started, do so. Use a "quick"
710 * timeout so the function will be called soon, to look at our request.
712 if (atomic_inc_return(&ppd
->led_override_timer_active
) == 1) {
713 /* Need to start timer */
714 timer_setup(&ppd
->led_override_timer
, qib_run_led_override
, 0);
715 ppd
->led_override_timer
.expires
= jiffies
+ 1;
716 add_timer(&ppd
->led_override_timer
);
718 if (ppd
->led_override_vals
[0] || ppd
->led_override_vals
[1])
719 mod_timer(&ppd
->led_override_timer
, jiffies
+ 1);
720 atomic_dec(&ppd
->led_override_timer_active
);
725 * qib_reset_device - reset the chip if possible
726 * @unit: the device to reset
728 * Whether or not reset is successful, we attempt to re-initialize the chip
729 * (that is, much like a driver unload/reload). We clear the INITTED flag
730 * so that the various entry points will fail until we reinitialize. For
731 * now, we only allow this if no user contexts are open that use chip resources
733 int qib_reset_device(int unit
)
736 struct qib_devdata
*dd
= qib_lookup(unit
);
737 struct qib_pportdata
*ppd
;
746 qib_devinfo(dd
->pcidev
, "Reset on unit %u requested\n", unit
);
748 if (!dd
->kregbase
|| !(dd
->flags
& QIB_PRESENT
)) {
749 qib_devinfo(dd
->pcidev
,
750 "Invalid unit number %u or not initialized or not present\n",
756 spin_lock_irqsave(&dd
->uctxt_lock
, flags
);
758 for (i
= dd
->first_user_ctxt
; i
< dd
->cfgctxts
; i
++) {
759 if (!dd
->rcd
[i
] || !dd
->rcd
[i
]->cnt
)
761 spin_unlock_irqrestore(&dd
->uctxt_lock
, flags
);
765 spin_unlock_irqrestore(&dd
->uctxt_lock
, flags
);
767 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
768 ppd
= dd
->pport
+ pidx
;
769 if (atomic_read(&ppd
->led_override_timer_active
)) {
770 /* Need to stop LED timer, _then_ shut off LEDs */
771 del_timer_sync(&ppd
->led_override_timer
);
772 atomic_set(&ppd
->led_override_timer_active
, 0);
775 /* Shut off LEDs after we are sure timer is not running */
776 ppd
->led_override
= LED_OVER_BOTH_OFF
;
777 dd
->f_setextled(ppd
, 0);
778 if (dd
->flags
& QIB_HAS_SEND_DMA
)
779 qib_teardown_sdma(ppd
);
782 ret
= dd
->f_reset(dd
);
784 ret
= qib_init(dd
, 1);
789 "Reinitialize unit %u after reset failed with %d\n",
792 qib_devinfo(dd
->pcidev
,
793 "Reinitialized unit %u after resetting\n",